| Message ID | 20191211154206.46260-11-broonie@kernel.org (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64: ARMv8.5-A: Branch Target Identification support | expand |
On Wed, Dec 11, 2019 at 03:42:04PM +0000, Mark Brown wrote: > From: Dave Martin <Dave.Martin@arm.com> > > Since normal execution of any non-branch instruction resets the > PSTATE BTYPE field to 0, so do the same thing when emulating a > trapped instruction. > > Branches don't trap directly, so we should never need to assign a > non-zero value to BTYPE here. > > Signed-off-by: Dave Martin <Dave.Martin@arm.com> > Signed-off-by: Mark Brown <broonie@kernel.org> > --- > arch/arm64/kernel/traps.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c > index bf79d8024fbe..9fc05ae500e6 100644 > --- a/arch/arm64/kernel/traps.c > +++ b/arch/arm64/kernel/traps.c > @@ -332,6 +332,8 @@ void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size) > > if (regs->pstate & PSR_MODE32_BIT) Same comment as on a previous patch, compat_user_mode() could be used. Other than this: Reviewed-by: Catalin Marinas <catalin.marinas@arm.com>
diff --git a/arch/arm64/kernel/traps.c b/arch/arm64/kernel/traps.c index bf79d8024fbe..9fc05ae500e6 100644 --- a/arch/arm64/kernel/traps.c +++ b/arch/arm64/kernel/traps.c @@ -332,6 +332,8 @@ void arm64_skip_faulting_instruction(struct pt_regs *regs, unsigned long size) if (regs->pstate & PSR_MODE32_BIT) advance_itstate(regs); + else + regs->pstate &= ~PSR_BTYPE_MASK; } static LIST_HEAD(undef_hook);