| Message ID | 757995875cc12d3f5a8f5fd5659b04653950970a.1576211720.git.saiprakash.ranjan@codeaurora.org (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Convert QCOM watchdog timer bindings to YAML | expand |
On Thu 12 Dec 20:53 PST 2019, Sai Prakash Ranjan wrote: > Update the compatible for QCS404 watchdog timer with proper > SoC specific compatible. > Applied Thanks, Bjorn > Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> > --- > arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > index f5f0c4c9cb16..c9e8e629045b 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > @@ -905,7 +905,7 @@ > }; > > watchdog@b017000 { > - compatible = "qcom,kpss-wdt"; > + compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt"; > reg = <0x0b017000 0x1000>; > clocks = <&sleep_clk>; > }; > -- > QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member > of Code Aurora Forum, hosted by The Linux Foundation
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index f5f0c4c9cb16..c9e8e629045b 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -905,7 +905,7 @@ }; watchdog@b017000 { - compatible = "qcom,kpss-wdt"; + compatible = "qcom,apss-wdt-qcs404", "qcom,kpss-wdt"; reg = <0x0b017000 0x1000>; clocks = <&sleep_clk>; };
Update the compatible for QCS404 watchdog timer with proper SoC specific compatible. Signed-off-by: Sai Prakash Ranjan <saiprakash.ranjan@codeaurora.org> --- arch/arm64/boot/dts/qcom/qcs404.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)