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Fri, 13 Dec 2019 00:48:34 -0800 (PST) From: Lad Prabhakar X-Google-Original-From: Lad Prabhakar To: Bjorn Helgaas , Rob Herring , Mark Rutland , Geert Uytterhoeven , Magnus Damm , Kishon Vijay Abraham I , Marek Vasut , Yoshihiro Shimoda , linux-pci@vger.kernel.org Subject: [v2 4/6] dt-bindings: PCI: rcar: Add bindings for R-Car PCIe endpoint controller Date: Fri, 13 Dec 2019 08:47:46 +0000 Message-Id: <20191213084748.11210-5-prabhakar.mahadev-lad.rj@bp.renesas.com> X-Mailer: git-send-email 2.20.1 In-Reply-To: <20191213084748.11210-1-prabhakar.mahadev-lad.rj@bp.renesas.com> References: <20191213084748.11210-1-prabhakar.mahadev-lad.rj@bp.renesas.com> MIME-Version: 1.0 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20191213_004835_826076_83F66E37 X-CRM114-Status: GOOD ( 13.76 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.2 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.0 SPF_PASS SPF: sender matches SPF record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail provider (prabhakar.csengg[at]gmail.com) -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-rockchip@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Upstream kernel work for Rockchip platforms List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: devicetree@vger.kernel.org, Chris Paterson , Lorenzo Pieralisi , Heiko Stuebner , Arnd Bergmann , Jingoo Han , Catalin Marinas , Shawn Lin , Frank Rowand , linux-kernel@vger.kernel.org, "Lad, Prabhakar" , linux-renesas-soc@vger.kernel.org, linux-rockchip@lists.infradead.org, Tom Joseph , Simon Horman , Greg Kroah-Hartman , Andrew Murray , Gustavo Pimentel , Will Deacon , linux-arm-kernel@lists.infradead.org Sender: "Linux-rockchip" Errors-To: linux-rockchip-bounces+patchwork-linux-rockchip=patchwork.kernel.org@lists.infradead.org From: "Lad, Prabhakar" This patch adds the bindings for the R-Car PCIe endpoint driver. Signed-off-by: Lad, Prabhakar --- .../devicetree/bindings/pci/rcar-pci-ep.txt | 37 ++++++++++++++++++++++ 1 file changed, 37 insertions(+) create mode 100644 Documentation/devicetree/bindings/pci/rcar-pci-ep.txt diff --git a/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt new file mode 100644 index 0000000..7f0a97e --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rcar-pci-ep.txt @@ -0,0 +1,37 @@ +* Renesas R-Car PCIe Endpoint Controller DT description + +Required properties: + "renesas,pcie-ep-r8a774c0" for the R8A774C0 SoC; + "renesas,pcie-ep-rcar-gen3" for a generic R-Car Gen3 or + RZ/G2 compatible device. + + When compatible with the generic version, nodes must list the + SoC-specific version corresponding to the platform first + followed by the generic version. + +- reg: base address and length of the PCIe controller registers. +- outbound-ranges: outbound windows base address and length including the flags. +- resets: Must contain phandles to PCIe-related reset lines exposed by IP block +- clocks: from common clock binding: clock specifiers for the PCIe controller + clock. +- clock-names: from common clock binding: should be "pcie". + +Optional Property: +- max-functions: Maximum number of functions that can be configured (default 1). + +Example: + +SoC-specific DT Entry: + + pcie_ep: pcie_ep@fe000000 { + compatible = "renesas,pcie-ep-r8a774c0", "renesas,pcie-rcar-gen2"; + reg = <0 0xfe000000 0 0x80000>; + outbound-ranges = <0xa 0x0 0xfe100000 0 0x000100000 + 0xa 0x0 0xfe200000 0 0x000200000 + 0x6 0x0 0x30000000 0 0x008000000 + 0x6 0x0 0x38000000 0 0x008000000>; + clocks = <&cpg CPG_MOD 319>; + clock-names = "pcie"; + power-domains = <&sysc R8A774C0_PD_ALWAYS_ON>; + resets = <&cpg 319>; + };