[PATCHv5,26/34] drm/komeda: Factor in the invocation of special helper, afbc case
diff mbox series

Message ID 20191217145020.14645-27-andrzej.p@collabora.com
State New
Headers show
Series
  • Add AFBC support for Rockchip
Related show

Commit Message

Andrzej Pietrasiewicz Dec. 17, 2019, 2:50 p.m. UTC
Prepare for unification with non-afbc case.

Signed-off-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>
---
 .../arm/display/komeda/komeda_framebuffer.c   | 84 ++++++++-----------
 1 file changed, 37 insertions(+), 47 deletions(-)

Patch
diff mbox series

diff --git a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
index 2c9691b86cff..7e02a04cdd11 100644
--- a/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
+++ b/drivers/gpu/drm/arm/display/komeda/komeda_framebuffer.c
@@ -36,51 +36,6 @@  static const struct drm_framebuffer_funcs komeda_fb_funcs = {
 	.create_handle	= komeda_fb_create_handle,
 };
 
-static int
-komeda_fb_afbc_size_check(struct drm_device *dev,
-			  struct komeda_fb *kfb,
-			  const struct drm_format_info *info,
-			  struct drm_gem_object **objs,
-			  struct drm_file *file,
-			  const struct drm_mode_fb_cmd2 *mode_cmd)
-{
-	struct drm_size_check check = { 0 };
-	u32 alignment_w = 0, alignment_h = 0, alignment_header, n_blocks, bpp;
-
-	if (!drm_afbc_get_superblock_wh(mode_cmd->modifier[0], &alignment_w, &alignment_h))
-		return -EINVAL;
-
-	/* tiled header afbc */
-	if (mode_cmd->modifier[0] & AFBC_FORMAT_MOD_TILED) {
-		alignment_w *= AFBC_TH_LAYOUT_ALIGNMENT;
-		alignment_h *= AFBC_TH_LAYOUT_ALIGNMENT;
-		alignment_header = AFBC_TH_BODY_START_ALIGNMENT;
-	} else {
-		alignment_header = AFBC_BODY_START_ALIGNMENT;
-	}
-
-	kfb->aligned_w = ALIGN(mode_cmd->width, alignment_w);
-	kfb->aligned_h = ALIGN(mode_cmd->height, alignment_h);
-
-	if (mode_cmd->offsets[0] % alignment_header) {
-		DRM_DEBUG_KMS("afbc offset alignment check failed.\n");
-		return -EINVAL;
-	}
-
-	n_blocks = (kfb->aligned_w * kfb->aligned_h) / AFBC_SUPERBLK_PIXELS;
-	kfb->offset_payload = ALIGN(n_blocks * AFBC_HEADER_SIZE,
-				    alignment_header);
-
-	bpp = komeda_get_afbc_format_bpp(info, mode_cmd->modifier[0]);
-	kfb->afbc_size = kfb->offset_payload + n_blocks *
-			 ALIGN(bpp * AFBC_SUPERBLK_PIXELS / 8,
-			       AFBC_SUPERBLK_ALIGNMENT);
-	check.min_size[0] = kfb->afbc_size + mode_cmd->offsets[0];
-	check.use_min_size = true;
-
-	return drm_gem_fb_size_check2(dev, mode_cmd, &check, objs);
-}
-
 struct drm_framebuffer *
 komeda_fb_create(struct drm_device *dev, struct drm_file *file,
 		 const struct drm_mode_fb_cmd2 *mode_cmd)
@@ -113,14 +68,49 @@  komeda_fb_create(struct drm_device *dev, struct drm_file *file,
 	info = drm_get_format_info(dev, mode_cmd);
 
 	if (mode_cmd->modifier[0]) {
+		struct drm_size_check check = { 0 };
+		u32 alignment_w = 0, alignment_h = 0;
+		u32 alignment_header, n_blocks, bpp;
+
 		if (num_planes != 1) {
 			DRM_DEBUG_KMS("AFBC requires exactly 1 plane.\n");
 			ret = -EINVAL;
 			goto err_cleanup;
 		}
 
-		ret = komeda_fb_afbc_size_check(dev, kfb, info, objs,
-						file, mode_cmd);
+		if (!drm_afbc_get_superblock_wh(mode_cmd->modifier[0], &alignment_w, &alignment_h)) {
+			ret = -EINVAL;
+			goto err_cleanup;
+		}
+
+		/* tiled header afbc */
+		if (mode_cmd->modifier[0] & AFBC_FORMAT_MOD_TILED) {
+			alignment_w *= AFBC_TH_LAYOUT_ALIGNMENT;
+			alignment_h *= AFBC_TH_LAYOUT_ALIGNMENT;
+			alignment_header = AFBC_TH_BODY_START_ALIGNMENT;
+		} else {
+			alignment_header = AFBC_BODY_START_ALIGNMENT;
+		}
+
+		kfb->aligned_w = ALIGN(mode_cmd->width, alignment_w);
+		kfb->aligned_h = ALIGN(mode_cmd->height, alignment_h);
+
+		if (mode_cmd->offsets[0] % alignment_header) {
+			DRM_DEBUG_KMS("afbc offset alignment check failed.\n");
+			ret = -EINVAL;
+			goto err_cleanup;
+		}
+
+		n_blocks = (kfb->aligned_w * kfb->aligned_h) / AFBC_SUPERBLK_PIXELS;
+		kfb->offset_payload = ALIGN(n_blocks * AFBC_HEADER_SIZE, alignment_header);
+
+		bpp = komeda_get_afbc_format_bpp(info, mode_cmd->modifier[0]);
+		kfb->afbc_size = kfb->offset_payload
+			       + n_blocks * ALIGN(bpp * AFBC_SUPERBLK_PIXELS / 8, AFBC_SUPERBLK_ALIGNMENT);
+		check.min_size[0] = kfb->afbc_size + mode_cmd->offsets[0];
+		check.use_min_size = true;
+
+		ret = drm_gem_fb_size_check2(dev, mode_cmd, &check, objs);
 	} else {
 		struct drm_size_check check = { 0 };