diff mbox series

arm64: dts: renesas: hihope-common: Fix EXTAL Clock frequency

Message ID 1576667617-35615-1-git-send-email-biju.das@bp.renesas.com (mailing list archive)
State Rejected
Delegated to: Geert Uytterhoeven
Headers show
Series arm64: dts: renesas: hihope-common: Fix EXTAL Clock frequency | expand

Commit Message

Biju Das Dec. 18, 2019, 11:13 a.m. UTC
As per the schematic, the extal frequency is 16.6666MHz. However
it is wrongly mentioned as 16666666 on the SoC dtsi.

Fixes: 438419ebd3f86221390 ("arm64: dts: renesas: Add HiHope RZ/G2M
main board support")
Signed-off-by: Biju Das <biju.das@bp.renesas.com>
---
 arch/arm64/boot/dts/renesas/hihope-common.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

Comments

Geert Uytterhoeven Dec. 20, 2019, 4:04 p.m. UTC | #1
Hi Biju,

On Wed, Dec 18, 2019 at 12:15 PM Biju Das <biju.das@bp.renesas.com> wrote:
> As per the schematic, the extal frequency is 16.6666MHz. However
> it is wrongly mentioned as 16666666 on the SoC dtsi.
>
> Fixes: 438419ebd3f86221390 ("arm64: dts: renesas: Add HiHope RZ/G2M
> main board support")
> Signed-off-by: Biju Das <biju.das@bp.renesas.com>

Thanks for your patch!

> --- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi
> +++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
> @@ -154,7 +154,7 @@
>  };
>
>  &extal_clk {
> -       clock-frequency = <16666666>;
> +       clock-frequency = <16666600>;
>  };

Given the schematics say the accuracy of the part is specified as 50ppm[*],
changing this doesn't matter much, IMHO.

[*] Yeah, that's more than 4s/day, so it would made a lousy watch, if not
    for NTP ;-)

Gr{oetje,eeting}s,

                        Geert
diff mbox series

Patch

diff --git a/arch/arm64/boot/dts/renesas/hihope-common.dtsi b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
index 2c942a7..88e6aa9 100644
--- a/arch/arm64/boot/dts/renesas/hihope-common.dtsi
+++ b/arch/arm64/boot/dts/renesas/hihope-common.dtsi
@@ -154,7 +154,7 @@ 
 };
 
 &extal_clk {
-	clock-frequency = <16666666>;
+	clock-frequency = <16666600>;
 };
 
 &extalr_clk {