@@ -36,6 +36,7 @@
#include <asm/io_apic.h>
#include <mach_apic.h>
#include <io_ports.h>
+#include <irq_vectors.h>
#include <xen/kexec.h>
#include <asm/guest.h>
#include <asm/time.h>
@@ -34,6 +34,7 @@
#include <asm/hvm/svm/svm.h>
#include <asm/hvm/svm/vmcb.h>
#include <asm/apic.h>
+#include <irq_vectors.h>
#include <public/pmu.h>
#include <xsm/xsm.h>
@@ -83,7 +83,7 @@ static void vlapic_do_init(struct vlapic
static int vlapic_find_highest_vector(const void *bitmap)
{
const uint32_t *word = bitmap;
- unsigned int word_offset = NR_VECTORS / 32;
+ unsigned int word_offset = X86_NR_VECTORS / 32;
/* Work backwards through the bitmap (first 32-bit word in every four). */
while ( (word_offset != 0) && (word[(--word_offset)*4] == 0) )
@@ -659,7 +659,7 @@ int guest_rdmsr_x2apic(const struct vcpu
REG(LVT0) | REG(LVT1) | REG(LVTERR) | REG(TMICT) |
REG(TMCCT) | REG(TDCR) |
#undef REG
-#define REGBLOCK(x) (((1UL << (NR_VECTORS / 32)) - 1) << (APIC_ ## x >> 4))
+#define REGBLOCK(x) (((1UL << (X86_NR_VECTORS / 32)) - 1) << (APIC_ ## x >> 4))
REGBLOCK(ISR) | REGBLOCK(TMR) | REGBLOCK(IRR)
#undef REGBLOCK
};
@@ -352,7 +352,7 @@ void vmx_intr_assist(void)
{
word = (const void *)&vlapic->regs->data[APIC_IRR];
printk(XENLOG_ERR "vIRR:");
- for ( i = NR_VECTORS / 32; i-- ; )
+ for ( i = X86_NR_VECTORS / 32; i-- ; )
printk(" %08x", word[i*4]);
printk("\n");
}
@@ -362,7 +362,7 @@ void vmx_intr_assist(void)
{
word = (const void *)&pi_desc->pir;
printk(XENLOG_ERR " PIR:");
- for ( i = NR_VECTORS / 32; i-- ; )
+ for ( i = X86_NR_VECTORS / 32; i-- ; )
printk(" %08x", word[i]);
printk("\n");
}
@@ -1161,7 +1161,7 @@ static int construct_vmcs(struct vcpu *v
unsigned int i;
/* EOI-exit bitmap */
- bitmap_zero(v->arch.hvm.vmx.eoi_exit_bitmap, NR_VECTORS);
+ bitmap_zero(v->arch.hvm.vmx.eoi_exit_bitmap, X86_NR_VECTORS);
for ( i = 0; i < ARRAY_SIZE(v->arch.hvm.vmx.eoi_exit_bitmap); ++i )
__vmwrite(EOI_EXIT_BITMAP(i), 0);
@@ -1955,7 +1955,7 @@ static void vmx_process_isr(int isr, str
* is acceptable because the subsequent interrupts will set up the eoi
* bitmap correctly.
*/
- for ( i = 0x10; i < NR_VECTORS; ++i )
+ for ( i = 0x10; i < X86_NR_VECTORS; ++i )
if ( vlapic_test_vector(i, &vlapic->regs->data[APIC_IRR]) ||
vlapic_test_vector(i, &vlapic->regs->data[APIC_ISR]) )
set_bit(i, v->arch.hvm.vmx.eoi_exit_bitmap);
@@ -2075,7 +2075,7 @@ static void vmx_sync_pir_to_irr(struct v
{
struct vlapic *vlapic = vcpu_vlapic(v);
unsigned int group, i;
- DECLARE_BITMAP(pending_intr, NR_VECTORS);
+ DECLARE_BITMAP(pending_intr, X86_NR_VECTORS);
if ( !pi_test_and_clear_on(&v->arch.hvm.vmx.pi_desc) )
return;
@@ -2083,7 +2083,7 @@ static void vmx_sync_pir_to_irr(struct v
for ( group = 0; group < ARRAY_SIZE(pending_intr); group++ )
pending_intr[group] = pi_get_pir(&v->arch.hvm.vmx.pi_desc, group);
- for_each_set_bit(i, pending_intr, NR_VECTORS)
+ for_each_set_bit(i, pending_intr, X86_NR_VECTORS)
vlapic_set_vector(i, &vlapic->regs->data[APIC_IRR]);
}
@@ -20,6 +20,7 @@
#include <asm/apic.h>
#include <asm/asm_defns.h>
#include <io_ports.h>
+#include <irq_vectors.h>
/*
* This is the 'legacy' 8259A Programmable Interrupt Controller,
@@ -35,6 +35,7 @@
#include <asm/setup.h>
#include <mach_apic.h>
#include <io_ports.h>
+#include <irq_vectors.h>
#include <public/physdev.h>
#include <xen/trace.h>
@@ -75,7 +76,7 @@ static void share_vector_maps(unsigned i
return;
bitmap_or(vector_map[src]->_bits, vector_map[src]->_bits,
- vector_map[dst]->_bits, NR_VECTORS);
+ vector_map[dst]->_bits, X86_NR_VECTORS);
for (pin = 0; pin < nr_ioapic_entries[dst]; ++pin) {
int irq = apic_pin_2_gsi_irq(dst, pin);
@@ -24,6 +24,7 @@
#include <asm/current.h>
#include <asm/flushtlb.h>
#include <asm/mach-generic/mach_apic.h>
+#include <irq_vectors.h>
#include <public/physdev.h>
static int parse_irq_vector_map_param(const char *s);
@@ -44,7 +45,7 @@ vmask_t global_used_vector_map;
struct irq_desc __read_mostly *irq_desc = NULL;
-static DECLARE_BITMAP(used_vectors, NR_VECTORS);
+static DECLARE_BITMAP(used_vectors, X86_NR_VECTORS);
static DEFINE_SPINLOCK(vector_lock);
@@ -149,7 +150,7 @@ static int __init _bind_irq_vector(struc
cpumask_t online_mask;
int cpu;
- BUG_ON((unsigned)vector >= NR_VECTORS);
+ BUG_ON((unsigned)vector >= X86_NR_VECTORS);
cpumask_and(&online_mask, cpu_mask, &cpu_online_map);
if (cpumask_empty(&online_mask))
@@ -416,7 +417,7 @@ int __init init_irq_data(void)
struct irq_desc *desc;
int irq, vector;
- for ( vector = 0; vector < NR_VECTORS; ++vector )
+ for ( vector = 0; vector < X86_NR_VECTORS; ++vector )
this_cpu(vector_irq)[vector] = INT_MIN;
irq_desc = xzalloc_array(struct irq_desc, nr_irqs);
@@ -662,7 +663,7 @@ void setup_vector_irq(unsigned int cpu)
unsigned int irq, vector;
/* Clear vector_irq */
- for ( vector = 0; vector < NR_VECTORS; ++vector )
+ for ( vector = 0; vector < X86_NR_VECTORS; ++vector )
per_cpu(vector_irq, cpu)[vector] = INT_MIN;
/* Mark the inuse vectors */
for ( irq = 0; irq < nr_irqs; ++irq )
@@ -890,7 +891,7 @@ uint8_t alloc_hipriority_vector(void)
return next++;
}
-static void (*direct_apic_vector[NR_VECTORS])(struct cpu_user_regs *);
+static void (*direct_apic_vector[X86_NR_VECTORS])(struct cpu_user_regs *);
void set_direct_apic_vector(
uint8_t vector, void (*handler)(struct cpu_user_regs *))
{
@@ -2510,7 +2511,7 @@ static void dump_irqs(unsigned char key)
process_pending_softirqs();
printk("Direct vector information:\n");
- for ( i = FIRST_DYNAMIC_VECTOR; i < NR_VECTORS; ++i )
+ for ( i = FIRST_DYNAMIC_VECTOR; i < X86_NR_VECTORS; ++i )
if ( direct_apic_vector[i] )
printk(" %#02x -> %ps()\n", i, direct_apic_vector[i]);
@@ -27,6 +27,7 @@
#include <asm/p2m.h>
#include <mach_apic.h>
#include <io_ports.h>
+#include <irq_vectors.h>
#include <public/physdev.h>
#include <xen/iommu.h>
#include <xsm/xsm.h>
@@ -358,7 +358,7 @@ long do_set_trap_table(XEN_GUEST_HANDLE_
/* If no table is presented then clear the entire virtual IDT. */
if ( guest_handle_is_null(traps) )
{
- memset(dst, 0, NR_VECTORS * sizeof(*dst));
+ memset(dst, 0, X86_NR_VECTORS * sizeof(*dst));
return 0;
}
@@ -403,7 +403,7 @@ int compat_set_trap_table(XEN_GUEST_HAND
/* If no table is presented then clear the entire virtual IDT. */
if ( guest_handle_is_null(traps) )
{
- memset(dst, 0, NR_VECTORS * sizeof(*dst));
+ memset(dst, 0, X86_NR_VECTORS * sizeof(*dst));
return 0;
}
@@ -250,9 +250,9 @@ int pv_vcpu_initialise(struct vcpu *v)
if ( rc )
return rc;
- BUILD_BUG_ON(NR_VECTORS * sizeof(*v->arch.pv.trap_ctxt) >
+ BUILD_BUG_ON(X86_NR_VECTORS * sizeof(*v->arch.pv.trap_ctxt) >
PAGE_SIZE);
- v->arch.pv.trap_ctxt = xzalloc_array(struct trap_info, NR_VECTORS);
+ v->arch.pv.trap_ctxt = xzalloc_array(struct trap_info, X86_NR_VECTORS);
if ( !v->arch.pv.trap_ctxt )
{
rc = -ENOMEM;
@@ -23,6 +23,7 @@
#include <xen/hypercall.h>
#include <xen/nospec.h>
#include <xen/trace.h>
+#include <irq_vectors.h>
#define HYPERCALL(x) \
[ __HYPERVISOR_ ## x ] = { (hypercall_fn_t *) do_ ## x, \
@@ -28,6 +28,7 @@
#include <asm/apic.h>
#include <asm/shared.h>
#include <asm/traps.h>
+#include <irq_vectors.h>
void do_entry_int82(struct cpu_user_regs *regs)
{
@@ -20,6 +20,7 @@
#include <asm/hardirq.h>
#include <asm/hpet.h>
#include <asm/hvm/support.h>
+#include <irq_vectors.h>
#include <mach_apic.h>
/*
@@ -44,6 +44,7 @@
#include <asm/spec_ctrl.h>
#include <asm/time.h>
#include <asm/tboot.h>
+#include <irq_vectors.h>
#include <mach_apic.h>
unsigned long __read_mostly trampoline_phys;
@@ -1992,7 +1992,7 @@ void __init init_idt_traps(void)
this_cpu(compat_gdt) = boot_compat_gdt;
}
-extern void (*const autogen_entrypoints[NR_VECTORS])(void);
+extern void (*const autogen_entrypoints[X86_NR_VECTORS])(void);
void __init trap_init(void)
{
unsigned int vector;
@@ -2002,7 +2002,7 @@ void __init trap_init(void)
pv_trap_init();
- for ( vector = 0; vector < NR_VECTORS; ++vector )
+ for ( vector = 0; vector < X86_NR_VECTORS; ++vector )
{
if ( autogen_entrypoints[vector] )
{
@@ -919,7 +919,7 @@ GLOBAL(autogen_entrypoints)
autogen_stubs: /* Automatically generated stubs. */
vec = 0
- .rept NR_VECTORS
+ .rept X86_NR_VECTORS
/* Common interrupts, heading towards do_IRQ(). */
#ifdef CONFIG_PV
@@ -19,7 +19,6 @@
#define __ASM_X86_HVM_VMX_VMCS_H__
#include <asm/hvm/io.h>
-#include <irq_vectors.h>
extern void vmcs_dump_vcpu(struct vcpu *v);
extern void setup_vmcs_dump(void);
@@ -84,7 +83,7 @@ struct vmx_msr_bitmap {
};
struct pi_desc {
- DECLARE_BITMAP(pir, NR_VECTORS);
+ DECLARE_BITMAP(pir, X86_NR_VECTORS);
union {
struct {
u16 on : 1, /* bit 256 - Outstanding Notification */
@@ -150,7 +149,7 @@ struct vmx_vcpu {
unsigned int host_msr_count;
unsigned long eoi_exitmap_changed;
- DECLARE_BITMAP(eoi_exit_bitmap, NR_VECTORS);
+ DECLARE_BITMAP(eoi_exit_bitmap, X86_NR_VECTORS);
struct pi_desc pi_desc;
unsigned long host_cr0;
@@ -9,7 +9,6 @@
#include <xen/percpu.h>
#include <xen/smp.h>
#include <asm/hvm/irq.h>
-#include <irq_vectors.h>
extern unsigned int nr_irqs_gsi;
extern unsigned int nr_irqs;
@@ -24,7 +23,7 @@ extern unsigned int nr_irqs;
#define LEGACY_VECTOR(irq) ((irq) + FIRST_LEGACY_VECTOR)
typedef struct {
- DECLARE_BITMAP(_bits,NR_VECTORS);
+ DECLARE_BITMAP(_bits, X86_NR_VECTORS);
} vmask_t;
struct irq_desc;
@@ -59,7 +58,7 @@ struct arch_irq_desc {
#define IRQ_VECTOR_UNASSIGNED (-1)
-typedef int vector_irq_t[NR_VECTORS];
+typedef int vector_irq_t[X86_NR_VECTORS];
DECLARE_PER_CPU(vector_irq_t, vector_irq);
extern bool opt_noirqbalance;
@@ -37,8 +37,6 @@
/* There's no IRQ2 at the PIC. */
#define IRQ_MOVE_CLEANUP_VECTOR (FIRST_LEGACY_VECTOR + 2)
-#define NR_VECTORS 256
-
#define FIRST_IRQ_VECTOR FIRST_DYNAMIC_VECTOR
#define LAST_IRQ_VECTOR LAST_HIPRIORITY_VECTOR
@@ -116,4 +116,6 @@
#define X86_INVPCID_ALL_INCL_GLOBAL 2
#define X86_INVPCID_ALL_NON_GLOBAL 3
+#define X86_NR_VECTORS 256
+
#endif /* __XEN_X86_DEFNS_H__ */
This is an architectural definition, so move it to x86-defns.h and add an X86_ prefix. This in particular allows removing the inclusion of irq_vectors.h by virtually every source file, due to irq.h and hvm/vmx/vmcs.h having needed to include it: Changes to IRQ vector usage shouldn't really trigger full rebuilds. Signed-off-by: Jan Beulich <jbeulich@suse.com>