Revert "rockchip: make sure timer7 is enabled on rk3288 platforms"
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Message ID 20191225025908.25305-1-kever.yang@rock-chips.com
State New
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Series
  • Revert "rockchip: make sure timer7 is enabled on rk3288 platforms"
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Commit Message

Kever Yang Dec. 25, 2019, 2:59 a.m. UTC
This reverts commit 2a9fe3ca84afff6259820c4f62e579f41476becc.
All the U-Boot version for rk3288 including mainline, rockchip
legacy/next-dev, have init the timer7, so no need to init it in kernel
again.

One more reason is that if  we enable the trust for rk3288, then timer7 is
not able to be accessed in kernel.

Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
---

 arch/arm/mach-rockchip/rockchip.c | 23 -----------------------
 1 file changed, 23 deletions(-)

Comments

Chen-Yu Tsai Dec. 25, 2019, 3:02 a.m. UTC | #1
On Wed, Dec 25, 2019 at 10:59 AM Kever Yang <kever.yang@rock-chips.com> wrote:
>
> This reverts commit 2a9fe3ca84afff6259820c4f62e579f41476becc.
> All the U-Boot version for rk3288 including mainline, rockchip
> legacy/next-dev, have init the timer7, so no need to init it in kernel
> again.

What about the ChromeOS bootloader?

> One more reason is that if  we enable the trust for rk3288, then timer7 is
> not able to be accessed in kernel.
>
> Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
Heiko Stuebner Dec. 26, 2019, 8:27 p.m. UTC | #2
Am Mittwoch, 25. Dezember 2019, 04:02:29 CET schrieb Chen-Yu Tsai:
> On Wed, Dec 25, 2019 at 10:59 AM Kever Yang <kever.yang@rock-chips.com> wrote:
> >
> > This reverts commit 2a9fe3ca84afff6259820c4f62e579f41476becc.
> > All the U-Boot version for rk3288 including mainline, rockchip
> > legacy/next-dev, have init the timer7, so no need to init it in kernel
> > again.
> 
> What about the ChromeOS bootloader?

Coreboot does seem to start timer7 correctly:
https://github.com/coreboot/coreboot/blob/master/src/soc/rockchip/rk3288/timer.c

But old rk3288 Android TV-boxes do contain bootloaders not doing that and
as the owners of such boxes will most often not have too great development
tools available, that would break newer kernels for them, which is really bad
as we value backwards compatibility very much.

Instead (just checked theoretically) could we just check for psci existence?
I.e. the calling order seems to be:

start_kernel() (in init/main.c)
	-> setup_arch()
		-> psci_dt_init()
			-> populates struct psci_ops
	-> time_init()
		-> machine_desc->init_time()

so in rockchip_timer_init() you should "just" be able to check like

	if (of_machine_is_compatible("rockchip,rk3288") && !psci_ops.cpu_on) {
		/* timer init */
	}


Heiko

> > One more reason is that if  we enable the trust for rk3288, then timer7 is
> > not able to be accessed in kernel.
> >
> > Signed-off-by: Kever Yang <kever.yang@rock-chips.com>
>

Patch
diff mbox series

diff --git a/arch/arm/mach-rockchip/rockchip.c b/arch/arm/mach-rockchip/rockchip.c
index f9797a2b5d0d..f6e1851ed46a 100644
--- a/arch/arm/mach-rockchip/rockchip.c
+++ b/arch/arm/mach-rockchip/rockchip.c
@@ -21,31 +21,8 @@ 
 #include "core.h"
 #include "pm.h"
 
-#define RK3288_TIMER6_7_PHYS 0xff810000
-
 static void __init rockchip_timer_init(void)
 {
-	if (of_machine_is_compatible("rockchip,rk3288")) {
-		void __iomem *reg_base;
-
-		/*
-		 * Most/all uboot versions for rk3288 don't enable timer7
-		 * which is needed for the architected timer to work.
-		 * So make sure it is running during early boot.
-		 */
-		reg_base = ioremap(RK3288_TIMER6_7_PHYS, SZ_16K);
-		if (reg_base) {
-			writel(0, reg_base + 0x30);
-			writel(0xffffffff, reg_base + 0x20);
-			writel(0xffffffff, reg_base + 0x24);
-			writel(1, reg_base + 0x30);
-			dsb();
-			iounmap(reg_base);
-		} else {
-			pr_err("rockchip: could not map timer7 registers\n");
-		}
-	}
-
 	of_clk_init(NULL);
 	timer_probe();
 }