| Message ID | 20191231130528.20669-3-jagan@amarulasolutions.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/sun4i: Allwinner R40 MIPI-DSI support | expand |
On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote: > TCON LCD0, LCD1 in allwinner R40, are used for managing > LCD interfaces like RGB, LVDS and DSI. > > Like TCON TV0, TV1 these LCD0, LCD1 are also managed via > tcon top. > > Add support for it, in tcon driver. > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > --- > Changes for v3: > - none > > drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 ++++++++ > 1 file changed, 8 insertions(+) > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c > index fad72799b8df..69611d38c844 100644 > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > @@ -1470,6 +1470,13 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { > .has_channel_1 = true, > }; > > +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { > + .supports_lvds = true, > + .has_channel_0 = true, > + /* TODO Need to support TCON output muxing via GPIO pins */ > + .set_mux = sun8i_r40_tcon_tv_set_mux, What is this muking about? And why is it a TODO? Maxime
On Thu, Jan 2, 2020 at 4:24 PM Maxime Ripard <mripard@kernel.org> wrote: > > On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote: > > TCON LCD0, LCD1 in allwinner R40, are used for managing > > LCD interfaces like RGB, LVDS and DSI. > > > > Like TCON TV0, TV1 these LCD0, LCD1 are also managed via > > tcon top. > > > > Add support for it, in tcon driver. > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > --- > > Changes for v3: > > - none > > > > drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 ++++++++ > > 1 file changed, 8 insertions(+) > > > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > index fad72799b8df..69611d38c844 100644 > > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > @@ -1470,6 +1470,13 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { > > .has_channel_1 = true, > > }; > > > > +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { > > + .supports_lvds = true, > > + .has_channel_0 = true, > > + /* TODO Need to support TCON output muxing via GPIO pins */ > > + .set_mux = sun8i_r40_tcon_tv_set_mux, > > What is this muking about? And why is it a TODO? Muxing similar like how TCON TOP handle TV0, TV1 I have reused the same so-that it would configure de port selection via sun8i_tcon_top_de_config TCON output muxing have gpio with GPIOD and GPIOH bits, which select which of LCD or TV TCON outputs to the LCD function pins. I have marked these has TODO for further support as mentioned by Chen-Yu in v1[1]. [1] https://patchwork.freedesktop.org/patch/310210/?series=62062&rev=1
On Thu, Jan 02, 2020 at 09:10:31PM +0530, Jagan Teki wrote: > On Thu, Jan 2, 2020 at 4:24 PM Maxime Ripard <mripard@kernel.org> wrote: > > > > On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote: > > > TCON LCD0, LCD1 in allwinner R40, are used for managing > > > LCD interfaces like RGB, LVDS and DSI. > > > > > > Like TCON TV0, TV1 these LCD0, LCD1 are also managed via > > > tcon top. > > > > > > Add support for it, in tcon driver. > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > --- > > > Changes for v3: > > > - none > > > > > > drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 ++++++++ > > > 1 file changed, 8 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > index fad72799b8df..69611d38c844 100644 > > > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > @@ -1470,6 +1470,13 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { > > > .has_channel_1 = true, > > > }; > > > > > > +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { > > > + .supports_lvds = true, > > > + .has_channel_0 = true, > > > + /* TODO Need to support TCON output muxing via GPIO pins */ > > > + .set_mux = sun8i_r40_tcon_tv_set_mux, > > > > What is this muking about? And why is it a TODO? > > Muxing similar like how TCON TOP handle TV0, TV1 I have reused the > same so-that it would configure de port selection via > sun8i_tcon_top_de_config > > TCON output muxing have gpio with GPIOD and GPIOH bits, which select > which of LCD or TV TCON outputs to the LCD function pins. I have > marked these has TODO for further support as mentioned by Chen-Yu in > v1[1]. It should be in the commit log. What's the plan to support that when needed? And that means that the LCD and TV outputs are mutually exclusive? We should at the very least check that both aren't enabled at the same time. Maxime
On Thu, Jan 2, 2020 at 9:17 PM Maxime Ripard <mripard@kernel.org> wrote: > > On Thu, Jan 02, 2020 at 09:10:31PM +0530, Jagan Teki wrote: > > On Thu, Jan 2, 2020 at 4:24 PM Maxime Ripard <mripard@kernel.org> wrote: > > > > > > On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote: > > > > TCON LCD0, LCD1 in allwinner R40, are used for managing > > > > LCD interfaces like RGB, LVDS and DSI. > > > > > > > > Like TCON TV0, TV1 these LCD0, LCD1 are also managed via > > > > tcon top. > > > > > > > > Add support for it, in tcon driver. > > > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > --- > > > > Changes for v3: > > > > - none > > > > > > > > drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 ++++++++ > > > > 1 file changed, 8 insertions(+) > > > > > > > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > > index fad72799b8df..69611d38c844 100644 > > > > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > > @@ -1470,6 +1470,13 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { > > > > .has_channel_1 = true, > > > > }; > > > > > > > > +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { > > > > + .supports_lvds = true, > > > > + .has_channel_0 = true, > > > > + /* TODO Need to support TCON output muxing via GPIO pins */ > > > > + .set_mux = sun8i_r40_tcon_tv_set_mux, > > > > > > What is this muking about? And why is it a TODO? > > > > Muxing similar like how TCON TOP handle TV0, TV1 I have reused the > > same so-that it would configure de port selection via > > sun8i_tcon_top_de_config > > > > TCON output muxing have gpio with GPIOD and GPIOH bits, which select > > which of LCD or TV TCON outputs to the LCD function pins. I have > > marked these has TODO for further support as mentioned by Chen-Yu in > > v1[1]. > > It should be in the commit log. Make sense. > > What's the plan to support that when needed? And that means that the > LCD and TV outputs are mutually exclusive? We should at the very least > check that both aren't enabled at the same time. Yes, LCD or TV within the outselect seems to be mutually exclusive. Like LCD0 or TV0 can output to GPIOD incase of TV0_OUTSEL and LCD1 or TV1 can output to GPIOH incase of TV1_OUTSEL. I think checking them before configuring TCON_TOP_PORT_SEL_REG would make sense, let me know if you have any suggestions?
Hi, On Thu, Jan 02, 2020 at 10:04:40PM +0530, Jagan Teki wrote: > On Thu, Jan 2, 2020 at 9:17 PM Maxime Ripard <mripard@kernel.org> wrote: > > > > On Thu, Jan 02, 2020 at 09:10:31PM +0530, Jagan Teki wrote: > > > On Thu, Jan 2, 2020 at 4:24 PM Maxime Ripard <mripard@kernel.org> wrote: > > > > > > > > On Tue, Dec 31, 2019 at 06:35:21PM +0530, Jagan Teki wrote: > > > > > TCON LCD0, LCD1 in allwinner R40, are used for managing > > > > > LCD interfaces like RGB, LVDS and DSI. > > > > > > > > > > Like TCON TV0, TV1 these LCD0, LCD1 are also managed via > > > > > tcon top. > > > > > > > > > > Add support for it, in tcon driver. > > > > > > > > > > Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> > > > > > --- > > > > > Changes for v3: > > > > > - none > > > > > > > > > > drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 ++++++++ > > > > > 1 file changed, 8 insertions(+) > > > > > > > > > > diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > > > index fad72799b8df..69611d38c844 100644 > > > > > --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > > > +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c > > > > > @@ -1470,6 +1470,13 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { > > > > > .has_channel_1 = true, > > > > > }; > > > > > > > > > > +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { > > > > > + .supports_lvds = true, > > > > > + .has_channel_0 = true, > > > > > + /* TODO Need to support TCON output muxing via GPIO pins */ > > > > > + .set_mux = sun8i_r40_tcon_tv_set_mux, > > > > > > > > What is this muking about? And why is it a TODO? > > > > > > Muxing similar like how TCON TOP handle TV0, TV1 I have reused the > > > same so-that it would configure de port selection via > > > sun8i_tcon_top_de_config > > > > > > TCON output muxing have gpio with GPIOD and GPIOH bits, which select > > > which of LCD or TV TCON outputs to the LCD function pins. I have > > > marked these has TODO for further support as mentioned by Chen-Yu in > > > v1[1]. > > > > It should be in the commit log. > > Make sense. > > > What's the plan to support that when needed? And that means that the > > LCD and TV outputs are mutually exclusive? We should at the very least > > check that both aren't enabled at the same time. > > Yes, LCD or TV within the outselect seems to be mutually exclusive. > Like LCD0 or TV0 can output to GPIOD incase of TV0_OUTSEL and LCD1 or > TV1 can output to GPIOH incase of TV1_OUTSEL. I think checking them > before configuring TCON_TOP_PORT_SEL_REG would make sense, let me know > if you have any suggestions? Making sure in atomic_check that TV and LCD are not used at the same time, and then in encoders mode_set / enable mux the pins to our encoders would be my first guess. Maxime
diff --git a/drivers/gpu/drm/sun4i/sun4i_tcon.c b/drivers/gpu/drm/sun4i/sun4i_tcon.c index fad72799b8df..69611d38c844 100644 --- a/drivers/gpu/drm/sun4i/sun4i_tcon.c +++ b/drivers/gpu/drm/sun4i/sun4i_tcon.c @@ -1470,6 +1470,13 @@ static const struct sun4i_tcon_quirks sun8i_a83t_tv_quirks = { .has_channel_1 = true, }; +static const struct sun4i_tcon_quirks sun8i_r40_lcd_quirks = { + .supports_lvds = true, + .has_channel_0 = true, + /* TODO Need to support TCON output muxing via GPIO pins */ + .set_mux = sun8i_r40_tcon_tv_set_mux, +}; + static const struct sun4i_tcon_quirks sun8i_r40_tv_quirks = { .has_channel_1 = true, .set_mux = sun8i_r40_tcon_tv_set_mux, @@ -1500,6 +1507,7 @@ const struct of_device_id sun4i_tcon_of_table[] = { { .compatible = "allwinner,sun8i-a33-tcon", .data = &sun8i_a33_quirks }, { .compatible = "allwinner,sun8i-a83t-tcon-lcd", .data = &sun8i_a83t_lcd_quirks }, { .compatible = "allwinner,sun8i-a83t-tcon-tv", .data = &sun8i_a83t_tv_quirks }, + { .compatible = "allwinner,sun8i-r40-tcon-lcd", .data = &sun8i_r40_lcd_quirks }, { .compatible = "allwinner,sun8i-r40-tcon-tv", .data = &sun8i_r40_tv_quirks }, { .compatible = "allwinner,sun8i-v3s-tcon", .data = &sun8i_v3s_quirks }, { .compatible = "allwinner,sun9i-a80-tcon-lcd", .data = &sun9i_a80_tcon_lcd_quirks },
TCON LCD0, LCD1 in allwinner R40, are used for managing LCD interfaces like RGB, LVDS and DSI. Like TCON TV0, TV1 these LCD0, LCD1 are also managed via tcon top. Add support for it, in tcon driver. Signed-off-by: Jagan Teki <jagan@amarulasolutions.com> --- Changes for v3: - none drivers/gpu/drm/sun4i/sun4i_tcon.c | 8 ++++++++ 1 file changed, 8 insertions(+)