From patchwork Thu Jan 2 13:18:34 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Tero Kristo X-Patchwork-Id: 11315743 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 1D132138C for ; Thu, 2 Jan 2020 13:19:53 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id EFC83217F4 for ; Thu, 2 Jan 2020 13:19:52 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=ti.com header.i=@ti.com header.b="beXjmNeu" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728372AbgABNTD (ORCPT ); Thu, 2 Jan 2020 08:19:03 -0500 Received: from fllv0015.ext.ti.com ([198.47.19.141]:42496 "EHLO fllv0015.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728322AbgABNTC (ORCPT ); Thu, 2 Jan 2020 08:19:02 -0500 Received: from lelv0266.itg.ti.com ([10.180.67.225]) by fllv0015.ext.ti.com (8.15.2/8.15.2) with ESMTP id 002DJ1Tv071298; Thu, 2 Jan 2020 07:19:01 -0600 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=ti-com-17Q1; t=1577971141; bh=BR4PAIcpmHx9g7zVc94xdqy8zyCRYNIxcOJ0fICO6ew=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=beXjmNeuUUsNU3OjVHMwsPY6R04p6ZUh5tT3pFHOzE1VWYO4UN5fSDi8loLjx41ED Ca60DgK6X7P3ZSxrnsXNi0PBroyX1HcgTDXlyHBlQ4fqqt0lM3KARV2od2XwsJOse8 QX8H0Ep8uZwBaLRqulLG9ZCn1QH5EpFQ0WuS3Gy8= Received: from DFLE107.ent.ti.com (dfle107.ent.ti.com [10.64.6.28]) by lelv0266.itg.ti.com (8.15.2/8.15.2) with ESMTPS id 002DJ1Xt034992 (version=TLSv1.2 cipher=AES256-GCM-SHA384 bits=256 verify=FAIL); Thu, 2 Jan 2020 07:19:01 -0600 Received: from DFLE101.ent.ti.com (10.64.6.22) by DFLE107.ent.ti.com (10.64.6.28) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3; Thu, 2 Jan 2020 07:19:00 -0600 Received: from fllv0039.itg.ti.com (10.64.41.19) by DFLE101.ent.ti.com (10.64.6.22) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_CBC_SHA256_P256) id 15.1.1847.3 via Frontend Transport; Thu, 2 Jan 2020 07:19:00 -0600 Received: from sokoban.bb.dnainternet.fi (ileax41-snat.itg.ti.com [10.172.224.153]) by fllv0039.itg.ti.com (8.15.2/8.15.2) with ESMTP id 002DIp3U075354; Thu, 2 Jan 2020 07:18:58 -0600 From: Tero Kristo To: , , CC: , , , , Tero Kristo Subject: [PATCHv4 03/14] remoteproc/omap: Add a sanity check for DSP boot address alignment Date: Thu, 2 Jan 2020 15:18:34 +0200 Message-ID: <20200102131845.12992-4-t-kristo@ti.com> X-Mailer: git-send-email 2.17.1 In-Reply-To: <20200102131845.12992-1-t-kristo@ti.com> References: <20200102131845.12992-1-t-kristo@ti.com> MIME-Version: 1.0 X-EXCLAIMER-MD-CONFIG: e1e8a2fd-e40a-4ac6-ac9b-f7e9cc9ee180 Sender: linux-omap-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-omap@vger.kernel.org From: Suman Anna The DSP remote processors on OMAP SoCs require a boot register to be programmed with a boot address, and this boot address needs to be on a 1KB boundary. The current code is simply masking the boot address appropriately without performing any sanity checks before releasing the resets. An unaligned boot address results in an undefined execution behavior and can result in various bus errors like MMU Faults or L3 NoC errors. Such errors are hard to debug and can be easily avoided by adding a sanity check for the alignment before booting a DSP remote processor. Signed-off-by: Suman Anna Signed-off-by: Tero Kristo Reviewed-by: Bjorn Andersson --- drivers/remoteproc/omap_remoteproc.c | 18 +++++++++++++++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/drivers/remoteproc/omap_remoteproc.c b/drivers/remoteproc/omap_remoteproc.c index fb4902e4dacf..557c439571c1 100644 --- a/drivers/remoteproc/omap_remoteproc.c +++ b/drivers/remoteproc/omap_remoteproc.c @@ -122,13 +122,22 @@ static void omap_rproc_kick(struct rproc *rproc, int vqid) * * Set boot address for a supported DSP remote processor. */ -static void omap_rproc_write_dsp_boot_addr(struct rproc *rproc) +static int omap_rproc_write_dsp_boot_addr(struct rproc *rproc) { + struct device *dev = rproc->dev.parent; struct omap_rproc *oproc = rproc->priv; struct omap_rproc_boot_data *bdata = oproc->boot_data; u32 offset = bdata->boot_reg; + if (rproc->bootaddr & (SZ_1K - 1)) { + dev_err(dev, "invalid boot address 0x%x, must be aligned on a 1KB boundary\n", + rproc->bootaddr); + return -EINVAL; + } + regmap_write(bdata->syscon, offset, rproc->bootaddr); + + return 0; } /* @@ -145,8 +154,11 @@ static int omap_rproc_start(struct rproc *rproc) int ret; struct mbox_client *client = &oproc->client; - if (oproc->boot_data) - omap_rproc_write_dsp_boot_addr(rproc); + if (oproc->boot_data) { + ret = omap_rproc_write_dsp_boot_addr(rproc); + if (ret) + return ret; + } client->dev = dev; client->tx_done = NULL;