| Message ID | 20200102231435.21703-3-f.fainelli@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | reset: Add Broadcom STB RESCAL reset controller | expand |
On 1/2/20 3:14 PM, Florian Fainelli wrote: > From: Jim Quinlan <jim2101024@gmail.com> > > On BCM7216 there is a special purpose reset controller named RESCAL > (reset calibration) which is necessary for SATA and PCIe0/1 to operate > correctly. This commit adds support for such a reset controller to be > available. > > Signed-off-by: Jim Quinlan <im2101024@gmail.com> Doh, there is a typo for Jim's email, I will wait for your feedback before submitting a v3 with that (and possibly other things) corrected.
Hi Florian, just a few small nitpicks: On Thu, 2020-01-02 at 15:14 -0800, Florian Fainelli wrote: > From: Jim Quinlan <jim2101024@gmail.com> > > On BCM7216 there is a special purpose reset controller named RESCAL > (reset calibration) which is necessary for SATA and PCIe0/1 to operate > correctly. This commit adds support for such a reset controller to be > available. > > Signed-off-by: Jim Quinlan <im2101024@gmail.com> > Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> > --- > drivers/reset/Kconfig | 7 ++ > drivers/reset/Makefile | 1 + > drivers/reset/reset-brcmstb-rescal.c | 110 +++++++++++++++++++++++++++ > 3 files changed, 118 insertions(+) > create mode 100644 drivers/reset/reset-brcmstb-rescal.c > > diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig > index 12f5c897788d..b7cc0a2049d9 100644 > --- a/drivers/reset/Kconfig > +++ b/drivers/reset/Kconfig > @@ -49,6 +49,13 @@ config RESET_BRCMSTB > This enables the reset controller driver for Broadcom STB SoCs using > a SUN_TOP_CTRL_SW_INIT style controller. > > +config RESET_BRCMSTB_RESCAL > + bool "Broadcom STB RESCAL reset controller" > + default ARCH_BRCMSTB || COMPILE_TEST > + help > + This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on > + BCM7216. > + > config RESET_HSDK > bool "Synopsys HSDK Reset Driver" > depends on HAS_IOMEM > diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile > index 00767c03f5f2..1e4291185c52 100644 > --- a/drivers/reset/Makefile > +++ b/drivers/reset/Makefile > @@ -8,6 +8,7 @@ obj-$(CONFIG_RESET_ATH79) += reset-ath79.o > obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o > obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o > obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o > +obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o > obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o > obj-$(CONFIG_RESET_IMX7) += reset-imx7.o > obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o > diff --git a/drivers/reset/reset-brcmstb-rescal.c b/drivers/reset/reset-brcmstb-rescal.c > new file mode 100644 > index 000000000000..e1c038e62855 > --- /dev/null > +++ b/drivers/reset/reset-brcmstb-rescal.c > @@ -0,0 +1,110 @@ > +// SPDX-License-Identifier: GPL-2.0 > +/* Copyright (C) 2018-2020 Broadcom */ > + > +#include <linux/device.h> > +#include <linux/iopoll.h> > +#include <linux/module.h> > +#include <linux/of.h> > +#include <linux/platform_device.h> > +#include <linux/reset-controller.h> > + > +#define BRCM_RESCAL_START 0x0 > +#define BRCM_RESCAL_START_BIT BIT(0) > +#define BRCM_RESCAL_CTRL 0x4 > +#define BRCM_RESCAL_STATUS 0x8 > +#define BRCM_RESCAL_STATUS_BIT BIT(0) > + > +struct brcm_rescal_reset { > + void __iomem *base; You could replace the tab before *base with a space for consistency. > + struct device *dev; > + struct reset_controller_dev rcdev; > +}; > + > +static int brcm_rescal_reset_set(struct reset_controller_dev *rcdev, > + unsigned long id) > +{ > + struct brcm_rescal_reset *data = > + container_of(rcdev, struct brcm_rescal_reset, rcdev); > + void __iomem *base = data->base; > + u32 reg; > + int ret; > + > + reg = readl(base + BRCM_RESCAL_START); > + writel(reg | BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); > + reg = readl(base + BRCM_RESCAL_START); > + if (!(reg & BRCM_RESCAL_START_BIT)) { > + dev_err(data->dev, "failed to start SATA/PCIe rescal\n"); > + return -EIO; > + } > + > + ret = readl_poll_timeout(base + BRCM_RESCAL_STATUS, reg, > + !(reg & BRCM_RESCAL_STATUS_BIT), 100, 1000); > + if (ret) { > + dev_err(data->dev, "time out on SATA/PCIe rescal\n"); > + return -ETIMEDOUT; Just return ret here, readl_poll_timeout() already returns -ETIMEDOUT. > + } > + > + reg = readl(base + BRCM_RESCAL_START); > + writel(reg & ~BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); > + (void)readl(base + BRCM_RESCAL_START); Is this final read actually necessary (if so, why)? > + > + dev_dbg(data->dev, "SATA/PCIe rescal success\n"); > + > + return 0; > +} > + > +static int brcm_rescal_reset_xlate(struct reset_controller_dev *rcdev, > + const struct of_phandle_args *reset_spec) > +{ > + /* This is needed if #reset-cells == 0. */ > + return 0; > +} > + > +static const struct reset_control_ops brcm_rescal_reset_ops = { > + .reset = brcm_rescal_reset_set, > +}; > + > +static int brcm_rescal_reset_probe(struct platform_device *pdev) > +{ > + struct brcm_rescal_reset *data; > + struct resource *res; > + > + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); > + if (!data) > + return -ENOMEM; > + > + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); > + data->base = devm_ioremap_resource(&pdev->dev, res); > + if (IS_ERR(data->base)) > + return PTR_ERR(data->base); > + > + platform_set_drvdata(pdev, data); This can be dropped. regards Philipp
diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig index 12f5c897788d..b7cc0a2049d9 100644 --- a/drivers/reset/Kconfig +++ b/drivers/reset/Kconfig @@ -49,6 +49,13 @@ config RESET_BRCMSTB This enables the reset controller driver for Broadcom STB SoCs using a SUN_TOP_CTRL_SW_INIT style controller. +config RESET_BRCMSTB_RESCAL + bool "Broadcom STB RESCAL reset controller" + default ARCH_BRCMSTB || COMPILE_TEST + help + This enables the RESCAL reset controller for SATA, PCIe0, or PCIe1 on + BCM7216. + config RESET_HSDK bool "Synopsys HSDK Reset Driver" depends on HAS_IOMEM diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile index 00767c03f5f2..1e4291185c52 100644 --- a/drivers/reset/Makefile +++ b/drivers/reset/Makefile @@ -8,6 +8,7 @@ obj-$(CONFIG_RESET_ATH79) += reset-ath79.o obj-$(CONFIG_RESET_AXS10X) += reset-axs10x.o obj-$(CONFIG_RESET_BERLIN) += reset-berlin.o obj-$(CONFIG_RESET_BRCMSTB) += reset-brcmstb.o +obj-$(CONFIG_RESET_BRCMSTB_RESCAL) += reset-brcmstb-rescal.o obj-$(CONFIG_RESET_HSDK) += reset-hsdk.o obj-$(CONFIG_RESET_IMX7) += reset-imx7.o obj-$(CONFIG_RESET_LANTIQ) += reset-lantiq.o diff --git a/drivers/reset/reset-brcmstb-rescal.c b/drivers/reset/reset-brcmstb-rescal.c new file mode 100644 index 000000000000..e1c038e62855 --- /dev/null +++ b/drivers/reset/reset-brcmstb-rescal.c @@ -0,0 +1,110 @@ +// SPDX-License-Identifier: GPL-2.0 +/* Copyright (C) 2018-2020 Broadcom */ + +#include <linux/device.h> +#include <linux/iopoll.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/platform_device.h> +#include <linux/reset-controller.h> + +#define BRCM_RESCAL_START 0x0 +#define BRCM_RESCAL_START_BIT BIT(0) +#define BRCM_RESCAL_CTRL 0x4 +#define BRCM_RESCAL_STATUS 0x8 +#define BRCM_RESCAL_STATUS_BIT BIT(0) + +struct brcm_rescal_reset { + void __iomem *base; + struct device *dev; + struct reset_controller_dev rcdev; +}; + +static int brcm_rescal_reset_set(struct reset_controller_dev *rcdev, + unsigned long id) +{ + struct brcm_rescal_reset *data = + container_of(rcdev, struct brcm_rescal_reset, rcdev); + void __iomem *base = data->base; + u32 reg; + int ret; + + reg = readl(base + BRCM_RESCAL_START); + writel(reg | BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); + reg = readl(base + BRCM_RESCAL_START); + if (!(reg & BRCM_RESCAL_START_BIT)) { + dev_err(data->dev, "failed to start SATA/PCIe rescal\n"); + return -EIO; + } + + ret = readl_poll_timeout(base + BRCM_RESCAL_STATUS, reg, + !(reg & BRCM_RESCAL_STATUS_BIT), 100, 1000); + if (ret) { + dev_err(data->dev, "time out on SATA/PCIe rescal\n"); + return -ETIMEDOUT; + } + + reg = readl(base + BRCM_RESCAL_START); + writel(reg & ~BRCM_RESCAL_START_BIT, base + BRCM_RESCAL_START); + (void)readl(base + BRCM_RESCAL_START); + + dev_dbg(data->dev, "SATA/PCIe rescal success\n"); + + return 0; +} + +static int brcm_rescal_reset_xlate(struct reset_controller_dev *rcdev, + const struct of_phandle_args *reset_spec) +{ + /* This is needed if #reset-cells == 0. */ + return 0; +} + +static const struct reset_control_ops brcm_rescal_reset_ops = { + .reset = brcm_rescal_reset_set, +}; + +static int brcm_rescal_reset_probe(struct platform_device *pdev) +{ + struct brcm_rescal_reset *data; + struct resource *res; + + data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); + if (!data) + return -ENOMEM; + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + data->base = devm_ioremap_resource(&pdev->dev, res); + if (IS_ERR(data->base)) + return PTR_ERR(data->base); + + platform_set_drvdata(pdev, data); + + data->rcdev.owner = THIS_MODULE; + data->rcdev.nr_resets = 1; + data->rcdev.ops = &brcm_rescal_reset_ops; + data->rcdev.of_node = pdev->dev.of_node; + data->rcdev.of_xlate = brcm_rescal_reset_xlate; + data->dev = &pdev->dev; + + return devm_reset_controller_register(&pdev->dev, &data->rcdev); +} + +static const struct of_device_id brcm_rescal_reset_of_match[] = { + { .compatible = "brcm,bcm7216-pcie-sata-rescal" }, + { }, +}; +MODULE_DEVICE_TABLE(of, brcm_rescal_reset_of_match); + +static struct platform_driver brcm_rescal_reset_driver = { + .probe = brcm_rescal_reset_probe, + .driver = { + .name = "brcm-rescal-reset", + .of_match_table = brcm_rescal_reset_of_match, + } +}; +module_platform_driver(brcm_rescal_reset_driver); + +MODULE_AUTHOR("Broadcom"); +MODULE_DESCRIPTION("Broadcom SATA/PCIe rescal reset controller"); +MODULE_LICENSE("GPL v2");