[v2,01/10] ppc: Drop PPC_EMULATE_32BITS_HYPV stub
diff mbox series

Message ID 20200107044827.471355-2-david@gibson.dropbear.id.au
State New
Headers show
Series
  • target/ppc: Correct some errors with real mode handling
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Commit Message

David Gibson Jan. 7, 2020, 4:48 a.m. UTC
The only effect of the PPC_EMULATE_32BITS_HYPV define is to change how
MSR_HVB is defined.  This appears to be something to handle hypervisor mode
for 32-bit CPUs, but there's really no other code to handle this.  The
MSR_THV bit, which it uses is implemented for no cpus we model.

It's unlikely anyone is going to implement this any time soon, so just drop
it.

Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
---
 target/ppc/cpu.h | 7 -------
 1 file changed, 7 deletions(-)

Comments

Cédric Le Goater Jan. 7, 2020, 12:52 p.m. UTC | #1
On 1/7/20 5:48 AM, David Gibson wrote:
> The only effect of the PPC_EMULATE_32BITS_HYPV define is to change how
> MSR_HVB is defined.  This appears to be something to handle hypervisor mode
> for 32-bit CPUs, but there's really no other code to handle this.  The
> MSR_THV bit, which it uses is implemented for no cpus we model.
> 
> It's unlikely anyone is going to implement this any time soon, so just drop
> it.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

Reviewed-by: Cédric Le Goater <clg@kaod.org>

> ---
>  target/ppc/cpu.h | 7 -------
>  1 file changed, 7 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 103bfe9dc2..2de9e2fa2b 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -26,8 +26,6 @@
>  #include "exec/cpu-defs.h"
>  #include "cpu-qom.h"
>  
> -/* #define PPC_EMULATE_32BITS_HYPV */
> -
>  #define TCG_GUEST_DEFAULT_MO 0
>  
>  #define TARGET_PAGE_BITS_64K 16

btw, this define ^ is unused.

> @@ -450,14 +448,9 @@ typedef struct ppc_v3_pate_t {
>  #define MSR_HVB (1ULL << MSR_SHV)
>  #define msr_hv  msr_shv
>  #else
> -#if defined(PPC_EMULATE_32BITS_HYPV)
> -#define MSR_HVB (1ULL << MSR_THV)
> -#define msr_hv  msr_thv
> -#else
>  #define MSR_HVB (0ULL)
>  #define msr_hv  (0)
>  #endif
> -#endif
>  
>  /* DSISR */
>  #define DSISR_NOPTE              0x40000000
>
Greg Kurz Jan. 7, 2020, 5:05 p.m. UTC | #2
On Tue,  7 Jan 2020 15:48:18 +1100
David Gibson <david@gibson.dropbear.id.au> wrote:

> The only effect of the PPC_EMULATE_32BITS_HYPV define is to change how
> MSR_HVB is defined.  This appears to be something to handle hypervisor mode
> for 32-bit CPUs, but there's really no other code to handle this.  The
> MSR_THV bit, which it uses is implemented for no cpus we model.
> 
> It's unlikely anyone is going to implement this any time soon, so just drop
> it.
> 
> Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
> ---
>  target/ppc/cpu.h | 7 -------
>  1 file changed, 7 deletions(-)
> 
> diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
> index 103bfe9dc2..2de9e2fa2b 100644
> --- a/target/ppc/cpu.h
> +++ b/target/ppc/cpu.h
> @@ -26,8 +26,6 @@
>  #include "exec/cpu-defs.h"
>  #include "cpu-qom.h"
>  
> -/* #define PPC_EMULATE_32BITS_HYPV */
> -
>  #define TCG_GUEST_DEFAULT_MO 0
>  
>  #define TARGET_PAGE_BITS_64K 16
> @@ -450,14 +448,9 @@ typedef struct ppc_v3_pate_t {
>  #define MSR_HVB (1ULL << MSR_SHV)
>  #define msr_hv  msr_shv
>  #else
> -#if defined(PPC_EMULATE_32BITS_HYPV)
> -#define MSR_HVB (1ULL << MSR_THV)
> -#define msr_hv  msr_thv
> -#else

These lines come from commit a4f30719a8cd, which also introduced msr_thv
and msr_shv to differentiate the 32 and 64 bits HV mode. Maybe you can go
one step further: drop msr_thv and msr_shv and revert to msr_hv only, like
before a4f30719a8cd ?

>  #define MSR_HVB (0ULL)
>  #define msr_hv  (0)
>  #endif
> -#endif
>  
>  /* DSISR */
>  #define DSISR_NOPTE              0x40000000

Patch
diff mbox series

diff --git a/target/ppc/cpu.h b/target/ppc/cpu.h
index 103bfe9dc2..2de9e2fa2b 100644
--- a/target/ppc/cpu.h
+++ b/target/ppc/cpu.h
@@ -26,8 +26,6 @@ 
 #include "exec/cpu-defs.h"
 #include "cpu-qom.h"
 
-/* #define PPC_EMULATE_32BITS_HYPV */
-
 #define TCG_GUEST_DEFAULT_MO 0
 
 #define TARGET_PAGE_BITS_64K 16
@@ -450,14 +448,9 @@  typedef struct ppc_v3_pate_t {
 #define MSR_HVB (1ULL << MSR_SHV)
 #define msr_hv  msr_shv
 #else
-#if defined(PPC_EMULATE_32BITS_HYPV)
-#define MSR_HVB (1ULL << MSR_THV)
-#define msr_hv  msr_thv
-#else
 #define MSR_HVB (0ULL)
 #define msr_hv  (0)
 #endif
-#endif
 
 /* DSISR */
 #define DSISR_NOPTE              0x40000000