From patchwork Tue Jan 7 04:48:23 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: David Gibson X-Patchwork-Id: 11320405 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id BC565138D for ; Tue, 7 Jan 2020 05:05:56 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 878DC2075A for ; Tue, 7 Jan 2020 05:05:56 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=gibson.dropbear.id.au header.i=@gibson.dropbear.id.au header.b="Pk5WBMKv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 878DC2075A Authentication-Results: mail.kernel.org; dmarc=none (p=none dis=none) header.from=gibson.dropbear.id.au Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:42266 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1ioh3y-0003GG-Hu for patchwork-qemu-devel@patchwork.kernel.org; Tue, 07 Jan 2020 00:05:54 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:44235) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1iognO-0005Oy-Ld for qemu-devel@nongnu.org; Mon, 06 Jan 2020 23:48:47 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1iognM-0004iJ-VD for qemu-devel@nongnu.org; Mon, 06 Jan 2020 23:48:46 -0500 Received: from bilbo.ozlabs.org ([203.11.71.1]:49713 helo=ozlabs.org) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1iognM-0004dC-JH; Mon, 06 Jan 2020 23:48:44 -0500 Received: by ozlabs.org (Postfix, from userid 1007) id 47sKdY1Gx6z9sSK; Tue, 7 Jan 2020 15:48:32 +1100 (AEDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=gibson.dropbear.id.au; s=201602; t=1578372513; bh=1u/P2vH19t9mX7gOFadyrTySstHu9Bg7Wifev5EcSUA=; h=From:To:Cc:Subject:Date:In-Reply-To:References:From; b=Pk5WBMKvlzGQ1987yso+gX5SAEYld+VmOet6yS3585F1k8h4pk2dSZSAuf7q7YhTS G05cXSK5D5WQya3/Klwz/6sFnueCkVWQ6Ae487y9MZSmKHfqWTDg0z6VljwPPlLpZn LKsl7ClBwe3AAjZkzukZvGJNxoRfOrvRTnVj2D2o= From: David Gibson To: qemu-devel@nongnu.org, groug@kaod.org, philmd@redhat.com, clg@kaod.org Subject: [PATCH v2 06/10] target/ppc: Remove RMOR register from POWER9 & POWER10 Date: Tue, 7 Jan 2020 15:48:23 +1100 Message-Id: <20200107044827.471355-7-david@gibson.dropbear.id.au> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200107044827.471355-1-david@gibson.dropbear.id.au> References: <20200107044827.471355-1-david@gibson.dropbear.id.au> MIME-Version: 1.0 X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] [fuzzy] X-Received-From: 203.11.71.1 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: lvivier@redhat.com, aik@ozlabs.ru, Mark Cave-Ayland , qemu-ppc@nongnu.org, paulus@samba.org, David Gibson Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Currently we create the Real Mode Offset Register (RMOR) on all Book3S cpus from POWER7 onwards. However the translation mode which the RMOR controls is no longer supported in POWER9, and so the register has been removed from the architecture. Remove it from our model on POWER9 and POWER10. Signed-off-by: David Gibson Reviewed-by: Cédric Le Goater --- target/ppc/translate_init.inc.c | 10 ++++++++-- 1 file changed, 8 insertions(+), 2 deletions(-) diff --git a/target/ppc/translate_init.inc.c b/target/ppc/translate_init.inc.c index 436d0d5a51..893fb12e90 100644 --- a/target/ppc/translate_init.inc.c +++ b/target/ppc/translate_init.inc.c @@ -8003,12 +8003,16 @@ static void gen_spr_book3s_ids(CPUPPCState *env) SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); - spr_register_hv(env, SPR_RMOR, "RMOR", + spr_register_hv(env, SPR_HRMOR, "HRMOR", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, 0x00000000); - spr_register_hv(env, SPR_HRMOR, "HRMOR", +} + +static void gen_spr_rmor(CPUPPCState *env) +{ + spr_register_hv(env, SPR_RMOR, "RMOR", SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, SPR_NOACCESS, &spr_read_generic, &spr_write_generic, @@ -8522,6 +8526,7 @@ static void init_proc_POWER7(CPUPPCState *env) /* POWER7 Specific Registers */ gen_spr_book3s_ids(env); + gen_spr_rmor(env); gen_spr_amr(env); gen_spr_book3s_purr(env); gen_spr_power5p_common(env); @@ -8663,6 +8668,7 @@ static void init_proc_POWER8(CPUPPCState *env) /* POWER8 Specific Registers */ gen_spr_book3s_ids(env); + gen_spr_rmor(env); gen_spr_amr(env); gen_spr_iamr(env); gen_spr_book3s_purr(env);