Message ID | 20200109031516.29639-1-greentime.hu@sifive.com (mailing list archive) |
---|---|
State | Superseded, archived |
Headers | show |
Series | [v3] riscv: make sure the cores stay looping in .Lsecondary_park | expand |
On Thu, 9 Jan 2020, Greentime Hu wrote: > The code in secondary_park is currently placed in the .init section. The > kernel reclaims and clears this code when it finishes booting. That > causes the cores parked in it to go to somewhere unpredictable, so we > move this function out of init to make sure the cores stay looping there. > > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > Reviewed-by: Anup Patel <anup@brainfault.org> Thanks, the following is what's been queued for v5.5-rc. - Paul From: Greentime Hu <greentime.hu@sifive.com> Date: Thu, 9 Jan 2020 11:15:16 +0800 Subject: [PATCH] riscv: make sure the cores stay looping in .Lsecondary_park The code in secondary_park is currently placed in the .init section. The kernel reclaims and clears this code when it finishes booting. That causes the cores parked in it to go to somewhere unpredictable, so we move this function out of init to make sure the cores stay looping there. Signed-off-by: Greentime Hu <greentime.hu@sifive.com> Reviewed-by: Anup Patel <anup@brainfault.org> Cc: Andreas Schwab <schwab@suse.de> Cc: stable@vger.kernel.org Fixes: 76d2a0493a17d ("RISC-V: Init and Halt Code") Signed-off-by: Paul Walmsley <paul.walmsley@sifive.com> --- arch/riscv/kernel/head.S | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-) diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index 797802c73dee..c9cc44ef7184 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -209,11 +209,6 @@ relocate: tail smp_callin #endif -.align 2 -.Lsecondary_park: - /* We lack SMP support or have too many harts, so park this hart */ - wfi - j .Lsecondary_park END(_start) #ifdef CONFIG_RISCV_M_MODE @@ -295,6 +290,13 @@ ENTRY(reset_regs) END(reset_regs) #endif /* CONFIG_RISCV_M_MODE */ +.section ".text", "ax",@progbits +.align 2 +.Lsecondary_park: + /* We lack SMP support or have too many harts, so park this hart */ + wfi + j .Lsecondary_park + __PAGE_ALIGNED_BSS /* Empty zero page */ .balign PAGE_SIZE
Hi Greentime, On Thu, 9 Jan 2020, Paul Walmsley wrote: > On Thu, 9 Jan 2020, Greentime Hu wrote: > > > The code in secondary_park is currently placed in the .init section. The > > kernel reclaims and clears this code when it finishes booting. That > > causes the cores parked in it to go to somewhere unpredictable, so we > > move this function out of init to make sure the cores stay looping there. > > > > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > > Reviewed-by: Anup Patel <anup@brainfault.org> > > Thanks, the following is what's been queued for v5.5-rc. During final testing, when building the kernel with an initramfs, I hit the following linker error: LD .tmp_vmlinux1 arch/riscv/kernel/head.o: in function `.L0 ':(.init.text+0x5c): relocation truncated to fit: R_RISCV_JAL against `.Lsecondary_park' make[1]: *** [Makefile:1079: vmlinux] Error 1 make: *** [Makefile:326: __build_one_by_one] Error 2 Could you take a look at this? thanks, - Paul
Hi Paul, On Mon, Jan 13, 2020 at 2:12 AM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > Hi Greentime, > > On Thu, 9 Jan 2020, Paul Walmsley wrote: > > > On Thu, 9 Jan 2020, Greentime Hu wrote: > > > > > The code in secondary_park is currently placed in the .init section. The > > > kernel reclaims and clears this code when it finishes booting. That > > > causes the cores parked in it to go to somewhere unpredictable, so we > > > move this function out of init to make sure the cores stay looping there. > > > > > > Signed-off-by: Greentime Hu <greentime.hu@sifive.com> > > > Reviewed-by: Anup Patel <anup@brainfault.org> > > > > Thanks, the following is what's been queued for v5.5-rc. > > During final testing, when building the kernel with an initramfs, I hit > the following linker error: > > LD .tmp_vmlinux1 > arch/riscv/kernel/head.o: in function `.L0 ':(.init.text+0x5c): relocation truncated to fit: R_RISCV_JAL against `.Lsecondary_park' > make[1]: *** [Makefile:1079: vmlinux] Error 1 > make: *** [Makefile:326: __build_one_by_one] Error 2 > > Could you take a look at this? I think it is because the sections are too far for bqeu to jump and the config I used just small enough for it to jump so I didn't see this bug. Sorry about that. I tried this fix to boot in Unleashed board. #ifdef CONFIG_SMP li t0, CONFIG_NR_CPUS - bgeu a0, t0, .Lsecondary_park + blt a0, t0, .Lgood_cores + tail .Lsecondary_park +.Lgood_cores: #endif
Hi Greentime, On Tue, 14 Jan 2020, Greentime Hu wrote: > I think it is because the sections are too far for bqeu to jump and > the config I used just small enough for it to jump so I didn't see > this bug. Sorry about that. No problem. > I tried this fix to boot in Unleashed board. > > #ifdef CONFIG_SMP > li t0, CONFIG_NR_CPUS > - bgeu a0, t0, .Lsecondary_park > + blt a0, t0, .Lgood_cores > + tail .Lsecondary_park > +.Lgood_cores: > #endif Looks reasonable to me. Care to update and repost the patch? - Paul
On Wed, Jan 15, 2020 at 6:55 AM Paul Walmsley <paul.walmsley@sifive.com> wrote: > > Hi Greentime, > > On Tue, 14 Jan 2020, Greentime Hu wrote: > > > I think it is because the sections are too far for bqeu to jump and > > the config I used just small enough for it to jump so I didn't see > > this bug. Sorry about that. > > No problem. > > > I tried this fix to boot in Unleashed board. > > > > #ifdef CONFIG_SMP > > li t0, CONFIG_NR_CPUS > > - bgeu a0, t0, .Lsecondary_park > > + blt a0, t0, .Lgood_cores > > + tail .Lsecondary_park > > +.Lgood_cores: > > #endif > > Looks reasonable to me. Care to update and repost the patch? Yes, Paul. I have sent the v4 patch. It is tested in Unleashed board.
diff --git a/arch/riscv/kernel/head.S b/arch/riscv/kernel/head.S index f8f996916c5b..276b98f9d0bd 100644 --- a/arch/riscv/kernel/head.S +++ b/arch/riscv/kernel/head.S @@ -217,11 +217,6 @@ relocate: tail smp_callin #endif -.align 2 -.Lsecondary_park: - /* We lack SMP support or have too many harts, so park this hart */ - wfi - j .Lsecondary_park END(_start) #ifdef CONFIG_RISCV_M_MODE @@ -303,6 +298,13 @@ ENTRY(reset_regs) END(reset_regs) #endif /* CONFIG_RISCV_M_MODE */ +.section ".text", "ax",@progbits +.align 2 +.Lsecondary_park: + /* We lack SMP support or have too many harts, so park this hart */ + wfi + j .Lsecondary_park + __PAGE_ALIGNED_BSS /* Empty zero page */ .balign PAGE_SIZE