Message ID | 1578629120-25793-2-git-send-email-Anson.Huang@nxp.com (mailing list archive) |
---|---|
State | New, archived |
Headers | show |
Series | [V2,1/3] dt-bindings: pinctrl: Convert i.MX8MQ to json-schema | expand |
On Fri, Jan 10, 2020 at 12:05:19PM +0800, Anson Huang wrote: > Convert the i.MX8MM pinctrl binding to DT schema format using json-schema > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > --- > Changes since V1: > - use "grp$" instead of "-grp$"; > - use space instead of tab for "ref$"; > - add missed "reg" property; > - remove the "maxItem" for "fsl,pins" to avoid build warning, as the item number is changable. > --- > .../bindings/pinctrl/fsl,imx8mm-pinctrl.txt | 36 ----------- > .../bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 69 ++++++++++++++++++++++ > 2 files changed, 69 insertions(+), 36 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > deleted file mode 100644 > index e4e01c0..0000000 > --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > +++ /dev/null > @@ -1,36 +0,0 @@ > -* Freescale IMX8MM IOMUX Controller > - > -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory > -for common binding part and usage. > - > -Required properties: > -- compatible: "fsl,imx8mm-iomuxc" > -- reg: should contain the base physical address and size of the iomuxc > - registers. > - > -Required properties in sub-nodes: > -- fsl,pins: each entry consists of 6 integers and represents the mux and config > - setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val > - input_val> are specified using a PIN_FUNC_ID macro, which can be found in > - <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer CONFIG is > - the pad setting value like pull-up on this pin. Please refer to i.MX8M Mini > - Reference Manual for detailed CONFIG settings. > - > -Examples: > - > -&uart1 { > - pinctrl-names = "default"; > - pinctrl-0 = <&pinctrl_uart1>; > -}; > - > -iomuxc: pinctrl@30330000 { > - compatible = "fsl,imx8mm-iomuxc"; > - reg = <0x0 0x30330000 0x0 0x10000>; > - > - pinctrl_uart1: uart1grp { > - fsl,pins = < > - MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 > - MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 > - >; > - }; > -}; > diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > new file mode 100644 > index 0000000..a3c4275 > --- /dev/null > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: GPL-2.0-or-later Sorry, one other thing. You're good with GPLv9? Plus this is a license change. Do you have rights to do so as some of this comes from the old binding doc? If you do, then make it: (GPL-2.0-only OR BSD-2-Clause) Rob
Hi, Rob > Subject: Re: [PATCH V2 2/3] dt-bindings: pinctrl: Convert i.MX8MM to json- > schema > > On Fri, Jan 10, 2020 at 12:05:19PM +0800, Anson Huang wrote: > > Convert the i.MX8MM pinctrl binding to DT schema format using > > json-schema > > > > Signed-off-by: Anson Huang <Anson.Huang@nxp.com> > > --- > > Changes since V1: > > - use "grp$" instead of "-grp$"; > > - use space instead of tab for "ref$"; > > - add missed "reg" property; > > - remove the "maxItem" for "fsl,pins" to avoid build warning, as the > item number is changable. > > --- > > .../bindings/pinctrl/fsl,imx8mm-pinctrl.txt | 36 ----------- > > .../bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 69 > ++++++++++++++++++++++ > > 2 files changed, 69 insertions(+), 36 deletions(-) delete mode > > 100644 > > Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > > create mode 100644 > > Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > > > > diff --git > > a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > > b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > > deleted file mode 100644 > > index e4e01c0..0000000 > > --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt > > +++ /dev/null > > @@ -1,36 +0,0 @@ > > -* Freescale IMX8MM IOMUX Controller > > - > > -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this > > directory -for common binding part and usage. > > - > > -Required properties: > > -- compatible: "fsl,imx8mm-iomuxc" > > -- reg: should contain the base physical address and size of the > > iomuxc > > - registers. > > - > > -Required properties in sub-nodes: > > -- fsl,pins: each entry consists of 6 integers and represents the mux > > and config > > - setting for one pin. The first 5 integers <mux_reg conf_reg > > input_reg mux_val > > - input_val> are specified using a PIN_FUNC_ID macro, which can be > > found in > > - <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer > > CONFIG is > > - the pad setting value like pull-up on this pin. Please refer to > > i.MX8M Mini > > - Reference Manual for detailed CONFIG settings. > > - > > -Examples: > > - > > -&uart1 { > > - pinctrl-names = "default"; > > - pinctrl-0 = <&pinctrl_uart1>; > > -}; > > - > > -iomuxc: pinctrl@30330000 { > > - compatible = "fsl,imx8mm-iomuxc"; > > - reg = <0x0 0x30330000 0x0 0x10000>; > > - > > - pinctrl_uart1: uart1grp { > > - fsl,pins = < > > - MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 > > - MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 > > - >; > > - }; > > -}; > > diff --git > > a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > > b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml > > new file mode 100644 > > index 0000000..a3c4275 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yam > > +++ l > > @@ -0,0 +1,69 @@ > > +# SPDX-License-Identifier: GPL-2.0-or-later > > Sorry, one other thing. > > You're good with GPLv9? Plus this is a license change. Do you have rights to > do so as some of this comes from the old binding doc? If you do, then make Yes, it should be GPL-2.0, will fix it in V3. Thanks, Anson
diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt deleted file mode 100644 index e4e01c0..0000000 --- a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt +++ /dev/null @@ -1,36 +0,0 @@ -* Freescale IMX8MM IOMUX Controller - -Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory -for common binding part and usage. - -Required properties: -- compatible: "fsl,imx8mm-iomuxc" -- reg: should contain the base physical address and size of the iomuxc - registers. - -Required properties in sub-nodes: -- fsl,pins: each entry consists of 6 integers and represents the mux and config - setting for one pin. The first 5 integers <mux_reg conf_reg input_reg mux_val - input_val> are specified using a PIN_FUNC_ID macro, which can be found in - <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last integer CONFIG is - the pad setting value like pull-up on this pin. Please refer to i.MX8M Mini - Reference Manual for detailed CONFIG settings. - -Examples: - -&uart1 { - pinctrl-names = "default"; - pinctrl-0 = <&pinctrl_uart1>; -}; - -iomuxc: pinctrl@30330000 { - compatible = "fsl,imx8mm-iomuxc"; - reg = <0x0 0x30330000 0x0 0x10000>; - - pinctrl_uart1: uart1grp { - fsl,pins = < - MX8MM_IOMUXC_UART1_RXD_UART1_DCE_RX 0x140 - MX8MM_IOMUXC_UART1_TXD_UART1_DCE_TX 0x140 - >; - }; -}; diff --git a/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml new file mode 100644 index 0000000..a3c4275 --- /dev/null +++ b/Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: GPL-2.0-or-later +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pinctrl/fsl,imx8mm-pinctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Freescale IMX8MM IOMUX Controller + +maintainers: + - Anson Huang <Anson.Huang@nxp.com> + +description: + Please refer to fsl,imx-pinctrl.txt and pinctrl-bindings.txt in this directory + for common binding part and usage. + +properties: + compatible: + const: fsl,imx8mm-iomuxc + + reg: + maxItems: 1 + +# Client device subnode's properties +patternProperties: + 'grp$': + type: object + description: + Pinctrl node's client devices use subnodes for desired pin configuration. + Client device subnodes use below standard properties. + + properties: + fsl,pins: + allOf: + - $ref: /schemas/types.yaml#/definitions/uint32-array + description: + each entry consists of 6 integers and represents the mux and config + setting for one pin. The first 5 integers <mux_reg conf_reg input_reg + mux_val input_val> are specified using a PIN_FUNC_ID macro, which can + be found in <arch/arm64/boot/dts/freescale/imx8mm-pinfunc.h>. The last + integer CONFIG is the pad setting value like pull-up on this pin. Please + refer to i.MX8M Mini Reference Manual for detailed CONFIG settings. + + required: + - fsl,pins + + additionalProperties: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + # Pinmux controller node + - | + iomuxc: pinctrl@30330000 { + compatible = "fsl,imx8mm-iomuxc"; + reg = <0x30330000 0x10000>; + + pinctrl_uart2: uart2grp { + fsl,pins = < + 0x23C 0x4A4 0x4FC 0x0 0x0 0x140 + 0x240 0x4A8 0x000 0x0 0x0 0x140 + >; + }; + }; + +...
Convert the i.MX8MM pinctrl binding to DT schema format using json-schema Signed-off-by: Anson Huang <Anson.Huang@nxp.com> --- Changes since V1: - use "grp$" instead of "-grp$"; - use space instead of tab for "ref$"; - add missed "reg" property; - remove the "maxItem" for "fsl,pins" to avoid build warning, as the item number is changable. --- .../bindings/pinctrl/fsl,imx8mm-pinctrl.txt | 36 ----------- .../bindings/pinctrl/fsl,imx8mm-pinctrl.yaml | 69 ++++++++++++++++++++++ 2 files changed, 69 insertions(+), 36 deletions(-) delete mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.txt create mode 100644 Documentation/devicetree/bindings/pinctrl/fsl,imx8mm-pinctrl.yaml