diff mbox series

dmaengine: zynqmp_dma: fix burst length configuration

Message ID 20200110082607.25353-1-matthias.fend@wolfvision.net (mailing list archive)
State Accepted
Headers show
Series dmaengine: zynqmp_dma: fix burst length configuration | expand

Commit Message

Matthias Fend Jan. 10, 2020, 8:26 a.m. UTC
Since the dma engine expects the burst length register content as
power of 2 value, the burst length needs to be converted first.
Additionally add a burst length range check to avoid corrupting unrelated
register bits.

Signed-off-by: Matthias Fend <matthias.fend@wolfvision.net>
---
 drivers/dma/xilinx/zynqmp_dma.c | 24 +++++++++++++++---------
 1 file changed, 15 insertions(+), 9 deletions(-)

Comments

Michal Simek Jan. 10, 2020, 8:48 a.m. UTC | #1
+Radhey and Harini

On 10. 01. 20 9:26, Matthias Fend wrote:
> Since the dma engine expects the burst length register content as
> power of 2 value, the burst length needs to be converted first.
> Additionally add a burst length range check to avoid corrupting unrelated
> register bits.
> 
> Signed-off-by: Matthias Fend <matthias.fend@wolfvision.net>
> ---
>  drivers/dma/xilinx/zynqmp_dma.c | 24 +++++++++++++++---------
>  1 file changed, 15 insertions(+), 9 deletions(-)
> 
> diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
> index 9c845c07b107..aa4de6c6688a 100644
> --- a/drivers/dma/xilinx/zynqmp_dma.c
> +++ b/drivers/dma/xilinx/zynqmp_dma.c
> @@ -123,10 +123,12 @@
>  /* Max transfer size per descriptor */
>  #define ZYNQMP_DMA_MAX_TRANS_LEN	0x40000000
>  
> +/* Max burst lengths */
> +#define ZYNQMP_DMA_MAX_DST_BURST_LEN    16
> +#define ZYNQMP_DMA_MAX_SRC_BURST_LEN    16
> +
>  /* Reset values for data attributes */
>  #define ZYNQMP_DMA_AXCACHE_VAL		0xF
> -#define ZYNQMP_DMA_ARLEN_RST_VAL	0xF
> -#define ZYNQMP_DMA_AWLEN_RST_VAL	0xF
>  
>  #define ZYNQMP_DMA_SRC_ISSUE_RST_VAL	0x1F
>  
> @@ -534,17 +536,19 @@ static void zynqmp_dma_handle_ovfl_int(struct zynqmp_dma_chan *chan, u32 status)
>  
>  static void zynqmp_dma_config(struct zynqmp_dma_chan *chan)
>  {
> -	u32 val;
> +	u32 val, burst_val;
>  
>  	val = readl(chan->regs + ZYNQMP_DMA_CTRL0);
>  	val |= ZYNQMP_DMA_POINT_TYPE_SG;
>  	writel(val, chan->regs + ZYNQMP_DMA_CTRL0);
>  
>  	val = readl(chan->regs + ZYNQMP_DMA_DATA_ATTR);
> +	burst_val = __ilog2_u32(chan->src_burst_len);
>  	val = (val & ~ZYNQMP_DMA_ARLEN) |
> -		(chan->src_burst_len << ZYNQMP_DMA_ARLEN_OFST);
> +		(burst_val << ZYNQMP_DMA_ARLEN_OFST);
> +	burst_val = __ilog2_u32(chan->dst_burst_len);
>  	val = (val & ~ZYNQMP_DMA_AWLEN) |
> -		(chan->dst_burst_len << ZYNQMP_DMA_AWLEN_OFST);
> +		(burst_val << ZYNQMP_DMA_AWLEN_OFST);
>  	writel(val, chan->regs + ZYNQMP_DMA_DATA_ATTR);
>  }
>  
> @@ -560,8 +564,10 @@ static int zynqmp_dma_device_config(struct dma_chan *dchan,
>  {
>  	struct zynqmp_dma_chan *chan = to_chan(dchan);
>  
> -	chan->src_burst_len = config->src_maxburst;
> -	chan->dst_burst_len = config->dst_maxburst;
> +	chan->src_burst_len = clamp(config->src_maxburst, 1U,
> +		(u32) ZYNQMP_DMA_MAX_SRC_BURST_LEN);
> +	chan->dst_burst_len = clamp(config->dst_maxburst, 1U,
> +		(u32) ZYNQMP_DMA_MAX_DST_BURST_LEN);
>  
>  	return 0;
>  }
> @@ -887,8 +893,8 @@ static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
>  		return PTR_ERR(chan->regs);
>  
>  	chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
> -	chan->dst_burst_len = ZYNQMP_DMA_AWLEN_RST_VAL;
> -	chan->src_burst_len = ZYNQMP_DMA_ARLEN_RST_VAL;
> +	chan->dst_burst_len = ZYNQMP_DMA_MAX_DST_BURST_LEN;
> +	chan->src_burst_len = ZYNQMP_DMA_MAX_SRC_BURST_LEN;
>  	err = of_property_read_u32(node, "xlnx,bus-width", &chan->bus_width);
>  	if (err < 0) {
>  		dev_err(&pdev->dev, "missing xlnx,bus-width property\n");
> 

M
Harini Katakam Jan. 15, 2020, 5:41 a.m. UTC | #2
Hi Matthias,

> -----Original Message-----
> From: Michal Simek [mailto:michal.simek@xilinx.com]
> Sent: Friday, January 10, 2020 2:18 PM
> To: Matthias Fend <matthias.fend@wolfvision.net>; linux-arm-
> kernel@lists.infradead.org
> Cc: dmaengine@vger.kernel.org; Michal Simek <michals@xilinx.com>;
> vkoul@kernel.org; Radhey Shyam Pandey <radheys@xilinx.com>; Harini
> Katakam <harinik@xilinx.com>
> Subject: Re: [PATCH] dmaengine: zynqmp_dma: fix burst length configuration
> 
> +Radhey and Harini
> 
> On 10. 01. 20 9:26, Matthias Fend wrote:
> > Since the dma engine expects the burst length register content as
> > power of 2 value, the burst length needs to be converted first.
> > Additionally add a burst length range check to avoid corrupting
> > unrelated register bits.
> >
> > Signed-off-by: Matthias Fend <matthias.fend@wolfvision.net>
> > ---
> >  drivers/dma/xilinx/zynqmp_dma.c | 24 +++++++++++++++---------
> >  1 file changed, 15 insertions(+), 9 deletions(-)
> >
> > diff --git a/drivers/dma/xilinx/zynqmp_dma.c
> > b/drivers/dma/xilinx/zynqmp_dma.c index 9c845c07b107..aa4de6c6688a
> > 100644
> > --- a/drivers/dma/xilinx/zynqmp_dma.c
> > +++ b/drivers/dma/xilinx/zynqmp_dma.c
> > @@ -123,10 +123,12 @@
> >  /* Max transfer size per descriptor */
> >  #define ZYNQMP_DMA_MAX_TRANS_LEN	0x40000000
> >
> > +/* Max burst lengths */
> > +#define ZYNQMP_DMA_MAX_DST_BURST_LEN    16
> > +#define ZYNQMP_DMA_MAX_SRC_BURST_LEN    16
> > +
> >  /* Reset values for data attributes */
> >  #define ZYNQMP_DMA_AXCACHE_VAL		0xF
> > -#define ZYNQMP_DMA_ARLEN_RST_VAL	0xF
> > -#define ZYNQMP_DMA_AWLEN_RST_VAL	0xF
<snip>
> > @@ -887,8 +893,8 @@ static int zynqmp_dma_chan_probe(struct
> zynqmp_dma_device *zdev,
> >  		return PTR_ERR(chan->regs);
> >
> >  	chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
> > -	chan->dst_burst_len = ZYNQMP_DMA_AWLEN_RST_VAL;
> > -	chan->src_burst_len = ZYNQMP_DMA_ARLEN_RST_VAL;
> > +	chan->dst_burst_len = ZYNQMP_DMA_MAX_DST_BURST_LEN;
> > +	chan->src_burst_len = ZYNQMP_DMA_MAX_SRC_BURST_LEN;
> >  	err = of_property_read_u32(node, "xlnx,bus-width", &chan-
> >bus_width);

Just a note that this changes the reset value of this field  from 0xF (acc to the spec) to 0x4.
It may need to be updated for future IP versions, if any, but I think it makes sense for now.
Thanks.
Reviewed-by: Harini Katakam <harini.katakam@xilinx.com>

Regards,
Harini
Vinod Koul Jan. 21, 2020, 9:18 a.m. UTC | #3
On 10-01-20, 09:26, Matthias Fend wrote:
> Since the dma engine expects the burst length register content as
> power of 2 value, the burst length needs to be converted first.
> Additionally add a burst length range check to avoid corrupting unrelated
> register bits.

Applied, thanks
diff mbox series

Patch

diff --git a/drivers/dma/xilinx/zynqmp_dma.c b/drivers/dma/xilinx/zynqmp_dma.c
index 9c845c07b107..aa4de6c6688a 100644
--- a/drivers/dma/xilinx/zynqmp_dma.c
+++ b/drivers/dma/xilinx/zynqmp_dma.c
@@ -123,10 +123,12 @@ 
 /* Max transfer size per descriptor */
 #define ZYNQMP_DMA_MAX_TRANS_LEN	0x40000000
 
+/* Max burst lengths */
+#define ZYNQMP_DMA_MAX_DST_BURST_LEN    16
+#define ZYNQMP_DMA_MAX_SRC_BURST_LEN    16
+
 /* Reset values for data attributes */
 #define ZYNQMP_DMA_AXCACHE_VAL		0xF
-#define ZYNQMP_DMA_ARLEN_RST_VAL	0xF
-#define ZYNQMP_DMA_AWLEN_RST_VAL	0xF
 
 #define ZYNQMP_DMA_SRC_ISSUE_RST_VAL	0x1F
 
@@ -534,17 +536,19 @@  static void zynqmp_dma_handle_ovfl_int(struct zynqmp_dma_chan *chan, u32 status)
 
 static void zynqmp_dma_config(struct zynqmp_dma_chan *chan)
 {
-	u32 val;
+	u32 val, burst_val;
 
 	val = readl(chan->regs + ZYNQMP_DMA_CTRL0);
 	val |= ZYNQMP_DMA_POINT_TYPE_SG;
 	writel(val, chan->regs + ZYNQMP_DMA_CTRL0);
 
 	val = readl(chan->regs + ZYNQMP_DMA_DATA_ATTR);
+	burst_val = __ilog2_u32(chan->src_burst_len);
 	val = (val & ~ZYNQMP_DMA_ARLEN) |
-		(chan->src_burst_len << ZYNQMP_DMA_ARLEN_OFST);
+		(burst_val << ZYNQMP_DMA_ARLEN_OFST);
+	burst_val = __ilog2_u32(chan->dst_burst_len);
 	val = (val & ~ZYNQMP_DMA_AWLEN) |
-		(chan->dst_burst_len << ZYNQMP_DMA_AWLEN_OFST);
+		(burst_val << ZYNQMP_DMA_AWLEN_OFST);
 	writel(val, chan->regs + ZYNQMP_DMA_DATA_ATTR);
 }
 
@@ -560,8 +564,10 @@  static int zynqmp_dma_device_config(struct dma_chan *dchan,
 {
 	struct zynqmp_dma_chan *chan = to_chan(dchan);
 
-	chan->src_burst_len = config->src_maxburst;
-	chan->dst_burst_len = config->dst_maxburst;
+	chan->src_burst_len = clamp(config->src_maxburst, 1U,
+		(u32) ZYNQMP_DMA_MAX_SRC_BURST_LEN);
+	chan->dst_burst_len = clamp(config->dst_maxburst, 1U,
+		(u32) ZYNQMP_DMA_MAX_DST_BURST_LEN);
 
 	return 0;
 }
@@ -887,8 +893,8 @@  static int zynqmp_dma_chan_probe(struct zynqmp_dma_device *zdev,
 		return PTR_ERR(chan->regs);
 
 	chan->bus_width = ZYNQMP_DMA_BUS_WIDTH_64;
-	chan->dst_burst_len = ZYNQMP_DMA_AWLEN_RST_VAL;
-	chan->src_burst_len = ZYNQMP_DMA_ARLEN_RST_VAL;
+	chan->dst_burst_len = ZYNQMP_DMA_MAX_DST_BURST_LEN;
+	chan->src_burst_len = ZYNQMP_DMA_MAX_SRC_BURST_LEN;
 	err = of_property_read_u32(node, "xlnx,bus-width", &chan->bus_width);
 	if (err < 0) {
 		dev_err(&pdev->dev, "missing xlnx,bus-width property\n");