From patchwork Fri Jan 10 14:54:06 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Eric Auger X-Patchwork-Id: 11327559 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D469921 for ; Fri, 10 Jan 2020 14:55:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id 2DB8D2084D for ; Fri, 10 Jan 2020 14:55:17 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="T++sQJcY" Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728451AbgAJOzQ (ORCPT ); Fri, 10 Jan 2020 09:55:16 -0500 Received: from us-smtp-2.mimecast.com ([205.139.110.61]:24304 "EHLO us-smtp-delivery-1.mimecast.com" rhost-flags-OK-OK-OK-FAIL) by vger.kernel.org with ESMTP id S1727363AbgAJOzP (ORCPT ); Fri, 10 Jan 2020 09:55:15 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1578668114; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:mime-version:mime-version: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=A9N2aRoAuhJExNcXHHKcgXxx/GMzDOlebGq7Fw5BkDk=; b=T++sQJcYvd6/4QW72EImRHQF1qU08x/Q92C75XduFj0EAD1fLR7IcXZ4xoI/q+Fi9rKieS wjzf2ATHJR440JM8SdI1Y0w9xt8q3Zw8OqBMVfbIBVN0TEkenDZ5Ok9vChIm8f0m/RYHEd C0TO78eU7Ny6s4yce+MNGoD2fVNmC8s= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-242-ePoRKuSlMn2JcuCbsgeOXA-1; Fri, 10 Jan 2020 09:55:13 -0500 X-MC-Unique: ePoRKuSlMn2JcuCbsgeOXA-1 Received: from smtp.corp.redhat.com (int-mx05.intmail.prod.int.phx2.redhat.com [10.5.11.15]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id D690318C43CF; Fri, 10 Jan 2020 14:55:10 +0000 (UTC) Received: from laptop.redhat.com (ovpn-117-108.ams2.redhat.com [10.36.117.108]) by smtp.corp.redhat.com (Postfix) with ESMTP id DC5647C3E2; Fri, 10 Jan 2020 14:55:07 +0000 (UTC) From: Eric Auger To: eric.auger.pro@gmail.com, eric.auger@redhat.com, maz@kernel.org, kvmarm@lists.cs.columbia.edu, kvm@vger.kernel.org, qemu-devel@nongnu.org, qemu-arm@nongnu.org Cc: drjones@redhat.com, andre.przywara@arm.com, peter.maydell@linaro.org, yuzenghui@huawei.com, alexandru.elisei@arm.com, thuth@redhat.com Subject: [kvm-unit-tests PATCH v2 10/16] arm/arm64: ITS: its_enable_defaults Date: Fri, 10 Jan 2020 15:54:06 +0100 Message-Id: <20200110145412.14937-11-eric.auger@redhat.com> In-Reply-To: <20200110145412.14937-1-eric.auger@redhat.com> References: <20200110145412.14937-1-eric.auger@redhat.com> MIME-Version: 1.0 X-Scanned-By: MIMEDefang 2.79 on 10.5.11.15 Sender: kvm-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: kvm@vger.kernel.org its_enable_defaults() is the top init function that allocates all the requested tables (device, collection, lpi config and pending tables), enable LPIs at distributor level and ITS level. gicv3_enable_defaults must be called before. Signed-off-by: Eric Auger --- lib/arm/asm/gic-v3-its.h | 1 + lib/arm/gic-v3-its.c | 40 ++++++++++++++++++++++++++++++++++++++++ 2 files changed, 41 insertions(+) diff --git a/lib/arm/asm/gic-v3-its.h b/lib/arm/asm/gic-v3-its.h index d2db292..0e31848 100644 --- a/lib/arm/asm/gic-v3-its.h +++ b/lib/arm/asm/gic-v3-its.h @@ -100,6 +100,7 @@ extern void set_lpi_config(int n, u8 val); extern u8 get_lpi_config(int n); extern void set_pending_table_bit(int rdist, int n, bool set); extern void gicv3_rdist_ctrl_lpi(u32 redist, bool set); +extern void its_enable_defaults(void); #endif /* !__ASSEMBLY__ */ #endif /* _ASMARM_GIC_V3_ITS_H_ */ diff --git a/lib/arm/gic-v3-its.c b/lib/arm/gic-v3-its.c index c7c6f80..f488cca 100644 --- a/lib/arm/gic-v3-its.c +++ b/lib/arm/gic-v3-its.c @@ -217,3 +217,43 @@ void gicv3_rdist_ctrl_lpi(u32 redist, bool set) val &= ~GICR_CTLR_ENABLE_LPIS; writel(val, ptr + GICR_CTLR); } + +void its_enable_defaults(void) +{ + unsigned int i; + + its_parse_typer(); + + /* Allocate BASER tables (device and collection tables) */ + for (i = 0; i < GITS_BASER_NR_REGS; i++) { + struct its_baser *baser = &its_data.baser[i]; + int ret; + + ret = its_parse_baser(i, baser); + if (ret) + continue; + + switch (baser->type) { + case GITS_BASER_TYPE_DEVICE: + baser->valid = true; + its_setup_baser(i, baser); + break; + case GITS_BASER_TYPE_COLLECTION: + baser->valid = true; + its_setup_baser(i, baser); + break; + default: + break; + } + } + + /* Allocate LPI config and pending tables */ + alloc_lpi_tables(); + + init_cmd_queue(); + + for (i = 0; i < nr_cpus; i++) + gicv3_rdist_ctrl_lpi(i, true); + + writel(GITS_CTLR_ENABLE, its_data.base + GITS_CTLR); +}