From patchwork Fri Jan 10 16:18:03 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Claudiu Beznea X-Patchwork-Id: 11327953 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id DF98714B4 for ; Fri, 10 Jan 2020 16:20:17 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id C862C20848 for ; Fri, 10 Jan 2020 16:20:17 +0000 (UTC) Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728730AbgAJQUR (ORCPT ); Fri, 10 Jan 2020 11:20:17 -0500 Received: from esa2.microchip.iphmx.com ([68.232.149.84]:32637 "EHLO esa2.microchip.iphmx.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1728636AbgAJQUQ (ORCPT ); Fri, 10 Jan 2020 11:20:16 -0500 Received-SPF: Pass (esa2.microchip.iphmx.com: domain of Claudiu.Beznea@microchip.com designates 198.175.253.82 as permitted sender) identity=mailfrom; client-ip=198.175.253.82; receiver=esa2.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="Claudiu.Beznea@microchip.com"; x-conformance=spf_only; x-record-type="v=spf1"; x-record-text="v=spf1 mx a:ushub1.microchip.com a:smtpout.microchip.com -exists:%{i}.spf.microchip.iphmx.com include:servers.mcsv.net include:mktomail.com include:spf.protection.outlook.com ~all" Received-SPF: None (esa2.microchip.iphmx.com: no sender authenticity information available from domain of postmaster@email.microchip.com) identity=helo; client-ip=198.175.253.82; receiver=esa2.microchip.iphmx.com; envelope-from="Claudiu.Beznea@microchip.com"; x-sender="postmaster@email.microchip.com"; x-conformance=spf_only Authentication-Results: esa2.microchip.iphmx.com; dkim=none (message not signed) header.i=none; spf=Pass smtp.mailfrom=Claudiu.Beznea@microchip.com; spf=None smtp.helo=postmaster@email.microchip.com; dmarc=pass (p=none dis=none) d=microchip.com IronPort-SDR: GX1tjz08G8nh4/WTK4Cx7xmFV4ZM75L/Gny7pjHc+fOAmkU6/E1IGtQd+5mxdkUNyumn0ARDgJ /j/tOuXuaOm1mddNskMynCAbcRBsqS8GaKFGKiIJ/VmFq+hx+xUGR5YXZykLI2KnoWltwr3fzM dqkV0/YueoQXKRb6cvFCDsDgH4sDzCCewbGlr55tOsCHV2g4I/mDA2/ubgexirLK0neKJJyXfR /XsudlrrxAOXA7p73jS3k7zNfjilSg1Iz8rcizOik2CJ6Fiu11r8bjXwvbtjBQB/YH9X5eW4Jv znE= X-IronPort-AV: E=Sophos;i="5.69,417,1571727600"; d="scan'208";a="62249156" Received: from smtpout.microchip.com (HELO email.microchip.com) ([198.175.253.82]) by esa2.microchip.iphmx.com with ESMTP/TLS/AES256-SHA256; 10 Jan 2020 09:20:15 -0700 Received: from chn-vm-ex03.mchp-main.com (10.10.85.151) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_128_GCM_SHA256) id 15.1.1713.5; Fri, 10 Jan 2020 09:20:15 -0700 Received: from m18063-ThinkPad-T460p.mchp-main.com (10.10.85.251) by chn-vm-ex03.mchp-main.com (10.10.85.151) with Microsoft SMTP Server id 15.1.1713.5 via Frontend Transport; Fri, 10 Jan 2020 09:20:05 -0700 From: Claudiu Beznea To: , , , , , , , , , , , , , , , , , , , , , CC: , , , , , , , , , , Claudiu Beznea Subject: [PATCH v2 11/17] dt-bindings: atmel-gpbr: add microchip,sam9x60-gpbr Date: Fri, 10 Jan 2020 18:18:03 +0200 Message-ID: <1578673089-3484-12-git-send-email-claudiu.beznea@microchip.com> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1578673089-3484-1-git-send-email-claudiu.beznea@microchip.com> References: <1578673089-3484-1-git-send-email-claudiu.beznea@microchip.com> MIME-Version: 1.0 Sender: linux-iio-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-iio@vger.kernel.org Add microchip,sam9x60-gpbr to DT bindings documentation. Signed-off-by: Claudiu Beznea Acked-by: Rob Herring --- Documentation/devicetree/bindings/mfd/atmel-gpbr.txt | 4 +++- 1 file changed, 3 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt index a28569540683..e8c525569f10 100644 --- a/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt +++ b/Documentation/devicetree/bindings/mfd/atmel-gpbr.txt @@ -3,7 +3,9 @@ The GPBR are a set of battery-backed registers. Required properties: -- compatible: "atmel,at91sam9260-gpbr", "syscon" +- compatible: Should be one of the following: + "atmel,at91sam9260-gpbr", "syscon" + "microchip,sam9x60-gpbr", "syscon" - reg: contains offset/length value of the GPBR memory region.