| Message ID | 20200115013143.34961-3-daniele.ceraolospurio@intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Commit early to GuC | expand |
On Wed, 15 Jan 2020 02:31:38 +0100, Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> wrote: > use intel_uc_uses_guc_submission() directly instead, to be consistent in > the way we check what we want to do with the GuC. > > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> > Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> > Cc: John Harrison <John.C.Harrison@Intel.com> > Cc: Matthew Brost <matthew.brost@intel.com> Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> with one small nit below > --- > drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- > drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- > drivers/gpu/drm/i915/gt/selftest_lrc.c | 10 +++++----- > drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +- > drivers/gpu/drm/i915/gvt/scheduler.c | 3 ++- > drivers/gpu/drm/i915/i915_debugfs.c | 6 +++--- > drivers/gpu/drm/i915/i915_drv.h | 3 --- > drivers/gpu/drm/i915/intel_gvt.c | 2 +- > 8 files changed, 14 insertions(+), 16 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c > b/drivers/gpu/drm/i915/gem/i915_gem_context.c > index a2e57e62af30..415e2d5e934b 100644 > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > @@ -1454,7 +1454,7 @@ set_engines__load_balance(struct > i915_user_extension __user *base, void *data) > if (!HAS_EXECLISTS(set->ctx->i915)) > return -ENODEV; > - if (USES_GUC_SUBMISSION(set->ctx->i915)) > + if (intel_uc_uses_guc_submission(&set->ctx->vm->gt->uc)) > return -ENODEV; /* not implement yet */ > if (get_user(idx, &ext->engine_index)) > diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > index 3e5e6c86e843..c3514ec7b8db 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c > @@ -1640,7 +1640,7 @@ static int igt_reset_engines_atomic(void *arg) > if (!intel_has_reset_engine(gt)) > return 0; > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; > igt_global_reset_lock(gt); > diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c > b/drivers/gpu/drm/i915/gt/selftest_lrc.c > index 15cda024e3e4..b1c677b0d5ad 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c > +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c > @@ -1555,7 +1555,7 @@ static int live_suppress_self_preempt(void *arg) > if (!HAS_LOGICAL_RING_PREEMPTION(gt->i915)) > return 0; > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; /* presume black blox */ > if (intel_vgpu_active(gt->i915)) > @@ -2781,7 +2781,7 @@ static int live_virtual_engine(void *arg) > unsigned int class, inst; > int err; > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; > for_each_engine(engine, gt, id) { > @@ -2914,7 +2914,7 @@ static int live_virtual_mask(void *arg) > unsigned int class, inst; > int err; > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; > for (class = 0; class <= MAX_ENGINE_CLASS; class++) { > @@ -3052,7 +3052,7 @@ static int live_virtual_preserved(void *arg) > * are preserved. > */ > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; > /* As we use CS_GPR we cannot run before they existed on all engines. */ > @@ -3276,7 +3276,7 @@ static int live_virtual_bond(void *arg) > unsigned int class, inst; > int err; > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; > for (class = 0; class <= MAX_ENGINE_CLASS; class++) { > diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c > b/drivers/gpu/drm/i915/gt/selftest_reset.c > index 6ad6aca315f6..35406ecdf0b2 100644 > --- a/drivers/gpu/drm/i915/gt/selftest_reset.c > +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c > @@ -115,7 +115,7 @@ static int igt_atomic_engine_reset(void *arg) > if (!intel_has_reset_engine(gt)) > return 0; > - if (USES_GUC_SUBMISSION(gt->i915)) > + if (intel_uc_uses_guc_submission(>->uc)) > return 0; > intel_gt_pm_get(gt); > diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c > b/drivers/gpu/drm/i915/gvt/scheduler.c > index 685d1e04a5ff..5fe00ee6bd1b 100644 > --- a/drivers/gpu/drm/i915/gvt/scheduler.c > +++ b/drivers/gpu/drm/i915/gvt/scheduler.c > @@ -1246,7 +1246,8 @@ int intel_vgpu_setup_submission(struct intel_vgpu > *vgpu) > ce->vm = i915_vm_get(&ppgtt->vm); > intel_context_set_single_submission(ce); > - if (!USES_GUC_SUBMISSION(i915)) { /* Max ring buffer size */ > + /* Max ring buffer size */ > + if (!intel_uc_uses_guc_submission(&engine->gt->uc)) { > const unsigned int ring_size = 512 * SZ_4K; > ce->ring = __intel_context_ring_size(ring_size); > diff --git a/drivers/gpu/drm/i915/i915_debugfs.c > b/drivers/gpu/drm/i915/i915_debugfs.c > index c2f480defc71..823a033ffcd0 100644 > --- a/drivers/gpu/drm/i915/i915_debugfs.c > +++ b/drivers/gpu/drm/i915/i915_debugfs.c > @@ -1792,11 +1792,11 @@ static int i915_guc_info(struct seq_file *m, > void *data) > static int i915_guc_stage_pool(struct seq_file *m, void *data) > { > struct drm_i915_private *dev_priv = node_to_i915(m->private); > - const struct intel_guc *guc = &dev_priv->gt.uc.guc; > - struct guc_stage_desc *desc = guc->stage_desc_pool_vaddr; > + struct intel_uc *uc = &dev_priv->gt.uc; > + struct guc_stage_desc *desc = uc->guc.stage_desc_pool_vaddr; > int index; > - if (!USES_GUC_SUBMISSION(dev_priv)) > + if (!intel_uc_uses_guc_submission(uc)) > return -ENODEV; > for (index = 0; index < GUC_MAX_STAGE_DESCRIPTORS; index++, desc++) { > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h > index ad0019cd2604..24d581c63667 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1718,9 +1718,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, > #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) > -/* Having GuC is not the same as using GuC */ > -#define > USES_GUC_SUBMISSION(dev_priv) intel_uc_uses_guc_submission(&(dev_priv)->gt.uc) > - > #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu) > #define > HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs) > diff --git a/drivers/gpu/drm/i915/intel_gvt.c > b/drivers/gpu/drm/i915/intel_gvt.c > index 2b6c016387c2..481c6de9f4d6 100644 > --- a/drivers/gpu/drm/i915/intel_gvt.c > +++ b/drivers/gpu/drm/i915/intel_gvt.c > @@ -103,7 +103,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv) > return 0; > } > - if (USES_GUC_SUBMISSION(dev_priv)) { > + if (intel_uc_uses_guc_submission(&dev_priv->gt.uc)) { nit: that old macro was helpful exactly in cases where only dev_priv is known and component might have no idea where to find uc maybe we should have helper like: #define to_intel_uc(i915) (&(i915)->gt.uc) (but likely Jani will complain) > DRM_ERROR("i915 GVT-g loading failed due to Graphics virtualization > is not yet supported with GuC submission\n"); > return -EIO; > }
On 1/16/20 11:49 AM, Michal Wajdeczko wrote: > On Wed, 15 Jan 2020 02:31:38 +0100, Daniele Ceraolo Spurio > <daniele.ceraolospurio@intel.com> wrote: > >> use intel_uc_uses_guc_submission() directly instead, to be consistent in >> the way we check what we want to do with the GuC. >> >> Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> >> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> >> Cc: John Harrison <John.C.Harrison@Intel.com> >> Cc: Matthew Brost <matthew.brost@intel.com> > > Reviewed-by: Michal Wajdeczko <michal.wajdeczko@intel.com> > > with one small nit below > >> --- >> drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- >> drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- >> drivers/gpu/drm/i915/gt/selftest_lrc.c | 10 +++++----- >> drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +- >> drivers/gpu/drm/i915/gvt/scheduler.c | 3 ++- >> drivers/gpu/drm/i915/i915_debugfs.c | 6 +++--- >> drivers/gpu/drm/i915/i915_drv.h | 3 --- >> drivers/gpu/drm/i915/intel_gvt.c | 2 +- >> 8 files changed, 14 insertions(+), 16 deletions(-) >> >> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c >> b/drivers/gpu/drm/i915/gem/i915_gem_context.c >> index a2e57e62af30..415e2d5e934b 100644 >> --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c >> +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c >> @@ -1454,7 +1454,7 @@ set_engines__load_balance(struct >> i915_user_extension __user *base, void *data) >> if (!HAS_EXECLISTS(set->ctx->i915)) >> return -ENODEV; >> - if (USES_GUC_SUBMISSION(set->ctx->i915)) >> + if (intel_uc_uses_guc_submission(&set->ctx->vm->gt->uc)) >> return -ENODEV; /* not implement yet */ >> if (get_user(idx, &ext->engine_index)) >> diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c >> b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c >> index 3e5e6c86e843..c3514ec7b8db 100644 >> --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c >> +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c >> @@ -1640,7 +1640,7 @@ static int igt_reset_engines_atomic(void *arg) >> if (!intel_has_reset_engine(gt)) >> return 0; >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; >> igt_global_reset_lock(gt); >> diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c >> b/drivers/gpu/drm/i915/gt/selftest_lrc.c >> index 15cda024e3e4..b1c677b0d5ad 100644 >> --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c >> +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c >> @@ -1555,7 +1555,7 @@ static int live_suppress_self_preempt(void *arg) >> if (!HAS_LOGICAL_RING_PREEMPTION(gt->i915)) >> return 0; >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; /* presume black blox */ >> if (intel_vgpu_active(gt->i915)) >> @@ -2781,7 +2781,7 @@ static int live_virtual_engine(void *arg) >> unsigned int class, inst; >> int err; >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; >> for_each_engine(engine, gt, id) { >> @@ -2914,7 +2914,7 @@ static int live_virtual_mask(void *arg) >> unsigned int class, inst; >> int err; >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; >> for (class = 0; class <= MAX_ENGINE_CLASS; class++) { >> @@ -3052,7 +3052,7 @@ static int live_virtual_preserved(void *arg) >> * are preserved. >> */ >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; >> /* As we use CS_GPR we cannot run before they existed on all >> engines. */ >> @@ -3276,7 +3276,7 @@ static int live_virtual_bond(void *arg) >> unsigned int class, inst; >> int err; >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; >> for (class = 0; class <= MAX_ENGINE_CLASS; class++) { >> diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c >> b/drivers/gpu/drm/i915/gt/selftest_reset.c >> index 6ad6aca315f6..35406ecdf0b2 100644 >> --- a/drivers/gpu/drm/i915/gt/selftest_reset.c >> +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c >> @@ -115,7 +115,7 @@ static int igt_atomic_engine_reset(void *arg) >> if (!intel_has_reset_engine(gt)) >> return 0; >> - if (USES_GUC_SUBMISSION(gt->i915)) >> + if (intel_uc_uses_guc_submission(>->uc)) >> return 0; >> intel_gt_pm_get(gt); >> diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c >> b/drivers/gpu/drm/i915/gvt/scheduler.c >> index 685d1e04a5ff..5fe00ee6bd1b 100644 >> --- a/drivers/gpu/drm/i915/gvt/scheduler.c >> +++ b/drivers/gpu/drm/i915/gvt/scheduler.c >> @@ -1246,7 +1246,8 @@ int intel_vgpu_setup_submission(struct >> intel_vgpu *vgpu) >> ce->vm = i915_vm_get(&ppgtt->vm); >> intel_context_set_single_submission(ce); >> - if (!USES_GUC_SUBMISSION(i915)) { /* Max ring buffer size */ >> + /* Max ring buffer size */ >> + if (!intel_uc_uses_guc_submission(&engine->gt->uc)) { >> const unsigned int ring_size = 512 * SZ_4K; >> ce->ring = __intel_context_ring_size(ring_size); >> diff --git a/drivers/gpu/drm/i915/i915_debugfs.c >> b/drivers/gpu/drm/i915/i915_debugfs.c >> index c2f480defc71..823a033ffcd0 100644 >> --- a/drivers/gpu/drm/i915/i915_debugfs.c >> +++ b/drivers/gpu/drm/i915/i915_debugfs.c >> @@ -1792,11 +1792,11 @@ static int i915_guc_info(struct seq_file *m, >> void *data) >> static int i915_guc_stage_pool(struct seq_file *m, void *data) >> { >> struct drm_i915_private *dev_priv = node_to_i915(m->private); >> - const struct intel_guc *guc = &dev_priv->gt.uc.guc; >> - struct guc_stage_desc *desc = guc->stage_desc_pool_vaddr; >> + struct intel_uc *uc = &dev_priv->gt.uc; >> + struct guc_stage_desc *desc = uc->guc.stage_desc_pool_vaddr; >> int index; >> - if (!USES_GUC_SUBMISSION(dev_priv)) >> + if (!intel_uc_uses_guc_submission(uc)) >> return -ENODEV; >> for (index = 0; index < GUC_MAX_STAGE_DESCRIPTORS; index++, desc++) { >> diff --git a/drivers/gpu/drm/i915/i915_drv.h >> b/drivers/gpu/drm/i915/i915_drv.h >> index ad0019cd2604..24d581c63667 100644 >> --- a/drivers/gpu/drm/i915/i915_drv.h >> +++ b/drivers/gpu/drm/i915/i915_drv.h >> @@ -1718,9 +1718,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, >> #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) >> -/* Having GuC is not the same as using GuC */ >> -#define USES_GUC_SUBMISSION(dev_priv) >> intel_uc_uses_guc_submission(&(dev_priv)->gt.uc) >> - >> #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu) >> #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) >> (INTEL_INFO(dev_priv)->has_global_mocs) >> diff --git a/drivers/gpu/drm/i915/intel_gvt.c >> b/drivers/gpu/drm/i915/intel_gvt.c >> index 2b6c016387c2..481c6de9f4d6 100644 >> --- a/drivers/gpu/drm/i915/intel_gvt.c >> +++ b/drivers/gpu/drm/i915/intel_gvt.c >> @@ -103,7 +103,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv) >> return 0; >> } >> - if (USES_GUC_SUBMISSION(dev_priv)) { >> + if (intel_uc_uses_guc_submission(&dev_priv->gt.uc)) { > > nit: that old macro was helpful exactly in cases where only dev_priv > is known and component might have no idea where to find uc > > maybe we should have helper like: > > #define to_intel_uc(i915) (&(i915)->gt.uc) > > (but likely Jani will complain) > IMO the problem here is that we shouldn't really be going down to the uc from the dev_priv level, as intel_uc is now a subfeature of the GT. We've already removed a lot of the existing checks at the dev_priv level and this series gets rid of a few more; I guess once they're reduced enough in number we can consider replacing them with a check at the GT level. Daniele >> DRM_ERROR("i915 GVT-g loading failed due to Graphics >> virtualization is not yet supported with GuC submission\n"); >> return -EIO; >> }
>>> - if (USES_GUC_SUBMISSION(dev_priv)) { >>> + if (intel_uc_uses_guc_submission(&dev_priv->gt.uc)) { >> nit: that old macro was helpful exactly in cases where only dev_priv >> is known and component might have no idea where to find uc >> maybe we should have helper like: >> #define to_intel_uc(i915) (&(i915)->gt.uc) >> (but likely Jani will complain) >> > > IMO the problem here is that we shouldn't really be going down to the uc > from the dev_priv level, as intel_uc is now a subfeature of the GT. > We've already removed a lot of the existing checks at the dev_priv level > and this series gets rid of a few more; I guess once they're reduced > enough in number we can consider replacing them with a check at the GT > level. so maybe we should introduce right now: static inline bool intel_gt_uses_guc_submission(struct intel_gt *gt) { return intel_uc_uses_guc_submission(>->uc); } and use it where we operate at gt level Michal
On 1/16/20 2:49 PM, Michal Wajdeczko wrote: >>>> - if (USES_GUC_SUBMISSION(dev_priv)) { >>>> + if (intel_uc_uses_guc_submission(&dev_priv->gt.uc)) { >>> nit: that old macro was helpful exactly in cases where only dev_priv >>> is known and component might have no idea where to find uc >>> maybe we should have helper like: >>> #define to_intel_uc(i915) (&(i915)->gt.uc) >>> (but likely Jani will complain) >>> >> >> IMO the problem here is that we shouldn't really be going down to the >> uc from the dev_priv level, as intel_uc is now a subfeature of the GT. >> We've already removed a lot of the existing checks at the dev_priv >> level and this series gets rid of a few more; I guess once they're >> reduced enough in number we can consider replacing them with a check >> at the GT level. > > so maybe we should introduce right now: > > static inline bool intel_gt_uses_guc_submission(struct intel_gt *gt) > { > return intel_uc_uses_guc_submission(>->uc); > } > > and use it where we operate at gt level > The problem is that with the gvt code is actually initialized before we commit to using GuC submission and patch 3 changes the check from uses to wants, so that's quite a specific case which I'm not sure is worth the helper yet. That's why I wanted to wait until things settle down a bit more to understand what was left before adding a high-level "wants" helper, which IMO is not the best suited for a GT level check. Daniele > Michal
Hi Daniele,
Thank you for the patch! Perhaps something to improve:
[auto build test WARNING on drm-intel/for-linux-next]
[cannot apply to drm-tip/drm-tip v5.5-rc7 next-20200124]
[if your patch is applied to the wrong git tree, please drop us a note to help
improve the system. BTW, we also suggest to use '--base' option to specify the
base tree in git format-patch, please see https://stackoverflow.com/a/37406982]
url: https://github.com/0day-ci/linux/commits/Daniele-Ceraolo-Spurio/Commit-early-to-GuC/20200116-112105
base: git://anongit.freedesktop.org/drm-intel for-linux-next
reproduce:
# apt-get install sparse
# sparse version: v0.6.1-153-g47b6dfef-dirty
make ARCH=x86_64 allmodconfig
make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
If you fix the issue, kindly add following tag
Reported-by: kbuild test robot <lkp@intel.com>
sparse warnings: (new ones prefixed by >>)
>> drivers/gpu/drm/i915/gem/i915_gem_context.c:1457:51: sparse: sparse: dereference of noderef expression
vim +1457 drivers/gpu/drm/i915/gem/i915_gem_context.c
1440
1441 static int
1442 set_engines__load_balance(struct i915_user_extension __user *base, void *data)
1443 {
1444 struct i915_context_engines_load_balance __user *ext =
1445 container_of_user(base, typeof(*ext), base);
1446 const struct set_engines *set = data;
1447 struct intel_engine_cs *stack[16];
1448 struct intel_engine_cs **siblings;
1449 struct intel_context *ce;
1450 u16 num_siblings, idx;
1451 unsigned int n;
1452 int err;
1453
1454 if (!HAS_EXECLISTS(set->ctx->i915))
1455 return -ENODEV;
1456
> 1457 if (intel_uc_uses_guc_submission(&set->ctx->vm->gt->uc))
1458 return -ENODEV; /* not implement yet */
1459
1460 if (get_user(idx, &ext->engine_index))
1461 return -EFAULT;
1462
1463 if (idx >= set->engines->num_engines) {
1464 DRM_DEBUG("Invalid placement value, %d >= %d\n",
1465 idx, set->engines->num_engines);
1466 return -EINVAL;
1467 }
1468
1469 idx = array_index_nospec(idx, set->engines->num_engines);
1470 if (set->engines->engines[idx]) {
1471 DRM_DEBUG("Invalid placement[%d], already occupied\n", idx);
1472 return -EEXIST;
1473 }
1474
1475 if (get_user(num_siblings, &ext->num_siblings))
1476 return -EFAULT;
1477
1478 err = check_user_mbz(&ext->flags);
1479 if (err)
1480 return err;
1481
1482 err = check_user_mbz(&ext->mbz64);
1483 if (err)
1484 return err;
1485
1486 siblings = stack;
1487 if (num_siblings > ARRAY_SIZE(stack)) {
1488 siblings = kmalloc_array(num_siblings,
1489 sizeof(*siblings),
1490 GFP_KERNEL);
1491 if (!siblings)
1492 return -ENOMEM;
1493 }
1494
1495 for (n = 0; n < num_siblings; n++) {
1496 struct i915_engine_class_instance ci;
1497
1498 if (copy_from_user(&ci, &ext->engines[n], sizeof(ci))) {
1499 err = -EFAULT;
1500 goto out_siblings;
1501 }
1502
1503 siblings[n] = intel_engine_lookup_user(set->ctx->i915,
1504 ci.engine_class,
1505 ci.engine_instance);
1506 if (!siblings[n]) {
1507 DRM_DEBUG("Invalid sibling[%d]: { class:%d, inst:%d }\n",
1508 n, ci.engine_class, ci.engine_instance);
1509 err = -EINVAL;
1510 goto out_siblings;
1511 }
1512 }
1513
1514 ce = intel_execlists_create_virtual(siblings, n);
1515 if (IS_ERR(ce)) {
1516 err = PTR_ERR(ce);
1517 goto out_siblings;
1518 }
1519
1520 intel_context_set_gem(ce, set->ctx);
1521
1522 if (cmpxchg(&set->engines->engines[idx], NULL, ce)) {
1523 intel_context_put(ce);
1524 err = -EEXIST;
1525 goto out_siblings;
1526 }
1527
1528 out_siblings:
1529 if (siblings != stack)
1530 kfree(siblings);
1531
1532 return err;
1533 }
1534
---
0-DAY kernel test infrastructure Open Source Technology Center
https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org Intel Corporation
diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index a2e57e62af30..415e2d5e934b 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -1454,7 +1454,7 @@ set_engines__load_balance(struct i915_user_extension __user *base, void *data) if (!HAS_EXECLISTS(set->ctx->i915)) return -ENODEV; - if (USES_GUC_SUBMISSION(set->ctx->i915)) + if (intel_uc_uses_guc_submission(&set->ctx->vm->gt->uc)) return -ENODEV; /* not implement yet */ if (get_user(idx, &ext->engine_index)) diff --git a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c index 3e5e6c86e843..c3514ec7b8db 100644 --- a/drivers/gpu/drm/i915/gt/selftest_hangcheck.c +++ b/drivers/gpu/drm/i915/gt/selftest_hangcheck.c @@ -1640,7 +1640,7 @@ static int igt_reset_engines_atomic(void *arg) if (!intel_has_reset_engine(gt)) return 0; - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; igt_global_reset_lock(gt); diff --git a/drivers/gpu/drm/i915/gt/selftest_lrc.c b/drivers/gpu/drm/i915/gt/selftest_lrc.c index 15cda024e3e4..b1c677b0d5ad 100644 --- a/drivers/gpu/drm/i915/gt/selftest_lrc.c +++ b/drivers/gpu/drm/i915/gt/selftest_lrc.c @@ -1555,7 +1555,7 @@ static int live_suppress_self_preempt(void *arg) if (!HAS_LOGICAL_RING_PREEMPTION(gt->i915)) return 0; - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; /* presume black blox */ if (intel_vgpu_active(gt->i915)) @@ -2781,7 +2781,7 @@ static int live_virtual_engine(void *arg) unsigned int class, inst; int err; - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; for_each_engine(engine, gt, id) { @@ -2914,7 +2914,7 @@ static int live_virtual_mask(void *arg) unsigned int class, inst; int err; - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; for (class = 0; class <= MAX_ENGINE_CLASS; class++) { @@ -3052,7 +3052,7 @@ static int live_virtual_preserved(void *arg) * are preserved. */ - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; /* As we use CS_GPR we cannot run before they existed on all engines. */ @@ -3276,7 +3276,7 @@ static int live_virtual_bond(void *arg) unsigned int class, inst; int err; - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; for (class = 0; class <= MAX_ENGINE_CLASS; class++) { diff --git a/drivers/gpu/drm/i915/gt/selftest_reset.c b/drivers/gpu/drm/i915/gt/selftest_reset.c index 6ad6aca315f6..35406ecdf0b2 100644 --- a/drivers/gpu/drm/i915/gt/selftest_reset.c +++ b/drivers/gpu/drm/i915/gt/selftest_reset.c @@ -115,7 +115,7 @@ static int igt_atomic_engine_reset(void *arg) if (!intel_has_reset_engine(gt)) return 0; - if (USES_GUC_SUBMISSION(gt->i915)) + if (intel_uc_uses_guc_submission(>->uc)) return 0; intel_gt_pm_get(gt); diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c index 685d1e04a5ff..5fe00ee6bd1b 100644 --- a/drivers/gpu/drm/i915/gvt/scheduler.c +++ b/drivers/gpu/drm/i915/gvt/scheduler.c @@ -1246,7 +1246,8 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu) ce->vm = i915_vm_get(&ppgtt->vm); intel_context_set_single_submission(ce); - if (!USES_GUC_SUBMISSION(i915)) { /* Max ring buffer size */ + /* Max ring buffer size */ + if (!intel_uc_uses_guc_submission(&engine->gt->uc)) { const unsigned int ring_size = 512 * SZ_4K; ce->ring = __intel_context_ring_size(ring_size); diff --git a/drivers/gpu/drm/i915/i915_debugfs.c b/drivers/gpu/drm/i915/i915_debugfs.c index c2f480defc71..823a033ffcd0 100644 --- a/drivers/gpu/drm/i915/i915_debugfs.c +++ b/drivers/gpu/drm/i915/i915_debugfs.c @@ -1792,11 +1792,11 @@ static int i915_guc_info(struct seq_file *m, void *data) static int i915_guc_stage_pool(struct seq_file *m, void *data) { struct drm_i915_private *dev_priv = node_to_i915(m->private); - const struct intel_guc *guc = &dev_priv->gt.uc.guc; - struct guc_stage_desc *desc = guc->stage_desc_pool_vaddr; + struct intel_uc *uc = &dev_priv->gt.uc; + struct guc_stage_desc *desc = uc->guc.stage_desc_pool_vaddr; int index; - if (!USES_GUC_SUBMISSION(dev_priv)) + if (!intel_uc_uses_guc_submission(uc)) return -ENODEV; for (index = 0; index < GUC_MAX_STAGE_DESCRIPTORS; index++, desc++) { diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h index ad0019cd2604..24d581c63667 100644 --- a/drivers/gpu/drm/i915/i915_drv.h +++ b/drivers/gpu/drm/i915/i915_drv.h @@ -1718,9 +1718,6 @@ IS_SUBPLATFORM(const struct drm_i915_private *i915, #define HAS_GT_UC(dev_priv) (INTEL_INFO(dev_priv)->has_gt_uc) -/* Having GuC is not the same as using GuC */ -#define USES_GUC_SUBMISSION(dev_priv) intel_uc_uses_guc_submission(&(dev_priv)->gt.uc) - #define HAS_POOLED_EU(dev_priv) (INTEL_INFO(dev_priv)->has_pooled_eu) #define HAS_GLOBAL_MOCS_REGISTERS(dev_priv) (INTEL_INFO(dev_priv)->has_global_mocs) diff --git a/drivers/gpu/drm/i915/intel_gvt.c b/drivers/gpu/drm/i915/intel_gvt.c index 2b6c016387c2..481c6de9f4d6 100644 --- a/drivers/gpu/drm/i915/intel_gvt.c +++ b/drivers/gpu/drm/i915/intel_gvt.c @@ -103,7 +103,7 @@ int intel_gvt_init(struct drm_i915_private *dev_priv) return 0; } - if (USES_GUC_SUBMISSION(dev_priv)) { + if (intel_uc_uses_guc_submission(&dev_priv->gt.uc)) { DRM_ERROR("i915 GVT-g loading failed due to Graphics virtualization is not yet supported with GuC submission\n"); return -EIO; }
use intel_uc_uses_guc_submission() directly instead, to be consistent in the way we check what we want to do with the GuC. Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com> Cc: Michal Wajdeczko <michal.wajdeczko@intel.com> Cc: John Harrison <John.C.Harrison@Intel.com> Cc: Matthew Brost <matthew.brost@intel.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- drivers/gpu/drm/i915/gt/selftest_lrc.c | 10 +++++----- drivers/gpu/drm/i915/gt/selftest_reset.c | 2 +- drivers/gpu/drm/i915/gvt/scheduler.c | 3 ++- drivers/gpu/drm/i915/i915_debugfs.c | 6 +++--- drivers/gpu/drm/i915/i915_drv.h | 3 --- drivers/gpu/drm/i915/intel_gvt.c | 2 +- 8 files changed, 14 insertions(+), 16 deletions(-)