| Message ID | 20200120034937.128600-2-jian.hu@amlogic.com (mailing list archive) |
|---|---|
| State | Awaiting Upstream, archived |
| Headers | show |
| Series | add Amlogic A1 clock controller driver | expand |
On Mon, 20 Jan 2020 11:49:33 +0800, Jian Hu wrote: > Add the documentation to support Amlogic A1 PLL clock driver, > and add A1 PLL clock controller bindings. > > Signed-off-by: Jian Hu <jian.hu@amlogic.com> > --- > .../bindings/clock/amlogic,a1-pll-clkc.yaml | 52 +++++++++++++++++++ > include/dt-bindings/clock/a1-pll-clkc.h | 16 ++++++ > 2 files changed, 68 insertions(+) > create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml > create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h > Please add Acked-by/Reviewed-by tags when posting new versions. However, there's no need to repost patches *only* to add the tags. The upstream maintainer will do that for acks received on the version they apply. If a tag was not added on purpose, please state why and what changed.
On 2020/1/22 6:00, Rob Herring wrote: > On Mon, 20 Jan 2020 11:49:33 +0800, Jian Hu wrote: >> Add the documentation to support Amlogic A1 PLL clock driver, >> and add A1 PLL clock controller bindings. >> >> Signed-off-by: Jian Hu <jian.hu@amlogic.com> >> --- >> .../bindings/clock/amlogic,a1-pll-clkc.yaml | 52 +++++++++++++++++++ >> include/dt-bindings/clock/a1-pll-clkc.h | 16 ++++++ >> 2 files changed, 68 insertions(+) >> create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml >> create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h >> > > Please add Acked-by/Reviewed-by tags when posting new versions. However, > there's no need to repost patches *only* to add the tags. The upstream > maintainer will do that for acks received on the version they apply. > > If a tag was not added on purpose, please state why and what changed. > > . > I had gotten your Reviewed-by tag in v5 version, And the tag is missing in v6, I am sorry about it. There is something wrong in v6, it can not be compiled by dt_binding_check. It had been fixed in v7. Should I wait for your tag again? I will send v8 because the driver is changed a bit. Could I add your tag?
diff --git a/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml new file mode 100644 index 000000000000..d67250fbeece --- /dev/null +++ b/Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml @@ -0,0 +1,52 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/amlogic,a1-pll-clkc.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + +title: Amlogic Meson A/C serials PLL Clock Control Unit Device Tree Bindings + +maintainers: + - Neil Armstrong <narmstrong@baylibre.com> + - Jerome Brunet <jbrunet@baylibre.com> + - Jian Hu <jian.hu@jian.hu.com> + +properties: + compatible: + const: amlogic,a1-pll-clkc + + "#clock-cells": + const: 1 + + reg: + maxItems: 1 + + clocks: + items: + - description: input xtal_fixpll + - description: input xtal_hifipll + + clock-names: + items: + - const: xtal_fixpll + - const: xtal_hifipll + +required: + - compatible + - "#clock-cells" + - reg + - clocks + - clock-names + +additionalProperties: false + +examples: + - | + clkc_pll: pll-clock-controller@7c80 { + compatible = "amlogic,a1-pll-clkc"; + reg = <0 0x7c80 0 0x18c>; + #clock-cells = <1>; + clocks = <&clkc_periphs 1>, + <&clkc_periphs 4>; + clock-names = "xtal_fixpll", "xtal_hifipll"; + }; diff --git a/include/dt-bindings/clock/a1-pll-clkc.h b/include/dt-bindings/clock/a1-pll-clkc.h new file mode 100644 index 000000000000..58eae237e503 --- /dev/null +++ b/include/dt-bindings/clock/a1-pll-clkc.h @@ -0,0 +1,16 @@ +/* SPDX-License-Identifier: (GPL-2.0+ OR MIT) */ +/* + * Copyright (c) 2019 Amlogic, Inc. All rights reserved. + */ + +#ifndef __A1_PLL_CLKC_H +#define __A1_PLL_CLKC_H + +#define CLKID_FIXED_PLL 1 +#define CLKID_FCLK_DIV2 6 +#define CLKID_FCLK_DIV3 7 +#define CLKID_FCLK_DIV5 8 +#define CLKID_FCLK_DIV7 9 +#define CLKID_HIFI_PLL 10 + +#endif /* __A1_PLL_CLKC_H */
Add the documentation to support Amlogic A1 PLL clock driver, and add A1 PLL clock controller bindings. Signed-off-by: Jian Hu <jian.hu@amlogic.com> --- .../bindings/clock/amlogic,a1-pll-clkc.yaml | 52 +++++++++++++++++++ include/dt-bindings/clock/a1-pll-clkc.h | 16 ++++++ 2 files changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/clock/amlogic,a1-pll-clkc.yaml create mode 100644 include/dt-bindings/clock/a1-pll-clkc.h