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Mon, 20 Jan 2020 09:01:30 -0600 (CST) Received: from localhost (ZT-GROUP-IN.bear1.Houston1.Level3.net [4.14.58.158]) (Authenticated sender: linux@neuralgames.com) by kross2019.rwserver.com (Postfix) with ESMTPSA id 9F147B3628; Mon, 20 Jan 2020 09:01:30 -0600 (CST) From: Oscar A Perez To: Matt Mackall , Herbert Xu , Rob Herring , Mark Rutland , Joel Stanley , Andrew Jeffery , Oscar A Perez , linux-crypto@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-aspeed@lists.ozlabs.org, linux-kernel@vger.kernel.org Subject: [PATCH 1/2] hwrng: Add support for ASPEED RNG Date: Mon, 20 Jan 2020 15:01:08 +0000 Message-Id: <20200120150113.2565-1-linux@neuralgames.com> X-Mailer: git-send-email 2.17.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20200120_070135_623671_A583C105 X-CRM114-Status: GOOD ( 14.48 ) X-Spam-Score: -0.2 (/) X-Spam-Report: SpamAssassin version 3.4.3 on bombadil.infradead.org summary: Content analysis details: (-0.2 points) pts rule name description ---- ---------------------- -------------------------------------------------- 0.0 SPF_NONE SPF: sender does not publish an SPF Record 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from envelope-from domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patchwork-linux-arm=patchwork.kernel.org@lists.infradead.org This minimal driver adds support for the Hardware Random Number Generator that comes with the AST2400/AST2500/AST2600 SOCs from AspeedTech. The HRNG on these SOCs uses Ring Oscillators working together to generate a stream of random bits that can be read by the platform via a 32bit data register. Signed-off-by: Oscar A Perez --- .../devicetree/bindings/rng/aspeed-rng.yaml | 90 +++++++++++++++++++ 1 file changed, 90 insertions(+) create mode 100644 Documentation/devicetree/bindings/rng/aspeed-rng.yaml diff --git a/Documentation/devicetree/bindings/rng/aspeed-rng.yaml b/Documentation/devicetree/bindings/rng/aspeed-rng.yaml new file mode 100644 index 000000000000..06070ebe1c33 --- /dev/null +++ b/Documentation/devicetree/bindings/rng/aspeed-rng.yaml @@ -0,0 +1,90 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: "http://devicetree.org/schemas/rng/aspeed-rng.yaml#" +$schema: "http://devicetree.org/meta-schemas/core.yaml#" + + +title: Bindings for Aspeed Hardware Random Number Generator + + +maintainers: + - Oscar A Perez + + +description: | + The HRNG on the AST2400/AST2500/AST2600 SOCs from AspeedTech uses four Ring + Oscillators working together to generate a stream of random bits that can be + read by the platform via a 32bit data register every one microsecond. + All the platform has to do is to provide to the driver the 'quality' entropy + value, the 'mode' in which the combining ROs will generate the stream of + random bits and, the 'period' value that is used as a wait-time between reads + from the 32bit data register. + + +properties: + compatible: + oneOf: + - items: + - enum: + - aspeed,ast2400-rng + - aspeed,ast2500-rng + - aspeed,ast2600-rng + + + reg: + description: + Base address and length of the register set of this block. + Currently 'reg' must be eight bytes wide and 32-bit aligned. + + maxItems: 1 + + + period: + description: + Wait time in microseconds to be used between reads. + The RNG on these Aspeed SOCs generates 32bit of random data + every one microsecond. Choose between 1 and n microseconds. + + maxItems: 1 + + + mode: + description: + One of the eight modes in which the four internal ROs (Ring + Oscillators) are combined to generate a stream of random + bits. The default mode is seven which is the default method + of combining RO random bits on these Aspeed SOCs. + + maxItems: 1 + + + quality: + description: + Estimated number of bits of entropy per 1024 bits read from + the RNG. Note that the default quality is zero which stops + this HRNG from automatically filling the kernel's entropy + pool with data. + + maxItems: 1 + + +required: + - compatible + - reg + - period + - quality + + +examples: + - | + rng: hwrng@1e6e2074 { + compatible = "aspeed,ast2500-rng"; + reg = <0x1e6e2074 0x8>; + period = <4>; + quality = <128>; + mode = <0x7>; + }; + + +...