From patchwork Mon Jan 20 17:47:14 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: =?utf-8?b?VmlsbGUgU3lyasOkbMOk?= X-Patchwork-Id: 11342683 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 70921921 for ; Mon, 20 Jan 2020 17:47:46 +0000 (UTC) Received: from gabe.freedesktop.org (gabe.freedesktop.org [131.252.210.177]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 574E822527 for ; Mon, 20 Jan 2020 17:47:46 +0000 (UTC) DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 574E822527 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=linux.intel.com Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=intel-gfx-bounces@lists.freedesktop.org Received: from gabe.freedesktop.org (localhost [127.0.0.1]) by gabe.freedesktop.org (Postfix) with ESMTP id CEB276EA58; Mon, 20 Jan 2020 17:47:45 +0000 (UTC) X-Original-To: intel-gfx@lists.freedesktop.org Delivered-To: intel-gfx@lists.freedesktop.org Received: from mga03.intel.com (mga03.intel.com [134.134.136.65]) by gabe.freedesktop.org (Postfix) with ESMTPS id 616A46EA56 for ; Mon, 20 Jan 2020 17:47:44 +0000 (UTC) X-Amp-Result: SKIPPED(no attachment in message) X-Amp-File-Uploaded: False Received: from fmsmga003.fm.intel.com ([10.253.24.29]) by orsmga103.jf.intel.com with ESMTP/TLS/DHE-RSA-AES256-GCM-SHA384; 20 Jan 2020 09:47:43 -0800 X-ExtLoop1: 1 X-IronPort-AV: E=Sophos;i="5.70,342,1574150400"; d="scan'208";a="275093364" Received: from stinkbox.fi.intel.com (HELO stinkbox) ([10.237.72.174]) by FMSMGA003.fm.intel.com with SMTP; 20 Jan 2020 09:47:41 -0800 Received: by stinkbox (sSMTP sendmail emulation); Mon, 20 Jan 2020 19:47:40 +0200 From: Ville Syrjala To: intel-gfx@lists.freedesktop.org Date: Mon, 20 Jan 2020 19:47:14 +0200 Message-Id: <20200120174728.21095-5-ville.syrjala@linux.intel.com> X-Mailer: git-send-email 2.24.1 In-Reply-To: <20200120174728.21095-1-ville.syrjala@linux.intel.com> References: <20200120174728.21095-1-ville.syrjala@linux.intel.com> MIME-Version: 1.0 Subject: [Intel-gfx] [PATCH 04/17] drm/i915: Move more cdclk state handling into the cdclk code X-BeenThere: intel-gfx@lists.freedesktop.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Intel graphics driver community testing & development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" From: Ville Syrjälä Move the initial setup of state->{cdclk,min_cdclk[],min_voltage_level[]} into intel_modeset_calc_cdclk(), and we'll move the counterparts into intel_cdclk_swap_state(). This encapsulates the cdclk state much better. Signed-off-by: Ville Syrjälä Reviewed-by: José Roberto de Souza --- drivers/gpu/drm/i915/display/intel_cdclk.c | 26 +++++++++++++++----- drivers/gpu/drm/i915/display/intel_display.c | 11 --------- 2 files changed, 20 insertions(+), 17 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_cdclk.c b/drivers/gpu/drm/i915/display/intel_cdclk.c index 0ce5926006ca..05f6c6456ddf 100644 --- a/drivers/gpu/drm/i915/display/intel_cdclk.c +++ b/drivers/gpu/drm/i915/display/intel_cdclk.c @@ -1819,6 +1819,14 @@ void intel_cdclk_swap_state(struct intel_atomic_state *state) { struct drm_i915_private *dev_priv = to_i915(state->base.dev); + /* FIXME maybe swap() these too */ + memcpy(dev_priv->min_cdclk, state->min_cdclk, + sizeof(state->min_cdclk)); + memcpy(dev_priv->min_voltage_level, state->min_voltage_level, + sizeof(state->min_voltage_level)); + + dev_priv->cdclk.force_min_cdclk = state->cdclk.force_min_cdclk; + swap(state->cdclk.logical, dev_priv->cdclk.logical); swap(state->cdclk.actual, dev_priv->cdclk.actual); } @@ -2033,9 +2041,6 @@ static int intel_compute_min_cdclk(struct intel_atomic_state *state) int min_cdclk, i; enum pipe pipe; - memcpy(state->min_cdclk, dev_priv->min_cdclk, - sizeof(state->min_cdclk)); - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { int ret; @@ -2082,9 +2087,6 @@ static int bxt_compute_min_voltage_level(struct intel_atomic_state *state) int i; enum pipe pipe; - memcpy(state->min_voltage_level, dev_priv->min_voltage_level, - sizeof(state->min_voltage_level)); - for_each_new_intel_crtc_in_state(state, crtc, crtc_state, i) { int ret; @@ -2339,6 +2341,18 @@ int intel_modeset_calc_cdclk(struct intel_atomic_state *state) enum pipe pipe; int ret; + memcpy(state->min_cdclk, dev_priv->min_cdclk, + sizeof(state->min_cdclk)); + memcpy(state->min_voltage_level, dev_priv->min_voltage_level, + sizeof(state->min_voltage_level)); + + /* keep the current setting */ + if (!state->cdclk.force_min_cdclk_changed) + state->cdclk.force_min_cdclk = dev_priv->cdclk.force_min_cdclk; + + state->cdclk.logical = dev_priv->cdclk.logical; + state->cdclk.actual = dev_priv->cdclk.actual; + ret = dev_priv->display.modeset_calc_cdclk(state); if (ret) return ret; diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index 8dcb86c51aaa..930e9256596c 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -14360,14 +14360,8 @@ static int intel_modeset_checks(struct intel_atomic_state *state) struct intel_crtc *crtc; int ret, i; - /* keep the current setting */ - if (!state->cdclk.force_min_cdclk_changed) - state->cdclk.force_min_cdclk = dev_priv->cdclk.force_min_cdclk; - state->modeset = true; state->active_pipes = dev_priv->active_pipes; - state->cdclk.logical = dev_priv->cdclk.logical; - state->cdclk.actual = dev_priv->cdclk.actual; for_each_oldnew_intel_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) { @@ -15673,12 +15667,7 @@ static int intel_atomic_commit(struct drm_device *dev, if (state->global_state_changed) { assert_global_state_locked(dev_priv); - memcpy(dev_priv->min_cdclk, state->min_cdclk, - sizeof(state->min_cdclk)); - memcpy(dev_priv->min_voltage_level, state->min_voltage_level, - sizeof(state->min_voltage_level)); dev_priv->active_pipes = state->active_pipes; - dev_priv->cdclk.force_min_cdclk = state->cdclk.force_min_cdclk; intel_cdclk_swap_state(state); }