| Message ID | 20200121085910.28834-3-anup.patel@wdc.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | RISC-V TIME CSR for privileged mode | expand |
On Tue, Jan 21, 2020 at 7:04 PM Anup Patel <Anup.Patel@wdc.com> wrote: > > This patch extends CLINT emulation to provide rdtime callback for > TCG. This rdtime callback will be called wheneven TIME CSRs are > read in privileged modes. > > Signed-off-by: Anup Patel <anup.patel@wdc.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Alistair > --- > hw/riscv/sifive_clint.c | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c > index e5a8f75cee..805503dc27 100644 > --- a/hw/riscv/sifive_clint.c > +++ b/hw/riscv/sifive_clint.c > @@ -236,6 +236,7 @@ DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts, > if (!env) { > continue; > } > + riscv_cpu_set_rdtime_fn(env, cpu_riscv_read_rtc); > env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, > &sifive_clint_timer_cb, cpu); > env->timecmp = 0; > -- > 2.17.1 > >
diff --git a/hw/riscv/sifive_clint.c b/hw/riscv/sifive_clint.c index e5a8f75cee..805503dc27 100644 --- a/hw/riscv/sifive_clint.c +++ b/hw/riscv/sifive_clint.c @@ -236,6 +236,7 @@ DeviceState *sifive_clint_create(hwaddr addr, hwaddr size, uint32_t num_harts, if (!env) { continue; } + riscv_cpu_set_rdtime_fn(env, cpu_riscv_read_rtc); env->timer = timer_new_ns(QEMU_CLOCK_VIRTUAL, &sifive_clint_timer_cb, cpu); env->timecmp = 0;
This patch extends CLINT emulation to provide rdtime callback for TCG. This rdtime callback will be called wheneven TIME CSRs are read in privileged modes. Signed-off-by: Anup Patel <anup.patel@wdc.com> --- hw/riscv/sifive_clint.c | 1 + 1 file changed, 1 insertion(+)