| Message ID | 1579787449-27599-21-git-send-email-pbonzini@redhat.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | [PULL,01/59] cpu: Introduce cpu_class_set_parent_reset() | expand |
On Thu, 23 Jan 2020 14:50:10 +0100 Paolo Bonzini <pbonzini@redhat.com> wrote: > KVM can return the host microcode revision as a feature MSR. > Use it as the default value for -cpu host. > > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> > Message-Id: <1579544504-3616-4-git-send-email-pbonzini@redhat.com> > Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> > --- > target/i386/cpu.c | 4 ++++ > target/i386/kvm.c | 5 +++++ > 2 files changed, 9 insertions(+) Hey Paolo, My Windows 10 VM boot loops with this :-\ It seems to be related to the CPU model. Now fails (host-passthrough): -cpu host,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off Works (host-model): -cpu IvyBridge-IBRS,ss=on,vmx=on,pcid=on,hypervisor=on,arat=on,tsc-adjust=on,umip=on,md-clear=on,stibp=on,arch-capabilities=on,ssbd=on,xsaveopt=on,skip-l1dfl-vmentry=on,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off Thanks, Alex > diff --git a/target/i386/cpu.c b/target/i386/cpu.c > index 790254e..ffe5de0 100644 > --- a/target/i386/cpu.c > +++ b/target/i386/cpu.c > @@ -6416,6 +6416,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) > &cpu->mwait.ecx, &cpu->mwait.edx); > env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR; > } > + if (kvm_enabled() && cpu->ucode_rev == 0) { > + cpu->ucode_rev = kvm_arch_get_supported_msr_feature(kvm_state, > + MSR_IA32_UCODE_REV); > + } > } > > if (cpu->ucode_rev == 0) { > diff --git a/target/i386/kvm.c b/target/i386/kvm.c > index f6dd6b7..1b67090 100644 > --- a/target/i386/kvm.c > +++ b/target/i386/kvm.c > @@ -2696,6 +2696,11 @@ static void kvm_init_msrs(X86CPU *cpu) > env->features[FEAT_CORE_CAPABILITY]); > } > > + if (kvm_arch_get_supported_msr_feature(kvm_state, > + MSR_IA32_UCODE_REV)) { > + kvm_msr_entry_add(cpu, MSR_IA32_UCODE_REV, cpu->ucode_rev); > + } > + > /* > * Older kernels do not include VMX MSRs in KVM_GET_MSR_INDEX_LIST, but > * all kernels with MSR features should have them.
On 07/02/20 00:24, Alex Williamson wrote: > Hey Paolo, > > My Windows 10 VM boot loops with this :-\ It seems to be related to > the CPU model. Now fails (host-passthrough): > > -cpu host,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off Can you try adding ucode-rev=0x100000000 just to double check that it's the microcode version? Also perhaps doing "rdmsr 0x8b" and if you have anything set in bits 0-31 clearing them. Thanks, Paolo
On Fri, 7 Feb 2020 00:40:31 +0100 Paolo Bonzini <pbonzini@redhat.com> wrote: > On 07/02/20 00:24, Alex Williamson wrote: > > Hey Paolo, > > > > My Windows 10 VM boot loops with this :-\ It seems to be related to > > the CPU model. Now fails (host-passthrough): > > > > -cpu host,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off > > Can you try adding ucode-rev=0x100000000 just to double check that it's > the microcode version? Yes, it boots with: -cpu host,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off,ucode-rev=0x100000000 > Also perhaps doing "rdmsr 0x8b" and if you have > anything set in bits 0-31 clearing them. How would I do that? Thanks, Alex
On Fri, 7 Feb 2020 08:51:58 -0700 Alex Williamson <alex.williamson@redhat.com> wrote: > On Fri, 7 Feb 2020 00:40:31 +0100 > Paolo Bonzini <pbonzini@redhat.com> wrote: > > > On 07/02/20 00:24, Alex Williamson wrote: > > > Hey Paolo, > > > > > > My Windows 10 VM boot loops with this :-\ It seems to be related to > > > the CPU model. Now fails (host-passthrough): > > > > > > -cpu host,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off > > > > Can you try adding ucode-rev=0x100000000 just to double check that it's > > the microcode version? > > Yes, it boots with: > > -cpu host,hv-time,hv-relaxed,hv-vapic,hv-spinlocks=0x1fff,hv-vendor-id=KeenlyKVM,kvm=off,ucode-rev=0x100000000 > > > Also perhaps doing "rdmsr 0x8b" and if you have > > anything set in bits 0-31 clearing them. > > How would I do that? Thanks, Here's the simplest case that I can reproduce with: /usr/local/bin/qemu-system-x86_64 \ -S \ -machine pc,accel=kvm \ -cpu host \ -m 4096 \ -smp 2,sockets=1,cores=2,threads=1 \ -vga std \ -vnc :0 \ -no-user-config \ -nodefaults \ -monitor stdio \ -serial none \ -parallel none \ -net none \ -cdrom en_windows_10_consumer_edition_version_1809_updated_april_2019_x64_dvd_b6a14039.iso This blue screens with a stop code: MICROCODE REVISION MISMATCH If I disable SMP for the guest or add the ucode-rev option it boots to the installer. I don't currently have newer local ISO images, but I could download some if necessary. Host cpu: # lscpu Architecture: x86_64 CPU op-mode(s): 32-bit, 64-bit Byte Order: Little Endian CPU(s): 8 On-line CPU(s) list: 0-7 Thread(s) per core: 2 Core(s) per socket: 4 Socket(s): 1 NUMA node(s): 1 Vendor ID: GenuineIntel CPU family: 6 Model: 58 Model name: Intel(R) Xeon(R) CPU E3-1245 V2 @ 3.40GHz Stepping: 9 CPU MHz: 1601.482 CPU max MHz: 3800.0000 CPU min MHz: 1600.0000 BogoMIPS: 6805.62 Virtualization: VT-x L1d cache: 32K L1i cache: 32K L2 cache: 256K L3 cache: 8192K NUMA node0 CPU(s): 0-7 Flags: fpu vme de pse tsc msr pae mce cx8 apic sep mtrr pge mca cmov pat pse36 clflush dts acpi mmx fxsr sse sse2 ss ht tm pbe syscall nx rdtscp lm constant_tsc arch_perfmon pebs bts rep_good nopl xtopology nonstop_tsc cpuid aperfmperf pni pclmulqdq dtes64 monitor ds_cpl vmx smx est tm2 ssse3 cx16 xtpr pdcm pcid sse4_1 sse4_2 x2apic popcnt tsc_deadline_timer aes xsave avx f16c rdrand lahf_lm cpuid_fault epb pti ssbd ibrs ibpb stibp tpr_shadow vnmi flexpriority ept vpid fsgsbase smep erms xsaveopt dtherm ida arat pln pts md_clear flush_l1d # dmesg | grep microcode [ 0.000000] microcode: microcode updated early to revision 0x21, date = 2019-02-13 [ 11.454405] microcode: sig=0x306a9, pf=0x2, revision=0x21 [ 11.465289] microcode: Microcode Update Driver: v2.2.
diff --git a/target/i386/cpu.c b/target/i386/cpu.c index 790254e..ffe5de0 100644 --- a/target/i386/cpu.c +++ b/target/i386/cpu.c @@ -6416,6 +6416,10 @@ static void x86_cpu_realizefn(DeviceState *dev, Error **errp) &cpu->mwait.ecx, &cpu->mwait.edx); env->features[FEAT_1_ECX] |= CPUID_EXT_MONITOR; } + if (kvm_enabled() && cpu->ucode_rev == 0) { + cpu->ucode_rev = kvm_arch_get_supported_msr_feature(kvm_state, + MSR_IA32_UCODE_REV); + } } if (cpu->ucode_rev == 0) { diff --git a/target/i386/kvm.c b/target/i386/kvm.c index f6dd6b7..1b67090 100644 --- a/target/i386/kvm.c +++ b/target/i386/kvm.c @@ -2696,6 +2696,11 @@ static void kvm_init_msrs(X86CPU *cpu) env->features[FEAT_CORE_CAPABILITY]); } + if (kvm_arch_get_supported_msr_feature(kvm_state, + MSR_IA32_UCODE_REV)) { + kvm_msr_entry_add(cpu, MSR_IA32_UCODE_REV, cpu->ucode_rev); + } + /* * Older kernels do not include VMX MSRs in KVM_GET_MSR_INDEX_LIST, but * all kernels with MSR features should have them.