[4.4.y-cip,03/10] ARM: dts: r8a7744: Add TPU support
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Message ID 1579856900-21381-4-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
State Accepted
Delegated to: Nobuhiro Iwamatsu
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Series
  • Renesas RZ/G1N extend peripherals supported by platform
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Commit Message

Lad Prabhakar Jan. 24, 2020, 9:08 a.m. UTC
From: Biju Das <biju.das@bp.renesas.com>

commit eb83d144978e9f21aaa1372d75b50f3eec22ed48 upstream.

Add TPU support to SoC DT.

Signed-off-by: Biju Das <biju.das@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
(updated clock and power-domains property. removed resets property)
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
---
 arch/arm/boot/dts/r8a7744.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/r8a7744.dtsi b/arch/arm/boot/dts/r8a7744.dtsi
index 79c71ef..425915a 100644
--- a/arch/arm/boot/dts/r8a7744.dtsi
+++ b/arch/arm/boot/dts/r8a7744.dtsi
@@ -260,6 +260,15 @@ 
 			reg = <0 0xe6060000 0 0x250>;
 		};
 
+		tpu: pwm@e60f0000 {
+			compatible = "renesas,tpu-r8a7744", "renesas,tpu";
+			reg = <0 0xe60f0000 0 0x148>;
+			clocks = <&mstp3_clks R8A7744_CLK_TPU0>;
+			power-domains = <&cpg_clocks>;
+			#pwm-cells = <3>;
+			status = "disabled";
+		};
+
 		apmu@e6152000 {
 			compatible = "renesas,r8a7744-apmu", "renesas,apmu";
 			reg = <0 0xe6152000 0 0x188>;