[1/8] clk: sunxi-ng: sun8i-de2: Swap A64 and H6 definitions
diff mbox series

Message ID 20200124232014.574989-2-jernej.skrabec@siol.net
State New
Headers show
Series
  • media: sunxi: Add DE2 rotate driver
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Commit Message

Jernej Škrabec Jan. 24, 2020, 11:20 p.m. UTC
For some reason, A64 and H6 have swapped clocks and resets definitions.
H6 doesn't have rotation unit while A64 has. Swap around to correct the
issue.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
---
 drivers/clk/sunxi-ng/ccu-sun8i-de2.c | 18 +++++++++---------
 1 file changed, 9 insertions(+), 9 deletions(-)

Comments

Chen-Yu Tsai Jan. 25, 2020, 3:05 a.m. UTC | #1
On Sat, Jan 25, 2020 at 7:20 AM Jernej Skrabec <jernej.skrabec@siol.net> wrote:
>
> For some reason, A64 and H6 have swapped clocks and resets definitions.
> H6 doesn't have rotation unit while A64 has. Swap around to correct the
> issue.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>

Could you add Fixes tags for this one?

ChenYu
Jernej Škrabec Jan. 25, 2020, 11:20 a.m. UTC | #2
Hi!

Dne sobota, 25. januar 2020 ob 04:05:33 CET je Chen-Yu Tsai napisal(a):
> On Sat, Jan 25, 2020 at 7:20 AM Jernej Skrabec <jernej.skrabec@siol.net> 
wrote:
> > For some reason, A64 and H6 have swapped clocks and resets definitions.
> > H6 doesn't have rotation unit while A64 has. Swap around to correct the
> > issue.
> > 
> > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> 
> Could you add Fixes tags for this one?

I'm not sure which commit to reference. H6 one? or also initial A64 one?

I just found out that H5 compatible uses A64 structure, which is not correct. 
H5 doesn't contain rotate core.

Do you have any better idea how to nicely solve this mess? I'm thinking that 
for v2 I would first decouple some compatibles, like this for H5 and R40 and 
V3s from A83T (as it can be seen in the next patch). After that, rather than 
switching definitions I would fix each compatible one by one. At the end, if any 
entry is duplicated, I can add one commit to merge same structures.

What do you think?

Best regards,
Jernej
Jernej Škrabec Jan. 25, 2020, 11:24 a.m. UTC | #3
Dne sobota, 25. januar 2020 ob 12:20:18 CET je Jernej Škrabec napisal(a):
> Hi!
> 
> Dne sobota, 25. januar 2020 ob 04:05:33 CET je Chen-Yu Tsai napisal(a):
> > On Sat, Jan 25, 2020 at 7:20 AM Jernej Skrabec <jernej.skrabec@siol.net>
> 
> wrote:
> > > For some reason, A64 and H6 have swapped clocks and resets definitions.
> > > H6 doesn't have rotation unit while A64 has. Swap around to correct the
> > > issue.
> > > 
> > > Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
> > 
> > Could you add Fixes tags for this one?
> 
> I'm not sure which commit to reference. H6 one? or also initial A64 one?
> 
> I just found out that H5 compatible uses A64 structure, which is not
> correct. H5 doesn't contain rotate core.
> 
> Do you have any better idea how to nicely solve this mess? I'm thinking that
> for v2 I would first decouple some compatibles, like this for H5 and R40
> and V3s from A83T (as it can be seen in the next patch). After that, rather
> than switching definitions I would fix each compatible one by one. At the
> end, if any entry is duplicated, I can add one commit to merge same
> structures.

This could also be a separate series of patches on which rotate driver series 
depends on.
 
Best regards,
Jernej

Patch
diff mbox series

diff --git a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
index d9668493c3f9..08074d935317 100644
--- a/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
+++ b/drivers/clk/sunxi-ng/ccu-sun8i-de2.c
@@ -51,7 +51,7 @@  static SUNXI_CCU_M(mixer1_div_a83_clk, "mixer1-div", "pll-de", 0x0c, 4, 4,
 static SUNXI_CCU_M(wb_div_a83_clk, "wb-div", "pll-de", 0x0c, 8, 4,
 		   CLK_SET_RATE_PARENT);
 
-static struct ccu_common *sun50i_h6_de3_clks[] = {
+static struct ccu_common *sun50i_a64_de2_clks[] = {
 	&mixer0_clk.common,
 	&mixer1_clk.common,
 	&wb_clk.common,
@@ -156,7 +156,7 @@  static struct clk_hw_onecell_data sun8i_v3s_de2_hw_clks = {
 	.num	= CLK_NUMBER_WITHOUT_ROT,
 };
 
-static struct clk_hw_onecell_data sun50i_h6_de3_hw_clks = {
+static struct clk_hw_onecell_data sun50i_a64_de2_hw_clks = {
 	.hws	= {
 		[CLK_MIXER0]		= &mixer0_clk.common.hw,
 		[CLK_MIXER1]		= &mixer1_clk.common.hw,
@@ -190,13 +190,13 @@  static struct ccu_reset_map sun50i_a64_de2_resets[] = {
 	[RST_MIXER0]	= { 0x08, BIT(0) },
 	[RST_MIXER1]	= { 0x08, BIT(1) },
 	[RST_WB]	= { 0x08, BIT(2) },
+	[RST_ROT]	= { 0x08, BIT(3) },
 };
 
 static struct ccu_reset_map sun50i_h6_de3_resets[] = {
 	[RST_MIXER0]	= { 0x08, BIT(0) },
 	[RST_MIXER1]	= { 0x08, BIT(1) },
 	[RST_WB]	= { 0x08, BIT(2) },
-	[RST_ROT]	= { 0x08, BIT(3) },
 };
 
 static const struct sunxi_ccu_desc sun8i_a83t_de2_clk_desc = {
@@ -220,20 +220,20 @@  static const struct sunxi_ccu_desc sun8i_h3_de2_clk_desc = {
 };
 
 static const struct sunxi_ccu_desc sun50i_a64_de2_clk_desc = {
-	.ccu_clks	= sun8i_h3_de2_clks,
-	.num_ccu_clks	= ARRAY_SIZE(sun8i_h3_de2_clks),
+	.ccu_clks	= sun50i_a64_de2_clks,
+	.num_ccu_clks	= ARRAY_SIZE(sun50i_a64_de2_clks),
 
-	.hw_clks	= &sun8i_h3_de2_hw_clks,
+	.hw_clks	= &sun50i_a64_de2_hw_clks,
 
 	.resets		= sun50i_a64_de2_resets,
 	.num_resets	= ARRAY_SIZE(sun50i_a64_de2_resets),
 };
 
 static const struct sunxi_ccu_desc sun50i_h6_de3_clk_desc = {
-	.ccu_clks	= sun50i_h6_de3_clks,
-	.num_ccu_clks	= ARRAY_SIZE(sun50i_h6_de3_clks),
+	.ccu_clks	= sun8i_h3_de2_clks,
+	.num_ccu_clks	= ARRAY_SIZE(sun8i_h3_de2_clks),
 
-	.hw_clks	= &sun50i_h6_de3_hw_clks,
+	.hw_clks	= &sun8i_h3_de2_hw_clks,
 
 	.resets		= sun50i_h6_de3_resets,
 	.num_resets	= ARRAY_SIZE(sun50i_h6_de3_resets),