[RFC,2/6] drm/i915/guc: Add request_alloc for guc_submission
diff mbox series

Message ID 20200125005537.31860-3-daniele.ceraolospurio@intel.com
State New
Headers show
Series
  • Start separating GuC and execlists submission
Related show

Commit Message

Daniele Ceraolo Spurio Jan. 25, 2020, 12:55 a.m. UTC
A straight copy of the execlists one to begin with. Tweaks will come
later if needed.

Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: John Harrison <John.C.Harrison@Intel.com>
Cc: Matthew Brost <matthew.brost@intel.com>
---
 .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 35 +++++++++++++++++++
 1 file changed, 35 insertions(+)

Patch
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diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
index a4caa0f9dfbf..bf40793e32e5 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c
@@ -18,6 +18,9 @@ 
 #include "i915_drv.h"
 #include "i915_trace.h"
 
+/* Typical size of the average request (2 pipecontrols and a MI_BB) */
+#define GUC_REQUEST_SIZE 64 /* bytes */
+
 /**
  * DOC: GuC-based command submission
  *
@@ -498,6 +501,36 @@  static void guc_reset_finish(struct intel_engine_cs *engine)
 		     atomic_read(&execlists->tasklet.count));
 }
 
+static int guc_submission_request_alloc(struct i915_request *request)
+{
+	int ret;
+
+	GEM_BUG_ON(!intel_context_is_pinned(request->context));
+
+	/*
+	 * Flush enough space to reduce the likelihood of waiting after
+	 * we start building the request - in which case we will just
+	 * have to repeat work.
+	 */
+	request->reserved_space += GUC_REQUEST_SIZE;
+
+	/*
+	 * Note that after this point, we have committed to using
+	 * this request as it is being used to both track the
+	 * state of engine initialisation and liveness of the
+	 * golden renderstate above. Think twice before you try
+	 * to cancel/unwind this request now.
+	 */
+
+	/* Unconditionally invalidate GPU caches and TLBs. */
+	ret = request->engine->emit_flush(request, EMIT_INVALIDATE);
+	if (ret)
+		return ret;
+
+	request->reserved_space -= GUC_REQUEST_SIZE;
+	return 0;
+}
+
 static int emit_init_breadcrumb(struct i915_request *rq)
 {
 	u32 *cs;
@@ -712,6 +745,8 @@  static void guc_submission_default_vfuncs(struct intel_engine_cs *engine)
 {
 	/* Default vfuncs which can be overriden by each engine. */
 
+	engine->request_alloc = guc_submission_request_alloc;
+
 	engine->emit_init_breadcrumb = emit_init_breadcrumb;
 	engine->emit_fini_breadcrumb = emit_fini_breadcrumb_xcs;