diff mbox series

[v2,-next] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all

Message ID 1580283909-32678-1-git-send-email-radhey.shyam.pandey@xilinx.com (mailing list archive)
State Accepted
Headers show
Series [v2,-next] dmaengine: xilinx_dma: Reset DMA channel in dma_terminate_all | expand

Commit Message

Radhey Shyam Pandey Jan. 29, 2020, 7:45 a.m. UTC
Reset DMA channel after stop to ensure that pending transfers and FIFOs
in the datapath are flushed or completed. It also cleanup the terminate
path and removes stop for the cyclic mode as after the reset stop is not
required. This fixes intermittent data verification failure when xilinx
dma test the client is stressed and loaded/unloaded multiple times.

Signed-off-by: Radhey Shyam Pandey <radhey.shyam.pandey@xilinx.com>
---
Changes for v2:
Modified commit description to add failure description and explain why
stop is removed for cyclic mode.
---
 drivers/dma/xilinx/xilinx_dma.c | 17 +++++++++--------
 1 file changed, 9 insertions(+), 8 deletions(-)

Comments

Vinod Koul Feb. 24, 2020, 4:53 p.m. UTC | #1
On 29-01-20, 13:15, Radhey Shyam Pandey wrote:
> Reset DMA channel after stop to ensure that pending transfers and FIFOs
> in the datapath are flushed or completed. It also cleanup the terminate
> path and removes stop for the cyclic mode as after the reset stop is not
> required. This fixes intermittent data verification failure when xilinx
> dma test the client is stressed and loaded/unloaded multiple times.

Applied, thanks
diff mbox series

Patch

diff --git a/drivers/dma/xilinx/xilinx_dma.c b/drivers/dma/xilinx/xilinx_dma.c
index a9c5d5cc9f2b..6f1539cad1ee 100644
--- a/drivers/dma/xilinx/xilinx_dma.c
+++ b/drivers/dma/xilinx/xilinx_dma.c
@@ -2404,16 +2404,17 @@  static int xilinx_dma_terminate_all(struct dma_chan *dchan)
 	u32 reg;
 	int err;
 
-	if (chan->cyclic)
-		xilinx_dma_chan_reset(chan);
-
-	err = chan->stop_transfer(chan);
-	if (err) {
-		dev_err(chan->dev, "Cannot stop channel %p: %x\n",
-			chan, dma_ctrl_read(chan, XILINX_DMA_REG_DMASR));
-		chan->err = true;
+	if (!chan->cyclic) {
+		err = chan->stop_transfer(chan);
+		if (err) {
+			dev_err(chan->dev, "Cannot stop channel %p: %x\n",
+				chan, dma_ctrl_read(chan,
+				XILINX_DMA_REG_DMASR));
+			chan->err = true;
+		}
 	}
 
+	xilinx_dma_chan_reset(chan);
 	/* Remove and free all of the descriptors in the lists */
 	xilinx_dma_free_descriptors(chan);
 	chan->idle = true;