ARM: dts: exynos: Fix broken reboot on some Odroid U2/X2/U3 boards
diff mbox series

Message ID 20200131103709.15763-1-m.szyprowski@samsung.com
State Accepted
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Series
  • ARM: dts: exynos: Fix broken reboot on some Odroid U2/X2/U3 boards
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Commit Message

Marek Szyprowski Jan. 31, 2020, 10:37 a.m. UTC
The bootloader on Odroid U2/X2/U3 boards configures main ARM clock to
1GHz. During the system shutdown procedure Linux kernel selects so called
'suspend-opp' for the CPU cores, what means that ARM clock is set to
800MHz and the CPU supply voltage is adjusted to that value. PMIC
configuration is preserved during the board reboot. Later when the
bootloader tries to enter the 1GHz mode, the voltage value configured by
the kernel might be not high enough for the CPU to operate stable. This
depends on the individual physical properties of each SoC (usually it is
related to the production series) and varies between the boards.
Typically most of the Odroid U3 boards work fine, while most of the U2
and X2 hangs during the reboot.

This commit switches suspend-opp to 1GHz for the Odroid U2/X2/U3 boards,
what finally fixes this issue.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
---
 arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 9 +++++++++
 1 file changed, 9 insertions(+)

Comments

Krzysztof Kozlowski Jan. 31, 2020, 11:20 a.m. UTC | #1
On Fri, 31 Jan 2020 at 11:37, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>
> The bootloader on Odroid U2/X2/U3 boards configures main ARM clock to
> 1GHz. During the system shutdown procedure Linux kernel selects so called
> 'suspend-opp' for the CPU cores, what means that ARM clock is set to
> 800MHz and the CPU supply voltage is adjusted to that value. PMIC
> configuration is preserved during the board reboot. Later when the
> bootloader tries to enter the 1GHz mode, the voltage value configured by
> the kernel might be not high enough for the CPU to operate stable. This
> depends on the individual physical properties of each SoC (usually it is
> related to the production series) and varies between the boards.
> Typically most of the Odroid U3 boards work fine, while most of the U2
> and X2 hangs during the reboot.
>
> This commit switches suspend-opp to 1GHz for the Odroid U2/X2/U3 boards,
> what finally fixes this issue.
>
> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> ---
>  arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 9 +++++++++
>  1 file changed, 9 insertions(+)
>
> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> index ea55f377d17c..0126587c7fab 100644
> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
> @@ -534,6 +534,15 @@
>         cap-mmc-highspeed;
>  };
>
> +&cpu0_opp_table {
> +       opp-1000000000 {
> +               opp-suspend;
> +       };
> +       opp-800000000 {
> +               /delete-property/opp-suspend;
> +       };
> +};

Looks good, thanks! I'll take it after merge window.
However if there is a resend, please put it after &cpu0 label.
Otherwise, I'll reshuffle it while applying.

Best regards,
Krzysztof
Andrzej Pietrasiewicz Jan. 31, 2020, 11:50 a.m. UTC | #2
Hi Marek,

Thank you for the patch,

W dniu 31.01.2020 o 12:20, Krzysztof Kozlowski pisze:
> On Fri, 31 Jan 2020 at 11:37, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
>>
>> The bootloader on Odroid U2/X2/U3 boards configures main ARM clock to
>> 1GHz. During the system shutdown procedure Linux kernel selects so called
>> 'suspend-opp' for the CPU cores, what means that ARM clock is set to
>> 800MHz and the CPU supply voltage is adjusted to that value. PMIC
>> configuration is preserved during the board reboot. Later when the
>> bootloader tries to enter the 1GHz mode, the voltage value configured by
>> the kernel might be not high enough for the CPU to operate stable. This
>> depends on the individual physical properties of each SoC (usually it is
>> related to the production series) and varies between the boards.
>> Typically most of the Odroid U3 boards work fine, while most of the U2
>> and X2 hangs during the reboot.
>>
>> This commit switches suspend-opp to 1GHz for the Odroid U2/X2/U3 boards,
>> what finally fixes this issue.
>>

I added a "reboot" command to my bashrc and tested on v5.5
on an Odroid U2. Without the patch applied it hangs on the first or the
second reboot. With the patch applied it has been continuously running
without problems for over an hour, with each cycle taking ~30s, so it's
been well over 100 reboot cycles and still no problem. With that
in mind you can add my

Tested-by: Andrzej Pietrasiewicz <andrzej.p@collabora.com>

>> Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
>> ---
>>   arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 9 +++++++++
>>   1 file changed, 9 insertions(+)
>>
>> diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> index ea55f377d17c..0126587c7fab 100644
>> --- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> +++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
>> @@ -534,6 +534,15 @@
>>          cap-mmc-highspeed;
>>   };
>>
>> +&cpu0_opp_table {
>> +       opp-1000000000 {
>> +               opp-suspend;
>> +       };
>> +       opp-800000000 {
>> +               /delete-property/opp-suspend;
>> +       };
>> +};
> 
> Looks good, thanks! I'll take it after merge window.
> However if there is a resend, please put it after &cpu0 label.
> Otherwise, I'll reshuffle it while applying.
> 
> Best regards,
> Krzysztof
>
Krzysztof Kozlowski Feb. 10, 2020, 7:25 p.m. UTC | #3
On Fri, Jan 31, 2020 at 12:20:03PM +0100, Krzysztof Kozlowski wrote:
> On Fri, 31 Jan 2020 at 11:37, Marek Szyprowski <m.szyprowski@samsung.com> wrote:
> >
> > The bootloader on Odroid U2/X2/U3 boards configures main ARM clock to
> > 1GHz. During the system shutdown procedure Linux kernel selects so called
> > 'suspend-opp' for the CPU cores, what means that ARM clock is set to
> > 800MHz and the CPU supply voltage is adjusted to that value. PMIC
> > configuration is preserved during the board reboot. Later when the
> > bootloader tries to enter the 1GHz mode, the voltage value configured by
> > the kernel might be not high enough for the CPU to operate stable. This
> > depends on the individual physical properties of each SoC (usually it is
> > related to the production series) and varies between the boards.
> > Typically most of the Odroid U3 boards work fine, while most of the U2
> > and X2 hangs during the reboot.
> >
> > This commit switches suspend-opp to 1GHz for the Odroid U2/X2/U3 boards,
> > what finally fixes this issue.
> >
> > Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
> > ---
> >  arch/arm/boot/dts/exynos4412-odroid-common.dtsi | 9 +++++++++

Thanks, applied.

Best regards,
Krzysztof

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
index ea55f377d17c..0126587c7fab 100644
--- a/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
+++ b/arch/arm/boot/dts/exynos4412-odroid-common.dtsi
@@ -534,6 +534,15 @@ 
 	cap-mmc-highspeed;
 };
 
+&cpu0_opp_table {
+	opp-1000000000 {
+		opp-suspend;
+	};
+	opp-800000000 {
+		/delete-property/opp-suspend;
+	};
+};
+
 &rtc {
 	status = "okay";
 	clocks = <&clock CLK_RTC>, <&max77686 MAX77686_CLK_AP>;