[v2] drm/i915/tgl: Add Wa_1606054188:tgl
diff mbox series

Message ID 20200201031951.3209-1-matthew.s.atwood@intel.com
State New
Headers show
Series
  • [v2] drm/i915/tgl: Add Wa_1606054188:tgl
Related show

Commit Message

Matt Atwood Feb. 1, 2020, 3:19 a.m. UTC
On Tiger Lake we do not support source keying in the pixel formats P010,
P012, P016.

v2: Move WA to end of function. Create helper function for format
check. Less verbose debugging messaging.

Bspec: 52890
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Manasi Navare <manasi.d.navare@intel.com>
CC: Ville Syrjälä <ville.syrjala@intel.com>
Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
---
 drivers/gpu/drm/i915/display/intel_sprite.c | 22 +++++++++++++++++++++
 1 file changed, 22 insertions(+)

Comments

Ville Syrjälä Jan. 31, 2020, 7:39 p.m. UTC | #1
On Fri, Jan 31, 2020 at 10:19:51PM -0500, Matt Atwood wrote:
> On Tiger Lake we do not support source keying in the pixel formats P010,
> P012, P016.
> 
> v2: Move WA to end of function. Create helper function for format
> check. Less verbose debugging messaging.
> 
> Bspec: 52890
> Cc: Matt Roper <matthew.d.roper@intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> CC: Ville Syrjälä <ville.syrjala@intel.com>

Wrong address

> Signed-off-by: Matt Atwood <matthew.s.atwood@intel.com>
> ---
>  drivers/gpu/drm/i915/display/intel_sprite.c | 22 +++++++++++++++++++++
>  1 file changed, 22 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
> index 2f277d1fc6f1..6e4d73588b48 100644
> --- a/drivers/gpu/drm/i915/display/intel_sprite.c
> +++ b/drivers/gpu/drm/i915/display/intel_sprite.c
> @@ -2070,6 +2070,18 @@ vlv_sprite_check(struct intel_crtc_state *crtc_state,
>  	return 0;
>  }
>  
> +static bool intel_format_is_p01x(int format)
                                    ^^^
u32

> +{
> +	switch(format){

Missing spaces

> +		case DRM_FORMAT_P010:
> +		case DRM_FORMAT_P012:
> +		case DRM_FORMAT_P016:
> +			return true;
> +		default:
> +			return false;

Wrong indentantion

> +	}
> +}
> +
>  static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
>  			      const struct intel_plane_state *plane_state)
>  {
> @@ -2143,6 +2155,16 @@ static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
>  		return -EINVAL;
>  	}
>  
> +	/* Wa_1606054188:tgl
> +	 *
> +	 * TODO: Add format RGB64i when implemented.
> +	 *
> +	 */

Wrong comment format

> +	if(IS_GEN(dev_priv, 12) &&

Missing space

> +	   plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
> +	   intel_format_is_p01x(fb->format->format))
> +		DRM_DEBUG_KMS("Source color keying not supported with P01x formats\n");

Missing error return.

Was also going to suggest you should use drm_dbg_kms() now, but
looks like this file hasn't been converted yet. Well, I guess
there'd be no harm in using drm_dbg_kms() anyway if you want.

As for the w/a itself, not sure it's any more broken than any other
planar format (don't have the hw to test it right now). But I just
tried my wip colorkey test on glk with nv12/p010 and while it
more or less seems to work the chroma upsampling is definitely
making it impossible to test with crcs. I guess we'll get to
testing out eventually to see if it is actually more broken than
that. Certainly wouldn't be the first time the hw has issues with
the >8bpc to 8bpc conversion for the key match. Just a bit
surprising that it would be limited to just the specific combo
of tgl and P01x formats.

> +
>  	return 0;
>  }
>  
> -- 
> 2.21.1
> 
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_sprite.c b/drivers/gpu/drm/i915/display/intel_sprite.c
index 2f277d1fc6f1..6e4d73588b48 100644
--- a/drivers/gpu/drm/i915/display/intel_sprite.c
+++ b/drivers/gpu/drm/i915/display/intel_sprite.c
@@ -2070,6 +2070,18 @@  vlv_sprite_check(struct intel_crtc_state *crtc_state,
 	return 0;
 }
 
+static bool intel_format_is_p01x(int format)
+{
+	switch(format){
+		case DRM_FORMAT_P010:
+		case DRM_FORMAT_P012:
+		case DRM_FORMAT_P016:
+			return true;
+		default:
+			return false;
+	}
+}
+
 static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
 			      const struct intel_plane_state *plane_state)
 {
@@ -2143,6 +2155,16 @@  static int skl_plane_check_fb(const struct intel_crtc_state *crtc_state,
 		return -EINVAL;
 	}
 
+	/* Wa_1606054188:tgl
+	 *
+	 * TODO: Add format RGB64i when implemented.
+	 *
+	 */
+	if(IS_GEN(dev_priv, 12) &&
+	   plane_state->ckey.flags & I915_SET_COLORKEY_SOURCE &&
+	   intel_format_is_p01x(fb->format->format))
+		DRM_DEBUG_KMS("Source color keying not supported with P01x formats\n");
+
 	return 0;
 }