[PATCHv3,2/3] ARM: dts: exynos: Add missing usbdrd3 suspend clk
diff mbox series

Message ID 20200210105108.1128-3-linux.amoon@gmail.com
State Changes Requested
Headers show
Series
  • Add support for suspend clk for Exynos5422 SoC
Related show

Commit Message

Anand Moon Feb. 10, 2020, 10:51 a.m. UTC
This patch adds new combatible strings for USBDRD3
for adding missing suspend clk, exynos5422 usbdrd3
support two clk USBD300 and SCLK_USBD300, so add missing
suspemd_clk for Exynos542x DWC3 nodes.

Signed-off-by: Anand Moon <linux.amoon@gmail.com>
---
 arch/arm/boot/dts/exynos5420.dtsi | 8 ++++----
 arch/arm/boot/dts/exynos54xx.dtsi | 4 ++--
 2 files changed, 6 insertions(+), 6 deletions(-)

Comments

Krzysztof Kozlowski Feb. 10, 2020, 1:50 p.m. UTC | #1
On Mon, Feb 10, 2020 at 10:51:07AM +0000, Anand Moon wrote:
> This patch adds new combatible strings for USBDRD3
> for adding missing suspend clk, exynos5422 usbdrd3
> support two clk USBD300 and SCLK_USBD300, so add missing
> suspemd_clk for Exynos542x DWC3 nodes.
> 
> Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> ---
>  arch/arm/boot/dts/exynos5420.dtsi | 8 ++++----
>  arch/arm/boot/dts/exynos54xx.dtsi | 4 ++--
>  2 files changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> index b672080e7469..bd505256a223 100644
> --- a/arch/arm/boot/dts/exynos5420.dtsi
> +++ b/arch/arm/boot/dts/exynos5420.dtsi
> @@ -1372,8 +1372,8 @@ &trng {
>  };
>  
>  &usbdrd3_0 {
> -	clocks = <&clock CLK_USBD300>;
> -	clock-names = "usbdrd30";
> +	clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBD300>;
> +	clock-names = "usbdrd30", "usbdrd30_susp_clk";
>  };
>  
>  &usbdrd_phy0 {
> @@ -1383,8 +1383,8 @@ &usbdrd_phy0 {
>  };
>  
>  &usbdrd3_1 {
> -	clocks = <&clock CLK_USBD301>;
> -	clock-names = "usbdrd30";
> +	clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBD301>;
> +	clock-names = "usbdrd30", "usbdrd30_susp_clk";
>  };
>  
>  &usbdrd_dwc3_1 {
> diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
> index 8aa5117e58ce..0aac6255de5d 100644
> --- a/arch/arm/boot/dts/exynos54xx.dtsi
> +++ b/arch/arm/boot/dts/exynos54xx.dtsi
> @@ -143,7 +143,7 @@ hsi2c_7: i2c@12cd0000 {
>  		};
>  
>  		usbdrd3_0: usb3-0 {
> -			compatible = "samsung,exynos5250-dwusb3";
> +			compatible = "samsung,exynos5420-dwusb3";
>  			#address-cells = <1>;
>  			#size-cells = <1>;
>  			ranges;
> @@ -165,7 +165,7 @@ usbdrd_phy0: phy@12100000 {
>  		};
>  
>  		usbdrd3_1: usb3-1 {
> -			compatible = "samsung,exynos5250-dwusb3";
> +			compatible = "samsung,exynos5420-dwusb3";

This affects also Exynos5410 but you do not add new clock there.

Best regards,
Krzysztof
Anand Moon Feb. 10, 2020, 5:13 p.m. UTC | #2
Hi Krzysztof,

Thanks for your review comments.

On Mon, 10 Feb 2020 at 19:20, Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> On Mon, Feb 10, 2020 at 10:51:07AM +0000, Anand Moon wrote:
> > This patch adds new combatible strings for USBDRD3
> > for adding missing suspend clk, exynos5422 usbdrd3
> > support two clk USBD300 and SCLK_USBD300, so add missing
> > suspemd_clk for Exynos542x DWC3 nodes.
> >
> > Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> > ---
> >  arch/arm/boot/dts/exynos5420.dtsi | 8 ++++----
> >  arch/arm/boot/dts/exynos54xx.dtsi | 4 ++--
> >  2 files changed, 6 insertions(+), 6 deletions(-)
> >
> > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> > index b672080e7469..bd505256a223 100644
> > --- a/arch/arm/boot/dts/exynos5420.dtsi
> > +++ b/arch/arm/boot/dts/exynos5420.dtsi
> > @@ -1372,8 +1372,8 @@ &trng {
> >  };
> >
> >  &usbdrd3_0 {
> > -     clocks = <&clock CLK_USBD300>;
> > -     clock-names = "usbdrd30";
> > +     clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBD300>;
> > +     clock-names = "usbdrd30", "usbdrd30_susp_clk";
> >  };
> >
> >  &usbdrd_phy0 {
> > @@ -1383,8 +1383,8 @@ &usbdrd_phy0 {
> >  };
> >
> >  &usbdrd3_1 {
> > -     clocks = <&clock CLK_USBD301>;
> > -     clock-names = "usbdrd30";
> > +     clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBD301>;
> > +     clock-names = "usbdrd30", "usbdrd30_susp_clk";
> >  };
> >
> >  &usbdrd_dwc3_1 {
> > diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
> > index 8aa5117e58ce..0aac6255de5d 100644
> > --- a/arch/arm/boot/dts/exynos54xx.dtsi
> > +++ b/arch/arm/boot/dts/exynos54xx.dtsi
> > @@ -143,7 +143,7 @@ hsi2c_7: i2c@12cd0000 {
> >               };
> >
> >               usbdrd3_0: usb3-0 {
> > -                     compatible = "samsung,exynos5250-dwusb3";
> > +                     compatible = "samsung,exynos5420-dwusb3";
> >                       #address-cells = <1>;
> >                       #size-cells = <1>;
> >                       ranges;
> > @@ -165,7 +165,7 @@ usbdrd_phy0: phy@12100000 {
> >               };
> >
> >               usbdrd3_1: usb3-1 {
> > -                     compatible = "samsung,exynos5250-dwusb3";
> > +                     compatible = "samsung,exynos5420-dwusb3";
>
> This affects also Exynos5410 but you do not add new clock there.
>
> Best regards,
> Krzysztof
>

Ok I will update this Exynos5410 dts.

Is samsung,exynos54xx-dwusb3 is valid compatible string
for both the SoC.

-Anand
Krzysztof Kozlowski Feb. 10, 2020, 6:54 p.m. UTC | #3
On Mon, Feb 10, 2020 at 10:43:45PM +0530, Anand Moon wrote:
> Hi Krzysztof,
> 
> Thanks for your review comments.
> 
> On Mon, 10 Feb 2020 at 19:20, Krzysztof Kozlowski <krzk@kernel.org> wrote:
> >
> > On Mon, Feb 10, 2020 at 10:51:07AM +0000, Anand Moon wrote:
> > > This patch adds new combatible strings for USBDRD3
> > > for adding missing suspend clk, exynos5422 usbdrd3
> > > support two clk USBD300 and SCLK_USBD300, so add missing
> > > suspemd_clk for Exynos542x DWC3 nodes.
> > >
> > > Signed-off-by: Anand Moon <linux.amoon@gmail.com>
> > > ---
> > >  arch/arm/boot/dts/exynos5420.dtsi | 8 ++++----
> > >  arch/arm/boot/dts/exynos54xx.dtsi | 4 ++--
> > >  2 files changed, 6 insertions(+), 6 deletions(-)
> > >
> > > diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
> > > index b672080e7469..bd505256a223 100644
> > > --- a/arch/arm/boot/dts/exynos5420.dtsi
> > > +++ b/arch/arm/boot/dts/exynos5420.dtsi
> > > @@ -1372,8 +1372,8 @@ &trng {
> > >  };
> > >
> > >  &usbdrd3_0 {
> > > -     clocks = <&clock CLK_USBD300>;
> > > -     clock-names = "usbdrd30";
> > > +     clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBD300>;
> > > +     clock-names = "usbdrd30", "usbdrd30_susp_clk";
> > >  };
> > >
> > >  &usbdrd_phy0 {
> > > @@ -1383,8 +1383,8 @@ &usbdrd_phy0 {
> > >  };
> > >
> > >  &usbdrd3_1 {
> > > -     clocks = <&clock CLK_USBD301>;
> > > -     clock-names = "usbdrd30";
> > > +     clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBD301>;
> > > +     clock-names = "usbdrd30", "usbdrd30_susp_clk";
> > >  };
> > >
> > >  &usbdrd_dwc3_1 {
> > > diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
> > > index 8aa5117e58ce..0aac6255de5d 100644
> > > --- a/arch/arm/boot/dts/exynos54xx.dtsi
> > > +++ b/arch/arm/boot/dts/exynos54xx.dtsi
> > > @@ -143,7 +143,7 @@ hsi2c_7: i2c@12cd0000 {
> > >               };
> > >
> > >               usbdrd3_0: usb3-0 {
> > > -                     compatible = "samsung,exynos5250-dwusb3";
> > > +                     compatible = "samsung,exynos5420-dwusb3";
> > >                       #address-cells = <1>;
> > >                       #size-cells = <1>;
> > >                       ranges;
> > > @@ -165,7 +165,7 @@ usbdrd_phy0: phy@12100000 {
> > >               };
> > >
> > >               usbdrd3_1: usb3-1 {
> > > -                     compatible = "samsung,exynos5250-dwusb3";
> > > +                     compatible = "samsung,exynos5420-dwusb3";
> >
> > This affects also Exynos5410 but you do not add new clock there.
> >
> > Best regards,
> > Krzysztof
> >
> 
> Ok I will update this Exynos5410 dts.
> 
> Is samsung,exynos54xx-dwusb3 is valid compatible string
> for both the SoC.

The compatible should not be wildcard so keep it as
samsung,exynos5420-dwusb3.

Best regards,
Krzysztof

Patch
diff mbox series

diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi
index b672080e7469..bd505256a223 100644
--- a/arch/arm/boot/dts/exynos5420.dtsi
+++ b/arch/arm/boot/dts/exynos5420.dtsi
@@ -1372,8 +1372,8 @@  &trng {
 };
 
 &usbdrd3_0 {
-	clocks = <&clock CLK_USBD300>;
-	clock-names = "usbdrd30";
+	clocks = <&clock CLK_USBD300>, <&clock CLK_SCLK_USBD300>;
+	clock-names = "usbdrd30", "usbdrd30_susp_clk";
 };
 
 &usbdrd_phy0 {
@@ -1383,8 +1383,8 @@  &usbdrd_phy0 {
 };
 
 &usbdrd3_1 {
-	clocks = <&clock CLK_USBD301>;
-	clock-names = "usbdrd30";
+	clocks = <&clock CLK_USBD301>, <&clock CLK_SCLK_USBD301>;
+	clock-names = "usbdrd30", "usbdrd30_susp_clk";
 };
 
 &usbdrd_dwc3_1 {
diff --git a/arch/arm/boot/dts/exynos54xx.dtsi b/arch/arm/boot/dts/exynos54xx.dtsi
index 8aa5117e58ce..0aac6255de5d 100644
--- a/arch/arm/boot/dts/exynos54xx.dtsi
+++ b/arch/arm/boot/dts/exynos54xx.dtsi
@@ -143,7 +143,7 @@  hsi2c_7: i2c@12cd0000 {
 		};
 
 		usbdrd3_0: usb3-0 {
-			compatible = "samsung,exynos5250-dwusb3";
+			compatible = "samsung,exynos5420-dwusb3";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;
@@ -165,7 +165,7 @@  usbdrd_phy0: phy@12100000 {
 		};
 
 		usbdrd3_1: usb3-1 {
-			compatible = "samsung,exynos5250-dwusb3";
+			compatible = "samsung,exynos5420-dwusb3";
 			#address-cells = <1>;
 			#size-cells = <1>;
 			ranges;