@@ -99,6 +99,17 @@ void spi_controller_dma_unmap_mem_op_data(struct spi_controller *ctlr,
}
EXPORT_SYMBOL_GPL(spi_controller_dma_unmap_mem_op_data);
+static int spi_check_dtr_req(struct spi_mem *mem, bool is_dtr, bool tx)
+{
+ u32 mode = mem->spi->mode;
+
+ if (is_dtr &&
+ ((tx && (mode & SPI_TX_DTR)) || (!tx && (mode & SPI_RX_DTR))))
+ return 0;
+
+ return -ENOTSUPP;
+}
+
static int spi_check_buswidth_req(struct spi_mem *mem, u8 buswidth, bool tx)
{
u32 mode = mem->spi->mode;
@@ -154,6 +165,20 @@ bool spi_mem_default_supports_op(struct spi_mem *mem,
op->data.dir == SPI_MEM_DATA_OUT))
return false;
+ if (op->cmd.is_dtr && spi_check_dtr_req(mem, op->cmd.is_dtr, true))
+ return false;
+
+ if (op->addr.is_dtr && spi_check_dtr_req(mem, op->addr.is_dtr, true))
+ return false;
+
+ if (op->dummy.is_dtr && spi_check_dtr_req(mem, op->dummy.is_dtr, true))
+ return false;
+
+ if (op->data.dir != SPI_MEM_NO_DATA &&
+ spi_check_dtr_req(mem, op->data.is_dtr,
+ op->data.dir == SPI_MEM_DATA_OUT))
+ return false;
+
return true;
}
EXPORT_SYMBOL_GPL(spi_mem_default_supports_op);
@@ -71,6 +71,7 @@ enum spi_mem_data_dir {
* struct spi_mem_op - describes a SPI memory operation
* @cmd.buswidth: number of IO lines used to transmit the command
* @cmd.opcode: operation opcode
+ * @cmd.is_dtr: whether the command opcode should be sent in DTR mode or not
* @addr.nbytes: number of address bytes to send. Can be zero if the operation
* does not need to send an address
* @addr.buswidth: number of IO lines used to transmit the address cycles
@@ -78,10 +79,13 @@ enum spi_mem_data_dir {
* Note that only @addr.nbytes are taken into account in this
* address value, so users should make sure the value fits in the
* assigned number of bytes.
+ * @addr.is_dtr: whether the address should be sent in DTR mode or not
* @dummy.nbytes: number of dummy bytes to send after an opcode or address. Can
* be zero if the operation does not require dummy bytes
* @dummy.buswidth: number of IO lanes used to transmit the dummy bytes
+ * @dummy.is_dtr: whether the dummy bytes should be sent in DTR mode or not
* @data.buswidth: number of IO lanes used to send/receive the data
+ * @data.is_dtr: whether the data should be sent in DTR mode or not
* @data.dir: direction of the transfer
* @data.nbytes: number of data bytes to send/receive. Can be zero if the
* operation does not involve transferring data
@@ -92,21 +96,25 @@ struct spi_mem_op {
struct {
u8 buswidth;
u8 opcode;
+ bool is_dtr;
} cmd;
struct {
u8 nbytes;
u8 buswidth;
u64 val;
+ bool is_dtr;
} addr;
struct {
u8 nbytes;
u8 buswidth;
+ bool is_dtr;
} dummy;
struct {
u8 buswidth;
+ bool is_dtr;
enum spi_mem_data_dir dir;
unsigned int nbytes;
union {
@@ -183,6 +183,8 @@ struct spi_device {
#define SPI_TX_OCTAL 0x2000 /* transmit with 8 wires */
#define SPI_RX_OCTAL 0x4000 /* receive with 8 wires */
#define SPI_3WIRE_HIZ 0x8000 /* high impedance turnaround */
+#define SPI_RX_DTR 0x10000 /* receive in DTR mode */
+#define SPI_TX_DTR 0x20000 /* transmit in DTR mode */
int irq;
void *controller_state;
void *controller_data;
Each phase is given a separate 'is_dtr' field so mixed protocols like 4S-4D-4D can be supported. Also add the mode bits SPI_RX_DTR and SPI_TX_DTR so controllers can specify whether they support DTR modes or not. Signed-off-by: Pratyush Yadav <p.yadav@ti.com> --- drivers/spi/spi-mem.c | 25 +++++++++++++++++++++++++ include/linux/spi/spi-mem.h | 8 ++++++++ include/linux/spi/spi.h | 2 ++ 3 files changed, 35 insertions(+)