| Message ID | 20200212090611.1251110-1-chris@chris-wilson.co.uk (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Revert "drm/i915: Implement Wa_1607090982" | expand |
Chris Wilson <chris@chris-wilson.co.uk> writes: > BIT(14) is not sticking in 0xe4f4 so we have no idea if the w/a is still > in effect when it needs to be. Until that is resolved, remove the > failing bit. > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1169 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> Reviewed-by: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 62b43f538a56..4bbea781c142 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -598,9 +598,6 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, > IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 : > FF_MODE2_TDS_TIMER_MASK); > - > - /* Wa_1606931601:tgl */ > - WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ); > } > > static void > -- > 2.25.0
Chris Wilson <chris@chris-wilson.co.uk> writes: > BIT(14) is not sticking in 0xe4f4 so we have no idea if the w/a is still Now we have some idea. It was in mcr range register thus verification was doomed to fail. Fix in list. -Mika > in effect when it needs to be. Until that is resolved, remove the > failing bit. > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1169 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 62b43f538a56..4bbea781c142 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -598,9 +598,6 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, > IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 : > FF_MODE2_TDS_TIMER_MASK); > - > - /* Wa_1606931601:tgl */ > - WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ); > } > > static void > -- > 2.25.0
On Wed, Feb 12, 2020 at 09:06:11AM +0000, Chris Wilson wrote: > BIT(14) is not sticking in 0xe4f4 so we have no idea if the w/a is still > in effect when it needs to be. Until that is resolved, remove the > failing bit. The headline for the patch you're reverting was somewhat confusing since it doesn't match the name used in the code comment below or the bspec workaround page (Wa_1606931601). But it looks like both numbers refer to the same workaround in the underlying database, so it's the correct revert. Maybe also add a reference to the preferred Wa_1606931601 name in your commit message so that it's easier to find when searching git history? That might help prevent someone from accidentally re-implementing this workaround the next time we scrub the WA database. Matt > > Closes: https://gitlab.freedesktop.org/drm/intel/issues/1169 > Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> > Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 --- > 1 file changed, 3 deletions(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 62b43f538a56..4bbea781c142 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -598,9 +598,6 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, > wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, > IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 : > FF_MODE2_TDS_TIMER_MASK); > - > - /* Wa_1606931601:tgl */ > - WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ); > } > > static void > -- > 2.25.0 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@lists.freedesktop.org > https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index 62b43f538a56..4bbea781c142 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -598,9 +598,6 @@ static void tgl_ctx_workarounds_init(struct intel_engine_cs *engine, wa_add(wal, FF_MODE2, FF_MODE2_TDS_TIMER_MASK, val, IS_TGL_REVID(engine->i915, TGL_REVID_A0, TGL_REVID_A0) ? 0 : FF_MODE2_TDS_TIMER_MASK); - - /* Wa_1606931601:tgl */ - WA_SET_BIT_MASKED(GEN7_ROW_CHICKEN2, GEN12_DISABLE_EARLY_READ); } static void
BIT(14) is not sticking in 0xe4f4 so we have no idea if the w/a is still in effect when it needs to be. Until that is resolved, remove the failing bit. Closes: https://gitlab.freedesktop.org/drm/intel/issues/1169 Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Cc: Mika Kuoppala <mika.kuoppala@linux.intel.com> --- drivers/gpu/drm/i915/gt/intel_workarounds.c | 3 --- 1 file changed, 3 deletions(-)