| Message ID | 20200213200137.745029-1-robdclark@gmail.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/msm/dpu: fix BGR565 vs RGB565 confusion | expand |
On Thu, Feb 13, 2020 at 3:03 PM Rob Clark <robdclark@gmail.com> wrote: > > From: Rob Clark <robdclark@chromium.org> > > The component order between the two was swapped, resulting in incorrect > color when games with 565 visual hit the overlay path instead of GPU > composition. > > Fixes: 25fdd5933e4c ("drm/msm: Add SDM845 DPU support") > Signed-off-by: Rob Clark <robdclark@chromium.org> Reviewed-by: Sean Paul <seanpaul@chromium.org> > --- > drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > index 24ab6249083a..6f420cc73dbd 100644 > --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c > @@ -255,13 +255,13 @@ static const struct dpu_format dpu_format_map[] = { > > INTERLEAVED_RGB_FMT(RGB565, > 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT, > - C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3, > + C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3, > false, 2, 0, > DPU_FETCH_LINEAR, 1), > > INTERLEAVED_RGB_FMT(BGR565, > 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT, > - C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3, > + C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3, > false, 2, 0, > DPU_FETCH_LINEAR, 1), > > -- > 2.24.1 >
diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c index 24ab6249083a..6f420cc73dbd 100644 --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_formats.c @@ -255,13 +255,13 @@ static const struct dpu_format dpu_format_map[] = { INTERLEAVED_RGB_FMT(RGB565, 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT, - C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3, + C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3, false, 2, 0, DPU_FETCH_LINEAR, 1), INTERLEAVED_RGB_FMT(BGR565, 0, COLOR_5BIT, COLOR_6BIT, COLOR_5BIT, - C1_B_Cb, C0_G_Y, C2_R_Cr, 0, 3, + C2_R_Cr, C0_G_Y, C1_B_Cb, 0, 3, false, 2, 0, DPU_FETCH_LINEAR, 1),