diff mbox series

[8/9] intel_idle: Define CPUIDLE_FLAG_TLB_FLUSHED as BIT(16)

Message ID 15991455.PHIGOLi8R1@kreacher (mailing list archive)
State Mainlined, archived
Headers show
Series intel_idle: More assorted cleanups | expand

Commit Message

Rafael J. Wysocki Feb. 13, 2020, 10:03 p.m. UTC 
From: "Rafael J. Wysocki" <rafael.j.wysocki@intel.com>

Use the BIT() macro for defining CPUIDLE_FLAG_TLB_FLUSHED instead of
the hex bit encoding of the same value.

No intentional functional impact.

Signed-off-by: Rafael J. Wysocki <rafael.j.wysocki@intel.com>
---
 drivers/idle/intel_idle.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)
diff mbox series

Patch

diff --git a/drivers/idle/intel_idle.c b/drivers/idle/intel_idle.c
index 9575615c8f4a..de1367d996c5 100644
--- a/drivers/idle/intel_idle.c
+++ b/drivers/idle/intel_idle.c
@@ -101,7 +101,7 @@  static unsigned int mwait_substates __initdata;
  * If this flag is set, SW flushes the TLB, so even if the
  * HW doesn't do the flushing, this flag is safe to use.
  */
-#define CPUIDLE_FLAG_TLB_FLUSHED	0x10000
+#define CPUIDLE_FLAG_TLB_FLUSHED	BIT(16)
 
 /*
  * MWAIT takes an 8-bit "hint" in EAX "suggesting"