[v7,2/2] media: i2c: Add MAX9286 driver
diff mbox series

Message ID 20200214103136.12526-3-kieran.bingham+renesas@ideasonboard.com
State New
Headers show
Series
  • MAX9286 GMSL support
Related show

Commit Message

Kieran Bingham Feb. 14, 2020, 10:31 a.m. UTC
The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
CSI-2 output. The device supports multicamera streaming applications,
and features the ability to synchronise the attached cameras.

CSI-2 output can be configured with 1 to 4 lanes, and a control channel
is supported over I2C, which implements an I2C mux to facilitate
communications with connected cameras across the reverse control
channel.

Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

--
v2:
 - Fix MAINTAINERS entry

This posting is released with the following modifications to work
without Sakari's VC developments:
 - max9286_g_mbus_config() re-instated
 - max9286_get_frame_desc() is not bus/csi aware
 - max9286_{get,set}_routing() removed

v3:
 - Initialise notifier with v4l2_async_notifier_init
 - Update for new mbus csi2 format V4L2_MBUS_CSI2_DPHY

v4: - Re-introduce required code to function with the VC series.

 - Implement max9286_get_routing, max9286_set_routing
 - Remove max9286_g_mbus_config

v5: (internal release)
 - Fix printk formatting for hex value
 - max9286->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE (add |)
 - MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER -> MEDIA_ENT_F_VID_IF_BRIDGE
 - Remove 'device is bound' workaround

v6:
 - v4l2_subdev_krouting instead of v4l2_subdev_routing separated
   to allow integration without the VC/V4L2-Mux series.
 - convert sd_to_max9286 to inline function
 - rename max9286_device to max9286_priv
 - Cleanup the v4l2_async_notifier
 - Extend MODULE_AUTHOR
 - Replace of_graph_get_endpoint_by_regs with fwnode_graph_get_endpoint_by_id
 - Pass default bus type when parsing fwnode endpoint (Manivannan Sadhasivam)
 - Use new YAML file reference in MAINTAINERS
 - Parse new i2c-mux node in max9286_get_i2c_by_id
   (This could/should be refactored to parse these separately first)
 - Spelling and calculation fixes in the FSYNC_LOCKED check comments
 - Identify each enabled i2c-mux channel in a single pass
 - max9286: Improve mux-state readbility [v2]
 - Fix frame sync lock durations
 - Add comment to describe /why/ we must open the mux in s_stream
 - use -EXDEV as return code for failed link synchronisation.
 - Fix reference counting of the dt nodeS
 - Convert to probe_new for I2C
 - Remove redundant max9286_i2c_mux_state
 - Provide optional enable-gpio (max9286-pwdn)

v7:
 [Kieran]
 - Ensure powerdown lines are optional
 - Add a 4ms power-up delay
 - Add max9286_check_config_link() to core
 - Add GPIO chip controller for GPIO0OUT and GPIO1OUT
 - Fix GPIO registration
 - max9286: Split out async registration
   (fixes regulator -EPROBE_DEFERs failures)
 - Collect all V4L2 registrations
 - balance v4l2_async refcnting
 - Rename max9286_v4l2_async_ => max9286_v4l2_notifier_

 [Jacopo]
 - Remove redundanct MAXIM_I2C_SPEED macros
 - Move notifiers operations
 - Add delay after reverse channel reconfiguration
 - Move link setup to completion
 - Fix up max9286_check_config_link() implementation
 - Remove redundant dual configuration of reverse channel

 MAINTAINERS                 |   10 +
 drivers/media/i2c/Kconfig   |   11 +
 drivers/media/i2c/Makefile  |    1 +
 drivers/media/i2c/max9286.c | 1278 +++++++++++++++++++++++++++++++++++
 4 files changed, 1300 insertions(+)
 create mode 100644 drivers/media/i2c/max9286.c

Comments

Kieran Bingham Feb. 14, 2020, 11:54 a.m. UTC | #1
Small update,

On 14/02/2020 10:31, Kieran Bingham wrote:
> The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
> CSI-2 output. The device supports multicamera streaming applications,
> and features the ability to synchronise the attached cameras.
> 
> CSI-2 output can be configured with 1 to 4 lanes, and a control channel
> is supported over I2C, which implements an I2C mux to facilitate
> communications with connected cameras across the reverse control
> channel.

This is missing the Co-developed-by: tags ...

Co-developed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>

Co-developed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>

Co-developed-by: Laurent Pinchart
<laurent.pinchart+renesas@ideasonboard.com>

> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>

Co-developed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>

--
Kieran



> 
> --
> v2:
>  - Fix MAINTAINERS entry
> 
> This posting is released with the following modifications to work
> without Sakari's VC developments:
>  - max9286_g_mbus_config() re-instated
>  - max9286_get_frame_desc() is not bus/csi aware
>  - max9286_{get,set}_routing() removed
> 
> v3:
>  - Initialise notifier with v4l2_async_notifier_init
>  - Update for new mbus csi2 format V4L2_MBUS_CSI2_DPHY
> 
> v4: - Re-introduce required code to function with the VC series.
> 
>  - Implement max9286_get_routing, max9286_set_routing
>  - Remove max9286_g_mbus_config
> 
> v5: (internal release)
>  - Fix printk formatting for hex value
>  - max9286->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE (add |)
>  - MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER -> MEDIA_ENT_F_VID_IF_BRIDGE
>  - Remove 'device is bound' workaround
> 
> v6:
>  - v4l2_subdev_krouting instead of v4l2_subdev_routing separated
>    to allow integration without the VC/V4L2-Mux series.
>  - convert sd_to_max9286 to inline function
>  - rename max9286_device to max9286_priv
>  - Cleanup the v4l2_async_notifier
>  - Extend MODULE_AUTHOR
>  - Replace of_graph_get_endpoint_by_regs with fwnode_graph_get_endpoint_by_id
>  - Pass default bus type when parsing fwnode endpoint (Manivannan Sadhasivam)
>  - Use new YAML file reference in MAINTAINERS
>  - Parse new i2c-mux node in max9286_get_i2c_by_id
>    (This could/should be refactored to parse these separately first)
>  - Spelling and calculation fixes in the FSYNC_LOCKED check comments
>  - Identify each enabled i2c-mux channel in a single pass
>  - max9286: Improve mux-state readbility [v2]
>  - Fix frame sync lock durations
>  - Add comment to describe /why/ we must open the mux in s_stream
>  - use -EXDEV as return code for failed link synchronisation.
>  - Fix reference counting of the dt nodeS
>  - Convert to probe_new for I2C
>  - Remove redundant max9286_i2c_mux_state
>  - Provide optional enable-gpio (max9286-pwdn)
> 
> v7:
>  [Kieran]
>  - Ensure powerdown lines are optional
>  - Add a 4ms power-up delay
>  - Add max9286_check_config_link() to core
>  - Add GPIO chip controller for GPIO0OUT and GPIO1OUT
>  - Fix GPIO registration
>  - max9286: Split out async registration
>    (fixes regulator -EPROBE_DEFERs failures)
>  - Collect all V4L2 registrations
>  - balance v4l2_async refcnting
>  - Rename max9286_v4l2_async_ => max9286_v4l2_notifier_
> 
>  [Jacopo]
>  - Remove redundanct MAXIM_I2C_SPEED macros
>  - Move notifiers operations
>  - Add delay after reverse channel reconfiguration
>  - Move link setup to completion
>  - Fix up max9286_check_config_link() implementation
>  - Remove redundant dual configuration of reverse channel
> 
>  MAINTAINERS                 |   10 +
>  drivers/media/i2c/Kconfig   |   11 +
>  drivers/media/i2c/Makefile  |    1 +
>  drivers/media/i2c/max9286.c | 1278 +++++++++++++++++++++++++++++++++++
>  4 files changed, 1300 insertions(+)
>  create mode 100644 drivers/media/i2c/max9286.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 983d3c97edd1..148706353d25 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10033,6 +10033,16 @@ F:	Documentation/devicetree/bindings/hwmon/max6697.txt
>  F:	drivers/hwmon/max6697.c
>  F:	include/linux/platform_data/max6697.h
>  
> +MAX9286 QUAD GMSL DESERIALIZER DRIVER
> +M:	Jacopo Mondi <jacopo+renesas@jmondi.org>
> +M:	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> +M:	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> +M:	Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> +L:	linux-media@vger.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml
> +F:	drivers/media/i2c/max9286.c
> +
>  MAX9860 MONO AUDIO VOICE CODEC DRIVER
>  M:	Peter Rosin <peda@axentia.se>
>  L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
> diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
> index c68e002d26ea..32a4deb90617 100644
> --- a/drivers/media/i2c/Kconfig
> +++ b/drivers/media/i2c/Kconfig
> @@ -442,6 +442,17 @@ config VIDEO_VPX3220
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called vpx3220.
>  
> +config VIDEO_MAX9286
> +	tristate "Maxim MAX9286 GMSL deserializer support"
> +	depends on I2C && I2C_MUX
> +	depends on VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER
> +	select V4L2_FWNODE
> +	help
> +	  This driver supports the Maxim MAX9286 GMSL deserializer.
> +
> +	  To compile this driver as a module, choose M here: the
> +	  module will be called max9286.
> +
>  comment "Video and audio decoders"
>  
>  config VIDEO_SAA717X
> diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
> index c147bb9d28db..8896cf8bfc4f 100644
> --- a/drivers/media/i2c/Makefile
> +++ b/drivers/media/i2c/Makefile
> @@ -117,5 +117,6 @@ obj-$(CONFIG_VIDEO_IMX290)	+= imx290.o
>  obj-$(CONFIG_VIDEO_IMX319)	+= imx319.o
>  obj-$(CONFIG_VIDEO_IMX355)	+= imx355.o
>  obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o
> +obj-$(CONFIG_VIDEO_MAX9286)	+= max9286.o
>  
>  obj-$(CONFIG_SDR_MAX2175) += max2175.o
> diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c
> new file mode 100644
> index 000000000000..a20829297ef6
> --- /dev/null
> +++ b/drivers/media/i2c/max9286.c
> @@ -0,0 +1,1278 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Maxim MAX9286 GMSL Deserializer Driver
> + *
> + * Copyright (C) 2017-2019 Jacopo Mondi
> + * Copyright (C) 2017-2019 Kieran Bingham
> + * Copyright (C) 2017-2019 Laurent Pinchart
> + * Copyright (C) 2017-2019 Niklas Söderlund
> + * Copyright (C) 2016 Renesas Electronics Corporation
> + * Copyright (C) 2015 Cogent Embedded, Inc.
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/fwnode.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/i2c.h>
> +#include <linux/i2c-mux.h>
> +#include <linux/module.h>
> +#include <linux/of_graph.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/slab.h>
> +
> +#include <media/v4l2-async.h>
> +#include <media/v4l2-ctrls.h>
> +#include <media/v4l2-device.h>
> +#include <media/v4l2-fwnode.h>
> +#include <media/v4l2-subdev.h>
> +
> +/* Register 0x00 */
> +#define MAX9286_MSTLINKSEL_AUTO		(7 << 5)
> +#define MAX9286_MSTLINKSEL(n)		((n) << 5)
> +#define MAX9286_EN_VS_GEN		BIT(4)
> +#define MAX9286_LINKEN(n)		(1 << (n))
> +/* Register 0x01 */
> +#define MAX9286_FSYNCMODE_ECU		(3 << 6)
> +#define MAX9286_FSYNCMODE_EXT		(2 << 6)
> +#define MAX9286_FSYNCMODE_INT_OUT	(1 << 6)
> +#define MAX9286_FSYNCMODE_INT_HIZ	(0 << 6)
> +#define MAX9286_GPIEN			BIT(5)
> +#define MAX9286_ENLMO_RSTFSYNC		BIT(2)
> +#define MAX9286_FSYNCMETH_AUTO		(2 << 0)
> +#define MAX9286_FSYNCMETH_SEMI_AUTO	(1 << 0)
> +#define MAX9286_FSYNCMETH_MANUAL	(0 << 0)
> +#define MAX9286_REG_FSYNC_PERIOD_L	0x06
> +#define MAX9286_REG_FSYNC_PERIOD_M	0x07
> +#define MAX9286_REG_FSYNC_PERIOD_H	0x08
> +/* Register 0x0a */
> +#define MAX9286_FWDCCEN(n)		(1 << ((n) + 4))
> +#define MAX9286_REVCCEN(n)		(1 << (n))
> +/* Register 0x0c */
> +#define MAX9286_HVEN			BIT(7)
> +#define MAX9286_EDC_6BIT_HAMMING	(2 << 5)
> +#define MAX9286_EDC_6BIT_CRC		(1 << 5)
> +#define MAX9286_EDC_1BIT_PARITY		(0 << 5)
> +#define MAX9286_DESEL			BIT(4)
> +#define MAX9286_INVVS			BIT(3)
> +#define MAX9286_INVHS			BIT(2)
> +#define MAX9286_HVSRC_D0		(2 << 0)
> +#define MAX9286_HVSRC_D14		(1 << 0)
> +#define MAX9286_HVSRC_D18		(0 << 0)
> +/* Register 0x0f */
> +#define MAX9286_0X0F_RESERVED		BIT(3)
> +/* Register 0x12 */
> +#define MAX9286_CSILANECNT(n)		(((n) - 1) << 6)
> +#define MAX9286_CSIDBL			BIT(5)
> +#define MAX9286_DBL			BIT(4)
> +#define MAX9286_DATATYPE_USER_8BIT	(11 << 0)
> +#define MAX9286_DATATYPE_USER_YUV_12BIT	(10 << 0)
> +#define MAX9286_DATATYPE_USER_24BIT	(9 << 0)
> +#define MAX9286_DATATYPE_RAW14		(8 << 0)
> +#define MAX9286_DATATYPE_RAW11		(7 << 0)
> +#define MAX9286_DATATYPE_RAW10		(6 << 0)
> +#define MAX9286_DATATYPE_RAW8		(5 << 0)
> +#define MAX9286_DATATYPE_YUV422_10BIT	(4 << 0)
> +#define MAX9286_DATATYPE_YUV422_8BIT	(3 << 0)
> +#define MAX9286_DATATYPE_RGB555		(2 << 0)
> +#define MAX9286_DATATYPE_RGB565		(1 << 0)
> +#define MAX9286_DATATYPE_RGB888		(0 << 0)
> +/* Register 0x15 */
> +#define MAX9286_VC(n)			((n) << 5)
> +#define MAX9286_VCTYPE			BIT(4)
> +#define MAX9286_CSIOUTEN		BIT(3)
> +#define MAX9286_0X15_RESV		(3 << 0)
> +/* Register 0x1b */
> +#define MAX9286_SWITCHIN(n)		(1 << ((n) + 4))
> +#define MAX9286_ENEQ(n)			(1 << (n))
> +/* Register 0x27 */
> +#define MAX9286_LOCKED			BIT(7)
> +/* Register 0x31 */
> +#define MAX9286_FSYNC_LOCKED		BIT(6)
> +/* Register 0x34 */
> +#define MAX9286_I2CLOCACK		BIT(7)
> +#define MAX9286_I2CSLVSH_1046NS_469NS	(3 << 5)
> +#define MAX9286_I2CSLVSH_938NS_352NS	(2 << 5)
> +#define MAX9286_I2CSLVSH_469NS_234NS	(1 << 5)
> +#define MAX9286_I2CSLVSH_352NS_117NS	(0 << 5)
> +#define MAX9286_I2CMSTBT_837KBPS	(7 << 2)
> +#define MAX9286_I2CMSTBT_533KBPS	(6 << 2)
> +#define MAX9286_I2CMSTBT_339KBPS	(5 << 2)
> +#define MAX9286_I2CMSTBT_173KBPS	(4 << 2)
> +#define MAX9286_I2CMSTBT_105KBPS	(3 << 2)
> +#define MAX9286_I2CMSTBT_84KBPS		(2 << 2)
> +#define MAX9286_I2CMSTBT_28KBPS		(1 << 2)
> +#define MAX9286_I2CMSTBT_8KBPS		(0 << 2)
> +#define MAX9286_I2CSLVTO_NONE		(3 << 0)
> +#define MAX9286_I2CSLVTO_1024US		(2 << 0)
> +#define MAX9286_I2CSLVTO_256US		(1 << 0)
> +#define MAX9286_I2CSLVTO_64US		(0 << 0)
> +/* Register 0x3b */
> +#define MAX9286_REV_TRF(n)		((n) << 4)
> +#define MAX9286_REV_AMP(n)		((((n) - 30) / 10) << 1) /* in mV */
> +#define MAX9286_REV_AMP_X		BIT(0)
> +/* Register 0x3f */
> +#define MAX9286_EN_REV_CFG		BIT(6)
> +#define MAX9286_REV_FLEN(n)		((n) - 20)
> +/* Register 0x49 */
> +#define MAX9286_VIDEO_DETECT_MASK	0x0f
> +/* Register 0x69 */
> +#define MAX9286_LFLTBMONMASKED		BIT(7)
> +#define MAX9286_LOCKMONMASKED		BIT(6)
> +#define MAX9286_AUTOCOMBACKEN		BIT(5)
> +#define MAX9286_AUTOMASKEN		BIT(4)
> +#define MAX9286_MASKLINK(n)		((n) << 0)
> +
> +#define MAX9286_NUM_GMSL		4
> +#define MAX9286_N_SINKS			4
> +#define MAX9286_N_PADS			5
> +#define MAX9286_SRC_PAD			4
> +
> +struct max9286_source {
> +	struct v4l2_async_subdev asd;
> +	struct v4l2_subdev *sd;
> +	struct fwnode_handle *fwnode;
> +};
> +
> +#define asd_to_max9286_source(_asd) \
> +	container_of(_asd, struct max9286_source, asd)
> +
> +struct max9286_priv {
> +	struct i2c_client *client;
> +	struct gpio_desc *gpiod_pwdn;
> +	struct v4l2_subdev sd;
> +	struct media_pad pads[MAX9286_N_PADS];
> +	struct regulator *regulator;
> +	bool poc_enabled;
> +
> +	struct gpio_chip gpio;
> +	u8 gpio_state;
> +
> +	struct i2c_mux_core *mux;
> +	unsigned int mux_channel;
> +	bool mux_open;
> +
> +	struct v4l2_ctrl_handler ctrls;
> +
> +	struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
> +
> +	unsigned int nsources;
> +	unsigned int source_mask;
> +	unsigned int route_mask;
> +	unsigned int bound_sources;
> +	unsigned int csi2_data_lanes;
> +	struct max9286_source sources[MAX9286_NUM_GMSL];
> +	struct v4l2_async_notifier notifier;
> +};
> +
> +static struct max9286_source *next_source(struct max9286_priv *priv,
> +					  struct max9286_source *source)
> +{
> +	if (!source)
> +		source = &priv->sources[0];
> +	else
> +		source++;
> +
> +	for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
> +		if (source->fwnode)
> +			return source;
> +	}
> +
> +	return NULL;
> +}
> +
> +#define for_each_source(priv, source) \
> +	for ((source) = NULL; ((source) = next_source((priv), (source))); )
> +
> +#define to_index(priv, source) ((source) - &(priv)->sources[0])
> +
> +static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
> +{
> +	return container_of(sd, struct max9286_priv, sd);
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * I2C IO
> + */
> +
> +static int max9286_read(struct max9286_priv *priv, u8 reg)
> +{
> +	int ret;
> +
> +	ret = i2c_smbus_read_byte_data(priv->client, reg);
> +	if (ret < 0)
> +		dev_err(&priv->client->dev,
> +			"%s: register 0x%02x read failed (%d)\n",
> +			__func__, reg, ret);
> +
> +	return ret;
> +}
> +
> +static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
> +{
> +	int ret;
> +
> +	ret = i2c_smbus_write_byte_data(priv->client, reg, val);
> +	if (ret < 0)
> +		dev_err(&priv->client->dev,
> +			"%s: register 0x%02x write failed (%d)\n",
> +			__func__, reg, ret);
> +
> +	return ret;
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * I2C Multiplexer
> + */
> +
> +static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
> +{
> +	max9286_write(priv, 0x0a, conf);
> +
> +	/*
> +	 * We must sleep after any change to the forward or reverse channel
> +	 * configuration.
> +	 */
> +	usleep_range(3000, 5000);
> +}
> +
> +static void max9286_i2c_mux_open(struct max9286_priv *priv)
> +{
> +	/* Open all channels on the MAX9286 */
> +	max9286_i2c_mux_configure(priv, 0xff);
> +
> +	priv->mux_open = true;
> +}
> +
> +static void max9286_i2c_mux_close(struct max9286_priv *priv)
> +{
> +	/*
> +	 * Ensure that both the forward and reverse channel are disabled on the
> +	 * mux, and that the channel ID is invalidated to ensure we reconfigure
> +	 * on the next max9286_i2c_mux_select() call.
> +	 */
> +	max9286_i2c_mux_configure(priv, 0x00);
> +
> +	priv->mux_open = false;
> +	priv->mux_channel = -1;
> +}
> +
> +static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
> +{
> +	struct max9286_priv *priv = i2c_mux_priv(muxc);
> +
> +	/* Channel select is disabled when configured in the opened state. */
> +	if (priv->mux_open)
> +		return 0;
> +
> +	if (priv->mux_channel == chan)
> +		return 0;
> +
> +	priv->mux_channel = chan;
> +
> +	max9286_i2c_mux_configure(priv,
> +				  MAX9286_FWDCCEN(chan) |
> +				  MAX9286_REVCCEN(chan));
> +
> +	return 0;
> +}
> +
> +static int max9286_i2c_mux_init(struct max9286_priv *priv)
> +{
> +	struct max9286_source *source;
> +	int ret;
> +
> +	if (!i2c_check_functionality(priv->client->adapter,
> +				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
> +		return -ENODEV;
> +
> +	priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
> +				  priv->nsources, 0, I2C_MUX_LOCKED,
> +				  max9286_i2c_mux_select, NULL);
> +	if (!priv->mux)
> +		return -ENOMEM;
> +
> +	priv->mux->priv = priv;
> +
> +	for_each_source(priv, source) {
> +		unsigned int index = to_index(priv, source);
> +
> +		ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
> +		if (ret < 0)
> +			goto error;
> +	}
> +
> +	return 0;
> +
> +error:
> +	i2c_mux_del_adapters(priv->mux);
> +	return ret;
> +}
> +
> +static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
> +{
> +	u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
> +		    MAX9286_I2CMSTBT_105KBPS;
> +
> +	if (localack)
> +		config |= MAX9286_I2CLOCACK;
> +
> +	max9286_write(priv, 0x34, config);
> +	usleep_range(3000, 5000);
> +}
> +
> +/*
> + * max9286_check_video_links() - Make sure video links are detected and locked
> + *
> + * Performs safety checks on video link status. Make sure they are detected
> + * and all enabled links are locked.
> + *
> + * Returns 0 for success, -EIO for errors.
> + */
> +static int max9286_check_video_links(struct max9286_priv *priv)
> +{
> +	unsigned int i;
> +	int ret;
> +
> +	/*
> +	 * Make sure valid video links are detected.
> +	 * The delay is not characterized in de-serializer manual, wait up
> +	 * to 5 ms.
> +	 */
> +	for (i = 0; i < 10; i++) {
> +		ret = max9286_read(priv, 0x49);
> +		if (ret < 0)
> +			return -EIO;
> +
> +		if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
> +			break;
> +
> +		usleep_range(350, 500);
> +	}
> +
> +	if (i == 10) {
> +		dev_err(&priv->client->dev,
> +			"Unable to detect video links: 0x%02x\n", ret);
> +		return -EIO;
> +	}
> +
> +	/* Make sure all enabled links are locked (4ms max). */
> +	for (i = 0; i < 10; i++) {
> +		ret = max9286_read(priv, 0x27);
> +		if (ret < 0)
> +			return -EIO;
> +
> +		if (ret & MAX9286_LOCKED)
> +			break;
> +
> +		usleep_range(350, 450);
> +	}
> +
> +	if (i == 10) {
> +		dev_err(&priv->client->dev, "Not all enabled links locked\n");
> +		return -EIO;
> +	}
> +
> +	return 0;
> +}
> +
> +/*
> + * max9286_check_config_link() - Detect and wait for configuration links
> + *
> + * Determine if the configuration channel is up and settled for a link.
> + *
> + * Returns 0 for success, -EIO for errors.
> + */
> +static int max9286_check_config_link(struct max9286_priv *priv,
> +				     unsigned int source_mask)
> +{
> +	unsigned int conflink_mask = (source_mask & 0x0f) << 4;
> +	unsigned int i;
> +	int ret;
> +
> +	/*
> +	 * Make sure requested configuration links are detected.
> +	 * The delay is not characterized in the chip manual: wait up
> +	 * to 5 milliseconds.
> +	 */
> +	for (i = 0; i < 10; i++) {
> +		ret = max9286_read(priv, 0x49) & 0xf0;
> +		if (ret < 0)
> +			return -EIO;
> +
> +		if (ret == conflink_mask)
> +			break;
> +
> +		usleep_range(350, 500);
> +	}
> +
> +	if (ret != conflink_mask) {
> +		dev_err(&priv->client->dev,
> +			"Unable to detect configuration links: 0x%02x expected 0x%02x\n",
> +			ret, conflink_mask);
> +		return -EIO;
> +	}
> +
> +	dev_info(&priv->client->dev,
> +		 "Successfully detected configuration links after %u loops: 0x%02x\n",
> +		 i, conflink_mask);
> +
> +	return 0;
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * V4L2 Subdev
> + */
> +
> +static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
> +				struct v4l2_subdev *subdev,
> +				struct v4l2_async_subdev *asd)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(notifier->sd);
> +	struct max9286_source *source = asd_to_max9286_source(asd);
> +	unsigned int index = to_index(priv, source);
> +	unsigned int src_pad;
> +	int ret;
> +
> +	ret = media_entity_get_fwnode_pad(&subdev->entity,
> +					  source->fwnode,
> +					  MEDIA_PAD_FL_SOURCE);
> +	if (ret < 0) {
> +		dev_err(&priv->client->dev,
> +			"Failed to find pad for %s\n", subdev->name);
> +		return ret;
> +	}
> +
> +	priv->bound_sources |= BIT(index);
> +	source->sd = subdev;
> +	src_pad = ret;
> +
> +	ret = media_create_pad_link(&source->sd->entity, src_pad,
> +				    &priv->sd.entity, index,
> +				    MEDIA_LNK_FL_ENABLED |
> +				    MEDIA_LNK_FL_IMMUTABLE);
> +	if (ret) {
> +		dev_err(&priv->client->dev,
> +			"Unable to link %s:%u -> %s:%u\n",
> +			source->sd->name, src_pad, priv->sd.name, index);
> +		return ret;
> +	}
> +
> +	dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
> +		subdev->name, src_pad, index);
> +
> +	/*
> +	 * We can only register v4l2_async_notifiers which do not provide a
> +	 * means to register a complete callback. bound_sources allows us to
> +	 * identify when all remove serializers have completed their probe.
> +	 */
> +	if (priv->bound_sources != priv->source_mask)
> +		return 0;
> +
> +	/*
> +	 * All enabled sources have probed and enabled their reverse control
> +	 * channels:
> +	 *
> +	 * - Verify all configuration links are properly detected
> +	 * - Disable auto-ack as communication on the control channel are now
> +	 *   stable.
> +	 */
> +	max9286_check_config_link(priv, priv->source_mask);
> +
> +	/*
> +	 * Re-configure I2C with local acknowledge disabled after cameras have
> +	 * probed.
> +	 */
> +	max9286_configure_i2c(priv, false);
> +
> +	return 0;
> +}
> +
> +static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
> +				  struct v4l2_subdev *subdev,
> +				  struct v4l2_async_subdev *asd)
> +{
> +	struct max9286_source *source = asd_to_max9286_source(asd);
> +
> +	source->sd = NULL;
> +}
> +
> +static const struct v4l2_async_notifier_operations max9286_notify_ops = {
> +	.bound = max9286_notify_bound,
> +	.unbind = max9286_notify_unbind,
> +};
> +
> +static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct max9286_source *source = NULL;
> +	int ret;
> +
> +	if (!priv->nsources)
> +		return 0;
> +
> +	v4l2_async_notifier_init(&priv->notifier);
> +
> +	for_each_source(priv, source) {
> +		unsigned int i = to_index(priv, source);
> +
> +		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> +		source->asd.match.fwnode = source->fwnode;
> +
> +		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
> +						     &source->asd);
> +		if (ret) {
> +			dev_err(dev, "Failed to add subdev for source %d", i);
> +			v4l2_async_notifier_cleanup(&priv->notifier);
> +			return ret;
> +		}
> +
> +		/*
> +		 * Balance the reference counting handled through
> +		 * v4l2_async_notifier_cleanup()
> +		 */
> +		fwnode_handle_get(source->fwnode);
> +	}
> +
> +	priv->notifier.ops = &max9286_notify_ops;
> +
> +	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
> +	if (ret) {
> +		dev_err(dev, "Failed to register subdev_notifier");
> +		v4l2_async_notifier_cleanup(&priv->notifier);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
> +{
> +	if (!priv->nsources)
> +		return;
> +
> +	v4l2_async_notifier_unregister(&priv->notifier);
> +	v4l2_async_notifier_cleanup(&priv->notifier);
> +}
> +
> +static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(sd);
> +	struct max9286_source *source;
> +	unsigned int i;
> +	bool sync = false;
> +	int ret;
> +
> +	if (enable) {
> +		/*
> +		 * The frame sync between cameras is transmitted across the
> +		 * reverse channel as GPIO. We must open all channels while
> +		 * streaming to allow this synchronisation signal to be shared.
> +		 */
> +		max9286_i2c_mux_open(priv);
> +
> +		/* Start all cameras. */
> +		for_each_source(priv, source) {
> +			ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
> +			if (ret)
> +				return ret;
> +		}
> +
> +		ret = max9286_check_video_links(priv);
> +		if (ret)
> +			return ret;
> +
> +		/*
> +		 * Wait until frame synchronization is locked.
> +		 *
> +		 * Manual says frame sync locking should take ~6 VTS.
> +		 * From practical experience at least 8 are required. Give
> +		 * 12 complete frames time (~400ms at 30 fps) to achieve frame
> +		 * locking before returning error.
> +		 */
> +		for (i = 0; i < 40; i++) {
> +			if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
> +				sync = true;
> +				break;
> +			}
> +			usleep_range(9000, 11000);
> +		}
> +
> +		if (!sync) {
> +			dev_err(&priv->client->dev,
> +				"Failed to get frame synchronization\n");
> +			return -EXDEV; /* Invalid cross-device link */
> +		}
> +
> +		/*
> +		 * Enable CSI output, VC set according to link number.
> +		 * Bit 7 must be set (chip manual says it's 0 and reserved).
> +		 */
> +		max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
> +			      MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
> +	} else {
> +		max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> +
> +		/* Stop all cameras. */
> +		for_each_source(priv, source)
> +			v4l2_subdev_call(source->sd, video, s_stream, 0);
> +
> +		max9286_i2c_mux_close(priv);
> +	}
> +
> +	return 0;
> +}
> +
> +static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
> +				  struct v4l2_subdev_pad_config *cfg,
> +				  struct v4l2_subdev_mbus_code_enum *code)
> +{
> +	if (code->pad || code->index > 0)
> +		return -EINVAL;
> +
> +	code->code = MEDIA_BUS_FMT_UYVY8_2X8;
> +
> +	return 0;
> +}
> +
> +static struct v4l2_mbus_framefmt *
> +max9286_get_pad_format(struct max9286_priv *priv,
> +		       struct v4l2_subdev_pad_config *cfg,
> +		       unsigned int pad, u32 which)
> +{
> +	switch (which) {
> +	case V4L2_SUBDEV_FORMAT_TRY:
> +		return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
> +	case V4L2_SUBDEV_FORMAT_ACTIVE:
> +		return &priv->fmt[pad];
> +	default:
> +		return NULL;
> +	}
> +}
> +
> +static int max9286_set_fmt(struct v4l2_subdev *sd,
> +			   struct v4l2_subdev_pad_config *cfg,
> +			   struct v4l2_subdev_format *format)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(sd);
> +	struct v4l2_mbus_framefmt *cfg_fmt;
> +
> +	if (format->pad >= MAX9286_SRC_PAD)
> +		return -EINVAL;
> +
> +	/* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
> +	switch (format->format.code) {
> +	case MEDIA_BUS_FMT_UYVY8_2X8:
> +	case MEDIA_BUS_FMT_VYUY8_2X8:
> +	case MEDIA_BUS_FMT_YUYV8_2X8:
> +	case MEDIA_BUS_FMT_YVYU8_2X8:
> +		break;
> +	default:
> +		format->format.code = MEDIA_BUS_FMT_YUYV8_2X8;
> +		break;
> +	}
> +
> +	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
> +	if (!cfg_fmt)
> +		return -EINVAL;
> +
> +	*cfg_fmt = format->format;
> +
> +	return 0;
> +}
> +
> +static int max9286_get_fmt(struct v4l2_subdev *sd,
> +			   struct v4l2_subdev_pad_config *cfg,
> +			   struct v4l2_subdev_format *format)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(sd);
> +	struct v4l2_mbus_framefmt *cfg_fmt;
> +
> +	if (format->pad >= MAX9286_SRC_PAD)
> +		return -EINVAL;
> +
> +	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
> +	if (!cfg_fmt)
> +		return -EINVAL;
> +
> +	format->format = *cfg_fmt;
> +
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_video_ops max9286_video_ops = {
> +	.s_stream	= max9286_s_stream,
> +};
> +
> +static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
> +	.enum_mbus_code = max9286_enum_mbus_code,
> +	.get_fmt	= max9286_get_fmt,
> +	.set_fmt	= max9286_set_fmt,
> +};
> +
> +static const struct v4l2_subdev_ops max9286_subdev_ops = {
> +	.video		= &max9286_video_ops,
> +	.pad		= &max9286_pad_ops,
> +};
> +
> +static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
> +{
> +	fmt->width		= 1280;
> +	fmt->height		= 800;
> +	fmt->code		= MEDIA_BUS_FMT_UYVY8_2X8;
> +	fmt->colorspace		= V4L2_COLORSPACE_SRGB;
> +	fmt->field		= V4L2_FIELD_NONE;
> +	fmt->ycbcr_enc		= V4L2_YCBCR_ENC_DEFAULT;
> +	fmt->quantization	= V4L2_QUANTIZATION_DEFAULT;
> +	fmt->xfer_func		= V4L2_XFER_FUNC_DEFAULT;
> +}
> +
> +static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
> +{
> +	struct v4l2_mbus_framefmt *format;
> +	unsigned int i;
> +
> +	for (i = 0; i < MAX9286_N_SINKS; i++) {
> +		format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
> +		max9286_init_format(format);
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
> +	.open = max9286_open,
> +};
> +
> +static int max9286_v4l2_register(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct fwnode_handle *ep;
> +	int ret;
> +	int i;
> +
> +	/* Register v4l2 async notifiers for connected Camera subdevices */
> +	ret = max9286_v4l2_notifier_register(priv);
> +	if (ret) {
> +		dev_err(dev, "Unable to register V4L2 async notifiers\n");
> +		return ret;
> +	}
> +
> +	/* Configure V4L2 for the MAX9286 itself */
> +
> +	v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
> +	priv->sd.internal_ops = &max9286_subdev_internal_ops;
> +	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> +
> +	v4l2_ctrl_handler_init(&priv->ctrls, 1);
> +	/*
> +	 * FIXME: Compute the real pixel rate. The 50 MP/s value comes from the
> +	 * hardcoded frequency in the BSP CSI-2 receiver driver.
> +	 */
> +	v4l2_ctrl_new_std(&priv->ctrls, NULL, V4L2_CID_PIXEL_RATE,
> +			  50000000, 50000000, 1, 50000000);
> +	priv->sd.ctrl_handler = &priv->ctrls;
> +	ret = priv->ctrls.error;
> +	if (ret)
> +		goto err_async;
> +
> +	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
> +
> +	priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
> +	for (i = 0; i < MAX9286_SRC_PAD; i++)
> +		priv->pads[i].flags = MEDIA_PAD_FL_SINK;
> +	ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
> +				     priv->pads);
> +	if (ret)
> +		goto err_async;
> +
> +	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
> +					     0, 0);
> +	if (!ep) {
> +		dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
> +		ret = -ENOENT;
> +		goto err_async;
> +	}
> +	priv->sd.fwnode = ep;
> +
> +	ret = v4l2_async_register_subdev(&priv->sd);
> +	if (ret < 0) {
> +		dev_err(dev, "Unable to register subdevice\n");
> +		goto err_put_node;
> +	}
> +
> +	return 0;
> +
> +err_put_node:
> +	fwnode_handle_put(ep);
> +err_async:
> +	max9286_v4l2_notifier_unregister(priv);
> +
> +	return ret;
> +}
> +
> +static void max9286_v4l2_unregister(struct max9286_priv *priv)
> +{
> +	fwnode_handle_put(priv->sd.fwnode);
> +	v4l2_async_unregister_subdev(&priv->sd);
> +	max9286_v4l2_notifier_unregister(priv);
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * Probe/Remove
> + */
> +
> +static int max9286_setup(struct max9286_priv *priv)
> +{
> +	/*
> +	 * Link ordering values for all enabled links combinations. Orders must
> +	 * be assigned sequentially from 0 to the number of enabled links
> +	 * without leaving any hole for disabled links. We thus assign orders to
> +	 * enabled links first, and use the remaining order values for disabled
> +	 * links are all links must have a different order value;
> +	 */
> +	static const u8 link_order[] = {
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
> +		(3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
> +		(3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
> +		(3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
> +		(3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
> +		(3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
> +		(0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
> +		(1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
> +		(1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
> +		(2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
> +		(1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
> +		(2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
> +		(2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
> +	};
> +
> +	/*
> +	 * Set the I2C bus speed.
> +	 *
> +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> +	 * only. This should be disabled after the mux is initialised.
> +	 */
> +	max9286_configure_i2c(priv, true);
> +
> +	/*
> +	 * Reverse channel setup.
> +	 *
> +	 * - Enable custom reverse channel configuration (through register 0x3f)
> +	 *   and set the first pulse length to 35 clock cycles.
> +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> +	 *   high threshold enabled by the serializer driver.
> +	 */
> +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> +		      MAX9286_REV_AMP_X);
> +	usleep_range(2000, 2500);
> +
> +	/*
> +	 * Enable GMSL links, mask unused ones and autodetect link
> +	 * used as CSI clock source.
> +	 */
> +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> +
> +	/*
> +	 * Video format setup:
> +	 * Disable CSI output, VC is set according to Link number.
> +	 */
> +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> +
> +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> +		      MAX9286_DATATYPE_YUV422_8BIT);
> +
> +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> +		      MAX9286_FSYNCMETH_AUTO);
> +
> +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> +		      MAX9286_HVSRC_D14);
> +
> +	/*
> +	 * Wait for 2ms to allow the link to resynchronize after the
> +	 * configuration change.
> +	 */
> +	usleep_range(2000, 5000);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id max9286_dt_ids[] = {
> +	{ .compatible = "maxim,max9286" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, max9286_dt_ids);
> +
> +static void max9286_gpio_set(struct gpio_chip *chip,
> +			     unsigned int offset, int value)
> +{
> +	struct max9286_priv *priv = gpiochip_get_data(chip);
> +
> +	if (value)
> +		priv->gpio_state |= BIT(offset);
> +	else
> +		priv->gpio_state &= ~BIT(offset);
> +
> +	max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
> +}
> +
> +static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
> +{
> +	struct max9286_priv *priv = gpiochip_get_data(chip);
> +
> +	return priv->gpio_state & BIT(offset);
> +}
> +
> +static int max9286_gpio(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct gpio_chip *gpio = &priv->gpio;
> +	int ret;
> +
> +	static const char * const names[] = {
> +		"GPIO0OUT",
> +		"GPIO1OUT",
> +	};
> +
> +	/* Configure the GPIO */
> +	gpio->label = dev_name(dev);
> +	gpio->parent = dev;
> +	gpio->owner = THIS_MODULE;
> +	gpio->of_node = dev->of_node;
> +	gpio->ngpio = 2;
> +	gpio->base = -1;
> +	gpio->set = max9286_gpio_set;
> +	gpio->get = max9286_gpio_get;
> +	gpio->can_sleep = true;
> +	gpio->names = names;
> +
> +	/* GPIO values default to high */
> +	priv->gpio_state = BIT(0) | BIT(1);
> +
> +	ret = devm_gpiochip_add_data(dev, gpio, priv);
> +	if (ret)
> +		dev_err(dev, "Unable to create gpio_chip\n");
> +
> +	return ret;
> +}
> +
> +static int max9286_init(struct device *dev)
> +{
> +	struct max9286_priv *priv;
> +	struct i2c_client *client;
> +	int ret;
> +
> +	/* Skip non-max9286 devices. */
> +	if (!dev->of_node || !of_match_node(max9286_dt_ids, dev->of_node))
> +		return 0;
> +
> +	client = to_i2c_client(dev);
> +	priv = i2c_get_clientdata(client);
> +
> +	/* Enable the bus power. */
> +	ret = regulator_enable(priv->regulator);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "Unable to turn PoC on\n");
> +		return ret;
> +	}
> +
> +	priv->poc_enabled = true;
> +
> +	ret = max9286_setup(priv);
> +	if (ret) {
> +		dev_err(dev, "Unable to setup max9286\n");
> +		goto err_regulator;
> +	}
> +
> +	/*
> +	 * Register all V4L2 interactions for the MAX9286 and notifiers for
> +	 * any subdevices connected.
> +	 */
> +	ret = max9286_v4l2_register(priv);
> +	if (ret) {
> +		dev_err(dev, "Failed to register with V4L2\n");
> +		goto err_regulator;
> +	}
> +
> +	ret = max9286_i2c_mux_init(priv);
> +	if (ret) {
> +		dev_err(dev, "Unable to initialize I2C multiplexer\n");
> +		goto err_v4l2_register;
> +	}
> +
> +	/* Leave the mux channels disabled until they are selected. */
> +	max9286_i2c_mux_close(priv);
> +
> +	return 0;
> +
> +err_v4l2_register:
> +	max9286_v4l2_unregister(priv);
> +err_regulator:
> +	regulator_disable(priv->regulator);
> +	priv->poc_enabled = false;
> +
> +	return ret;
> +}
> +
> +static void max9286_cleanup_dt(struct max9286_priv *priv)
> +{
> +	struct max9286_source *source;
> +
> +	for_each_source(priv, source) {
> +		fwnode_handle_put(source->fwnode);
> +		source->fwnode = NULL;
> +	}
> +}
> +
> +static int max9286_parse_dt(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct device_node *i2c_mux;
> +	struct device_node *node = NULL;
> +	unsigned int i2c_mux_mask = 0;
> +
> +	of_node_get(dev->of_node);
> +	i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
> +	if (!i2c_mux) {
> +		dev_err(dev, "Failed to find i2c-mux node\n");
> +		return -EINVAL;
> +	}
> +
> +	/* Identify which i2c-mux channels are enabled */
> +	for_each_child_of_node(i2c_mux, node) {
> +		u32 id = 0;
> +
> +		of_property_read_u32(node, "reg", &id);
> +		if (id >= MAX9286_NUM_GMSL)
> +			continue;
> +
> +		if (!of_device_is_available(node)) {
> +			dev_dbg(dev, "Skipping disabled I2C bus port %u\n",
> +				id);
> +			continue;
> +		}
> +
> +		i2c_mux_mask |= BIT(id);
> +	}
> +	of_node_put(node);
> +	of_node_put(i2c_mux);
> +
> +	/* Parse the endpoints */
> +	for_each_endpoint_of_node(dev->of_node, node) {
> +		struct max9286_source *source;
> +		struct of_endpoint ep;
> +
> +		of_graph_parse_endpoint(node, &ep);
> +		dev_dbg(dev, "Endpoint %pOF on port %d",
> +			ep.local_node, ep.port);
> +
> +		if (ep.port > MAX9286_NUM_GMSL) {
> +			dev_err(dev, "Invalid endpoint %s on port %d",
> +				of_node_full_name(ep.local_node), ep.port);
> +			continue;
> +		}
> +
> +		/* For the source endpoint just parse the bus configuration. */
> +		if (ep.port == MAX9286_SRC_PAD) {
> +			struct v4l2_fwnode_endpoint vep = {
> +				.bus_type = V4L2_MBUS_CSI2_DPHY
> +			};
> +			int ret;
> +
> +			ret = v4l2_fwnode_endpoint_parse(
> +					of_fwnode_handle(node), &vep);
> +			if (ret) {
> +				of_node_put(node);
> +				return ret;
> +			}
> +
> +			if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
> +				dev_err(dev,
> +					"Media bus %u type not supported\n",
> +					vep.bus_type);
> +				v4l2_fwnode_endpoint_free(&vep);
> +				of_node_put(node);
> +				return -EINVAL;
> +			}
> +
> +			priv->csi2_data_lanes =
> +				vep.bus.mipi_csi2.num_data_lanes;
> +			v4l2_fwnode_endpoint_free(&vep);
> +
> +			continue;
> +		}
> +
> +		/* Skip if the corresponding GMSL link is unavailable. */
> +		if (!(i2c_mux_mask & BIT(ep.port)))
> +			continue;
> +
> +		if (priv->sources[ep.port].fwnode) {
> +			dev_err(dev,
> +				"Multiple port endpoints are not supported: %d",
> +				ep.port);
> +
> +			continue;
> +		}
> +
> +		source = &priv->sources[ep.port];
> +		source->fwnode = fwnode_graph_get_remote_endpoint(
> +						of_fwnode_handle(node));
> +		if (!source->fwnode) {
> +			dev_err(dev,
> +				"Endpoint %pOF has no remote endpoint connection\n",
> +				ep.local_node);
> +
> +			continue;
> +		}
> +
> +		priv->source_mask |= BIT(ep.port);
> +		priv->nsources++;
> +	}
> +	of_node_put(node);
> +
> +	priv->route_mask = priv->source_mask;
> +
> +	return 0;
> +}
> +
> +static int max9286_probe(struct i2c_client *client)
> +{
> +	struct max9286_priv *priv;
> +	unsigned int i;
> +	int ret;
> +
> +	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;
> +
> +	priv->client = client;
> +	i2c_set_clientdata(client, priv);
> +
> +	for (i = 0; i < MAX9286_N_SINKS; i++)
> +		max9286_init_format(&priv->fmt[i]);
> +
> +	ret = max9286_parse_dt(priv);
> +	if (ret)
> +		return ret;
> +
> +	priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
> +						   GPIOD_OUT_HIGH);
> +	if (IS_ERR(priv->gpiod_pwdn))
> +		return PTR_ERR(priv->gpiod_pwdn);
> +
> +	gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
> +	gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
> +
> +	/* Wait at least 4ms before the I2C lines latch to the address */
> +	if (priv->gpiod_pwdn)
> +		usleep_range(4000, 5000);
> +
> +	ret = max9286_gpio(priv);
> +	if (ret)
> +		return ret;
> +
> +	priv->regulator = regulator_get(&client->dev, "poc");
> +	if (IS_ERR(priv->regulator)) {
> +		if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
> +			dev_err(&client->dev,
> +				"Unable to get PoC regulator (%ld)\n",
> +				PTR_ERR(priv->regulator));
> +		ret = PTR_ERR(priv->regulator);
> +		priv->regulator = NULL;
> +		goto err_free;
> +	}
> +
> +	/*
> +	 * We can have multiple MAX9286 instances on the same physical I2C
> +	 * bus, and I2C children behind ports of separate MAX9286 instances
> +	 * having the same I2C address. As the MAX9286 starts by default with
> +	 * all ports enabled, we need to disable all ports on all MAX9286
> +	 * instances before proceeding to further initialize the devices and
> +	 * instantiate children.
> +	 *
> +	 * Start by just disabling all channels on the current device. Then,
> +	 * if all other MAX9286 on the parent bus have been probed, proceed
> +	 * to initialize them all, including the current one.
> +	 */
> +	max9286_i2c_mux_close(priv);
> +
> +	/*
> +	 * The MAX9286 initialises with auto-acknowledge enabled by default.
> +	 * This means that if multiple MAX9286 devices are connected to an I2C
> +	 * bus, another MAX9286 could ack I2C transfers meant for a device on
> +	 * the other side of the GMSL links for this MAX9286 (such as a
> +	 * MAX9271). To prevent that disable auto-acknowledge early on; it
> +	 * will be enabled later as needed.
> +	 */
> +	max9286_configure_i2c(priv, false);
> +
> +	ret = max9286_init(&client->dev);
> +	if (ret < 0)
> +		goto err_regulator;
> +
> +	return 0;
> +
> +err_regulator:
> +	regulator_put(priv->regulator);
> +	max9286_i2c_mux_close(priv);
> +	max9286_configure_i2c(priv, false);
> +err_free:
> +	max9286_cleanup_dt(priv);
> +	kfree(priv);
> +
> +	return ret;
> +}
> +
> +static int max9286_remove(struct i2c_client *client)
> +{
> +	struct max9286_priv *priv = i2c_get_clientdata(client);
> +
> +	i2c_mux_del_adapters(priv->mux);
> +
> +	max9286_v4l2_unregister(priv);
> +
> +	if (priv->poc_enabled)
> +		regulator_disable(priv->regulator);
> +	regulator_put(priv->regulator);
> +
> +	max9286_cleanup_dt(priv);
> +
> +	gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
> +
> +	kfree(priv);
> +
> +	return 0;
> +}
> +
> +static const struct i2c_device_id max9286_id[] = {
> +	{ "max9286", 0 },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(i2c, max9286_id);
> +
> +static struct i2c_driver max9286_i2c_driver = {
> +	.driver	= {
> +		.name		= "max9286",
> +		.of_match_table	= of_match_ptr(max9286_dt_ids),
> +	},
> +	.probe_new	= max9286_probe,
> +	.remove		= max9286_remove,
> +	.id_table	= max9286_id,
> +};
> +
> +module_i2c_driver(max9286_i2c_driver);
> +
> +MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
> +MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
> +MODULE_LICENSE("GPL");
>
Sakari Ailus Feb. 21, 2020, 7:59 a.m. UTC | #2
Hi Kieran,

Thank you for the update. I have some comments below.

On Fri, Feb 14, 2020 at 10:31:36AM +0000, Kieran Bingham wrote:
> The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
> CSI-2 output. The device supports multicamera streaming applications,
> and features the ability to synchronise the attached cameras.
> 
> CSI-2 output can be configured with 1 to 4 lanes, and a control channel
> is supported over I2C, which implements an I2C mux to facilitate
> communications with connected cameras across the reverse control
> channel.

Do you happen to have an example of a sensor driver that would work with
this driver?

> 
> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> 
> --
> v2:
>  - Fix MAINTAINERS entry
> 
> This posting is released with the following modifications to work
> without Sakari's VC developments:
>  - max9286_g_mbus_config() re-instated
>  - max9286_get_frame_desc() is not bus/csi aware
>  - max9286_{get,set}_routing() removed
> 
> v3:
>  - Initialise notifier with v4l2_async_notifier_init
>  - Update for new mbus csi2 format V4L2_MBUS_CSI2_DPHY
> 
> v4: - Re-introduce required code to function with the VC series.
> 
>  - Implement max9286_get_routing, max9286_set_routing
>  - Remove max9286_g_mbus_config

I understand there is no dependency to the VC patchset.

How does the receiver figure out what it should receive? Do you assume a
particular receiver driver, for example?

> 
> v5: (internal release)
>  - Fix printk formatting for hex value
>  - max9286->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE (add |)
>  - MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER -> MEDIA_ENT_F_VID_IF_BRIDGE
>  - Remove 'device is bound' workaround
> 
> v6:
>  - v4l2_subdev_krouting instead of v4l2_subdev_routing separated
>    to allow integration without the VC/V4L2-Mux series.
>  - convert sd_to_max9286 to inline function
>  - rename max9286_device to max9286_priv
>  - Cleanup the v4l2_async_notifier
>  - Extend MODULE_AUTHOR
>  - Replace of_graph_get_endpoint_by_regs with fwnode_graph_get_endpoint_by_id
>  - Pass default bus type when parsing fwnode endpoint (Manivannan Sadhasivam)
>  - Use new YAML file reference in MAINTAINERS
>  - Parse new i2c-mux node in max9286_get_i2c_by_id
>    (This could/should be refactored to parse these separately first)
>  - Spelling and calculation fixes in the FSYNC_LOCKED check comments
>  - Identify each enabled i2c-mux channel in a single pass
>  - max9286: Improve mux-state readbility [v2]
>  - Fix frame sync lock durations
>  - Add comment to describe /why/ we must open the mux in s_stream
>  - use -EXDEV as return code for failed link synchronisation.
>  - Fix reference counting of the dt nodeS
>  - Convert to probe_new for I2C
>  - Remove redundant max9286_i2c_mux_state
>  - Provide optional enable-gpio (max9286-pwdn)
> 
> v7:
>  [Kieran]
>  - Ensure powerdown lines are optional
>  - Add a 4ms power-up delay
>  - Add max9286_check_config_link() to core
>  - Add GPIO chip controller for GPIO0OUT and GPIO1OUT
>  - Fix GPIO registration
>  - max9286: Split out async registration
>    (fixes regulator -EPROBE_DEFERs failures)
>  - Collect all V4L2 registrations
>  - balance v4l2_async refcnting
>  - Rename max9286_v4l2_async_ => max9286_v4l2_notifier_
> 
>  [Jacopo]
>  - Remove redundanct MAXIM_I2C_SPEED macros
>  - Move notifiers operations
>  - Add delay after reverse channel reconfiguration
>  - Move link setup to completion
>  - Fix up max9286_check_config_link() implementation
>  - Remove redundant dual configuration of reverse channel
> 
>  MAINTAINERS                 |   10 +
>  drivers/media/i2c/Kconfig   |   11 +
>  drivers/media/i2c/Makefile  |    1 +
>  drivers/media/i2c/max9286.c | 1278 +++++++++++++++++++++++++++++++++++
>  4 files changed, 1300 insertions(+)
>  create mode 100644 drivers/media/i2c/max9286.c
> 
> diff --git a/MAINTAINERS b/MAINTAINERS
> index 983d3c97edd1..148706353d25 100644
> --- a/MAINTAINERS
> +++ b/MAINTAINERS
> @@ -10033,6 +10033,16 @@ F:	Documentation/devicetree/bindings/hwmon/max6697.txt
>  F:	drivers/hwmon/max6697.c
>  F:	include/linux/platform_data/max6697.h
>  
> +MAX9286 QUAD GMSL DESERIALIZER DRIVER
> +M:	Jacopo Mondi <jacopo+renesas@jmondi.org>
> +M:	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> +M:	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> +M:	Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> +L:	linux-media@vger.kernel.org
> +S:	Maintained
> +F:	Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml
> +F:	drivers/media/i2c/max9286.c
> +
>  MAX9860 MONO AUDIO VOICE CODEC DRIVER
>  M:	Peter Rosin <peda@axentia.se>
>  L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
> diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
> index c68e002d26ea..32a4deb90617 100644
> --- a/drivers/media/i2c/Kconfig
> +++ b/drivers/media/i2c/Kconfig
> @@ -442,6 +442,17 @@ config VIDEO_VPX3220
>  	  To compile this driver as a module, choose M here: the
>  	  module will be called vpx3220.
>  
> +config VIDEO_MAX9286
> +	tristate "Maxim MAX9286 GMSL deserializer support"
> +	depends on I2C && I2C_MUX
> +	depends on VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER
> +	select V4L2_FWNODE
> +	help
> +	  This driver supports the Maxim MAX9286 GMSL deserializer.
> +
> +	  To compile this driver as a module, choose M here: the
> +	  module will be called max9286.
> +
>  comment "Video and audio decoders"
>  
>  config VIDEO_SAA717X
> diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
> index c147bb9d28db..8896cf8bfc4f 100644
> --- a/drivers/media/i2c/Makefile
> +++ b/drivers/media/i2c/Makefile
> @@ -117,5 +117,6 @@ obj-$(CONFIG_VIDEO_IMX290)	+= imx290.o
>  obj-$(CONFIG_VIDEO_IMX319)	+= imx319.o
>  obj-$(CONFIG_VIDEO_IMX355)	+= imx355.o
>  obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o
> +obj-$(CONFIG_VIDEO_MAX9286)	+= max9286.o
>  
>  obj-$(CONFIG_SDR_MAX2175) += max2175.o
> diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c
> new file mode 100644
> index 000000000000..a20829297ef6
> --- /dev/null
> +++ b/drivers/media/i2c/max9286.c
> @@ -0,0 +1,1278 @@
> +// SPDX-License-Identifier: GPL-2.0+
> +/*
> + * Maxim MAX9286 GMSL Deserializer Driver
> + *
> + * Copyright (C) 2017-2019 Jacopo Mondi
> + * Copyright (C) 2017-2019 Kieran Bingham
> + * Copyright (C) 2017-2019 Laurent Pinchart
> + * Copyright (C) 2017-2019 Niklas Söderlund
> + * Copyright (C) 2016 Renesas Electronics Corporation
> + * Copyright (C) 2015 Cogent Embedded, Inc.
> + */
> +
> +#include <linux/delay.h>
> +#include <linux/device.h>
> +#include <linux/fwnode.h>
> +#include <linux/gpio/consumer.h>
> +#include <linux/gpio/driver.h>
> +#include <linux/i2c.h>
> +#include <linux/i2c-mux.h>
> +#include <linux/module.h>
> +#include <linux/of_graph.h>
> +#include <linux/regulator/consumer.h>
> +#include <linux/slab.h>
> +
> +#include <media/v4l2-async.h>
> +#include <media/v4l2-ctrls.h>
> +#include <media/v4l2-device.h>
> +#include <media/v4l2-fwnode.h>
> +#include <media/v4l2-subdev.h>
> +
> +/* Register 0x00 */
> +#define MAX9286_MSTLINKSEL_AUTO		(7 << 5)
> +#define MAX9286_MSTLINKSEL(n)		((n) << 5)
> +#define MAX9286_EN_VS_GEN		BIT(4)
> +#define MAX9286_LINKEN(n)		(1 << (n))
> +/* Register 0x01 */
> +#define MAX9286_FSYNCMODE_ECU		(3 << 6)
> +#define MAX9286_FSYNCMODE_EXT		(2 << 6)
> +#define MAX9286_FSYNCMODE_INT_OUT	(1 << 6)
> +#define MAX9286_FSYNCMODE_INT_HIZ	(0 << 6)
> +#define MAX9286_GPIEN			BIT(5)
> +#define MAX9286_ENLMO_RSTFSYNC		BIT(2)
> +#define MAX9286_FSYNCMETH_AUTO		(2 << 0)
> +#define MAX9286_FSYNCMETH_SEMI_AUTO	(1 << 0)
> +#define MAX9286_FSYNCMETH_MANUAL	(0 << 0)
> +#define MAX9286_REG_FSYNC_PERIOD_L	0x06
> +#define MAX9286_REG_FSYNC_PERIOD_M	0x07
> +#define MAX9286_REG_FSYNC_PERIOD_H	0x08
> +/* Register 0x0a */
> +#define MAX9286_FWDCCEN(n)		(1 << ((n) + 4))
> +#define MAX9286_REVCCEN(n)		(1 << (n))
> +/* Register 0x0c */
> +#define MAX9286_HVEN			BIT(7)
> +#define MAX9286_EDC_6BIT_HAMMING	(2 << 5)
> +#define MAX9286_EDC_6BIT_CRC		(1 << 5)
> +#define MAX9286_EDC_1BIT_PARITY		(0 << 5)
> +#define MAX9286_DESEL			BIT(4)
> +#define MAX9286_INVVS			BIT(3)
> +#define MAX9286_INVHS			BIT(2)
> +#define MAX9286_HVSRC_D0		(2 << 0)
> +#define MAX9286_HVSRC_D14		(1 << 0)
> +#define MAX9286_HVSRC_D18		(0 << 0)
> +/* Register 0x0f */
> +#define MAX9286_0X0F_RESERVED		BIT(3)
> +/* Register 0x12 */
> +#define MAX9286_CSILANECNT(n)		(((n) - 1) << 6)
> +#define MAX9286_CSIDBL			BIT(5)
> +#define MAX9286_DBL			BIT(4)
> +#define MAX9286_DATATYPE_USER_8BIT	(11 << 0)
> +#define MAX9286_DATATYPE_USER_YUV_12BIT	(10 << 0)
> +#define MAX9286_DATATYPE_USER_24BIT	(9 << 0)
> +#define MAX9286_DATATYPE_RAW14		(8 << 0)
> +#define MAX9286_DATATYPE_RAW11		(7 << 0)
> +#define MAX9286_DATATYPE_RAW10		(6 << 0)
> +#define MAX9286_DATATYPE_RAW8		(5 << 0)
> +#define MAX9286_DATATYPE_YUV422_10BIT	(4 << 0)
> +#define MAX9286_DATATYPE_YUV422_8BIT	(3 << 0)
> +#define MAX9286_DATATYPE_RGB555		(2 << 0)
> +#define MAX9286_DATATYPE_RGB565		(1 << 0)
> +#define MAX9286_DATATYPE_RGB888		(0 << 0)
> +/* Register 0x15 */
> +#define MAX9286_VC(n)			((n) << 5)
> +#define MAX9286_VCTYPE			BIT(4)
> +#define MAX9286_CSIOUTEN		BIT(3)
> +#define MAX9286_0X15_RESV		(3 << 0)
> +/* Register 0x1b */
> +#define MAX9286_SWITCHIN(n)		(1 << ((n) + 4))
> +#define MAX9286_ENEQ(n)			(1 << (n))
> +/* Register 0x27 */
> +#define MAX9286_LOCKED			BIT(7)
> +/* Register 0x31 */
> +#define MAX9286_FSYNC_LOCKED		BIT(6)
> +/* Register 0x34 */
> +#define MAX9286_I2CLOCACK		BIT(7)
> +#define MAX9286_I2CSLVSH_1046NS_469NS	(3 << 5)
> +#define MAX9286_I2CSLVSH_938NS_352NS	(2 << 5)
> +#define MAX9286_I2CSLVSH_469NS_234NS	(1 << 5)
> +#define MAX9286_I2CSLVSH_352NS_117NS	(0 << 5)
> +#define MAX9286_I2CMSTBT_837KBPS	(7 << 2)
> +#define MAX9286_I2CMSTBT_533KBPS	(6 << 2)
> +#define MAX9286_I2CMSTBT_339KBPS	(5 << 2)
> +#define MAX9286_I2CMSTBT_173KBPS	(4 << 2)
> +#define MAX9286_I2CMSTBT_105KBPS	(3 << 2)
> +#define MAX9286_I2CMSTBT_84KBPS		(2 << 2)
> +#define MAX9286_I2CMSTBT_28KBPS		(1 << 2)
> +#define MAX9286_I2CMSTBT_8KBPS		(0 << 2)
> +#define MAX9286_I2CSLVTO_NONE		(3 << 0)
> +#define MAX9286_I2CSLVTO_1024US		(2 << 0)
> +#define MAX9286_I2CSLVTO_256US		(1 << 0)
> +#define MAX9286_I2CSLVTO_64US		(0 << 0)
> +/* Register 0x3b */
> +#define MAX9286_REV_TRF(n)		((n) << 4)
> +#define MAX9286_REV_AMP(n)		((((n) - 30) / 10) << 1) /* in mV */
> +#define MAX9286_REV_AMP_X		BIT(0)
> +/* Register 0x3f */
> +#define MAX9286_EN_REV_CFG		BIT(6)
> +#define MAX9286_REV_FLEN(n)		((n) - 20)
> +/* Register 0x49 */
> +#define MAX9286_VIDEO_DETECT_MASK	0x0f
> +/* Register 0x69 */
> +#define MAX9286_LFLTBMONMASKED		BIT(7)
> +#define MAX9286_LOCKMONMASKED		BIT(6)
> +#define MAX9286_AUTOCOMBACKEN		BIT(5)
> +#define MAX9286_AUTOMASKEN		BIT(4)
> +#define MAX9286_MASKLINK(n)		((n) << 0)
> +
> +#define MAX9286_NUM_GMSL		4
> +#define MAX9286_N_SINKS			4
> +#define MAX9286_N_PADS			5
> +#define MAX9286_SRC_PAD			4
> +
> +struct max9286_source {
> +	struct v4l2_async_subdev asd;
> +	struct v4l2_subdev *sd;
> +	struct fwnode_handle *fwnode;
> +};
> +
> +#define asd_to_max9286_source(_asd) \
> +	container_of(_asd, struct max9286_source, asd)
> +
> +struct max9286_priv {
> +	struct i2c_client *client;
> +	struct gpio_desc *gpiod_pwdn;
> +	struct v4l2_subdev sd;
> +	struct media_pad pads[MAX9286_N_PADS];
> +	struct regulator *regulator;
> +	bool poc_enabled;
> +
> +	struct gpio_chip gpio;
> +	u8 gpio_state;
> +
> +	struct i2c_mux_core *mux;
> +	unsigned int mux_channel;
> +	bool mux_open;
> +
> +	struct v4l2_ctrl_handler ctrls;
> +
> +	struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
> +
> +	unsigned int nsources;
> +	unsigned int source_mask;
> +	unsigned int route_mask;
> +	unsigned int bound_sources;
> +	unsigned int csi2_data_lanes;
> +	struct max9286_source sources[MAX9286_NUM_GMSL];
> +	struct v4l2_async_notifier notifier;
> +};
> +
> +static struct max9286_source *next_source(struct max9286_priv *priv,
> +					  struct max9286_source *source)
> +{
> +	if (!source)
> +		source = &priv->sources[0];
> +	else
> +		source++;
> +
> +	for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
> +		if (source->fwnode)
> +			return source;
> +	}
> +
> +	return NULL;
> +}
> +
> +#define for_each_source(priv, source) \
> +	for ((source) = NULL; ((source) = next_source((priv), (source))); )
> +
> +#define to_index(priv, source) ((source) - &(priv)->sources[0])
> +
> +static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
> +{
> +	return container_of(sd, struct max9286_priv, sd);
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * I2C IO
> + */
> +
> +static int max9286_read(struct max9286_priv *priv, u8 reg)
> +{
> +	int ret;
> +
> +	ret = i2c_smbus_read_byte_data(priv->client, reg);
> +	if (ret < 0)
> +		dev_err(&priv->client->dev,
> +			"%s: register 0x%02x read failed (%d)\n",
> +			__func__, reg, ret);
> +
> +	return ret;
> +}
> +
> +static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
> +{
> +	int ret;
> +
> +	ret = i2c_smbus_write_byte_data(priv->client, reg, val);
> +	if (ret < 0)
> +		dev_err(&priv->client->dev,
> +			"%s: register 0x%02x write failed (%d)\n",
> +			__func__, reg, ret);
> +
> +	return ret;
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * I2C Multiplexer
> + */
> +
> +static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
> +{
> +	max9286_write(priv, 0x0a, conf);
> +
> +	/*
> +	 * We must sleep after any change to the forward or reverse channel
> +	 * configuration.
> +	 */
> +	usleep_range(3000, 5000);
> +}
> +
> +static void max9286_i2c_mux_open(struct max9286_priv *priv)
> +{
> +	/* Open all channels on the MAX9286 */
> +	max9286_i2c_mux_configure(priv, 0xff);
> +
> +	priv->mux_open = true;
> +}
> +
> +static void max9286_i2c_mux_close(struct max9286_priv *priv)
> +{
> +	/*
> +	 * Ensure that both the forward and reverse channel are disabled on the
> +	 * mux, and that the channel ID is invalidated to ensure we reconfigure
> +	 * on the next max9286_i2c_mux_select() call.
> +	 */
> +	max9286_i2c_mux_configure(priv, 0x00);
> +
> +	priv->mux_open = false;
> +	priv->mux_channel = -1;
> +}
> +
> +static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
> +{
> +	struct max9286_priv *priv = i2c_mux_priv(muxc);
> +
> +	/* Channel select is disabled when configured in the opened state. */
> +	if (priv->mux_open)
> +		return 0;
> +
> +	if (priv->mux_channel == chan)
> +		return 0;
> +
> +	priv->mux_channel = chan;
> +
> +	max9286_i2c_mux_configure(priv,
> +				  MAX9286_FWDCCEN(chan) |
> +				  MAX9286_REVCCEN(chan));
> +
> +	return 0;
> +}
> +
> +static int max9286_i2c_mux_init(struct max9286_priv *priv)
> +{
> +	struct max9286_source *source;
> +	int ret;
> +
> +	if (!i2c_check_functionality(priv->client->adapter,
> +				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
> +		return -ENODEV;
> +
> +	priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
> +				  priv->nsources, 0, I2C_MUX_LOCKED,
> +				  max9286_i2c_mux_select, NULL);
> +	if (!priv->mux)
> +		return -ENOMEM;
> +
> +	priv->mux->priv = priv;
> +
> +	for_each_source(priv, source) {
> +		unsigned int index = to_index(priv, source);
> +
> +		ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
> +		if (ret < 0)
> +			goto error;
> +	}
> +
> +	return 0;
> +
> +error:
> +	i2c_mux_del_adapters(priv->mux);
> +	return ret;
> +}
> +
> +static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
> +{
> +	u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
> +		    MAX9286_I2CMSTBT_105KBPS;
> +
> +	if (localack)
> +		config |= MAX9286_I2CLOCACK;
> +
> +	max9286_write(priv, 0x34, config);
> +	usleep_range(3000, 5000);
> +}
> +
> +/*
> + * max9286_check_video_links() - Make sure video links are detected and locked
> + *
> + * Performs safety checks on video link status. Make sure they are detected
> + * and all enabled links are locked.
> + *
> + * Returns 0 for success, -EIO for errors.
> + */
> +static int max9286_check_video_links(struct max9286_priv *priv)
> +{
> +	unsigned int i;
> +	int ret;
> +
> +	/*
> +	 * Make sure valid video links are detected.
> +	 * The delay is not characterized in de-serializer manual, wait up
> +	 * to 5 ms.
> +	 */
> +	for (i = 0; i < 10; i++) {
> +		ret = max9286_read(priv, 0x49);
> +		if (ret < 0)
> +			return -EIO;
> +
> +		if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
> +			break;
> +
> +		usleep_range(350, 500);
> +	}
> +
> +	if (i == 10) {
> +		dev_err(&priv->client->dev,
> +			"Unable to detect video links: 0x%02x\n", ret);
> +		return -EIO;
> +	}
> +
> +	/* Make sure all enabled links are locked (4ms max). */
> +	for (i = 0; i < 10; i++) {
> +		ret = max9286_read(priv, 0x27);
> +		if (ret < 0)
> +			return -EIO;
> +
> +		if (ret & MAX9286_LOCKED)
> +			break;
> +
> +		usleep_range(350, 450);
> +	}
> +
> +	if (i == 10) {
> +		dev_err(&priv->client->dev, "Not all enabled links locked\n");
> +		return -EIO;
> +	}
> +
> +	return 0;
> +}
> +
> +/*
> + * max9286_check_config_link() - Detect and wait for configuration links
> + *
> + * Determine if the configuration channel is up and settled for a link.
> + *
> + * Returns 0 for success, -EIO for errors.
> + */
> +static int max9286_check_config_link(struct max9286_priv *priv,
> +				     unsigned int source_mask)
> +{
> +	unsigned int conflink_mask = (source_mask & 0x0f) << 4;
> +	unsigned int i;
> +	int ret;
> +
> +	/*
> +	 * Make sure requested configuration links are detected.
> +	 * The delay is not characterized in the chip manual: wait up
> +	 * to 5 milliseconds.
> +	 */
> +	for (i = 0; i < 10; i++) {
> +		ret = max9286_read(priv, 0x49) & 0xf0;
> +		if (ret < 0)
> +			return -EIO;
> +
> +		if (ret == conflink_mask)
> +			break;
> +
> +		usleep_range(350, 500);
> +	}
> +
> +	if (ret != conflink_mask) {
> +		dev_err(&priv->client->dev,
> +			"Unable to detect configuration links: 0x%02x expected 0x%02x\n",
> +			ret, conflink_mask);
> +		return -EIO;
> +	}
> +
> +	dev_info(&priv->client->dev,
> +		 "Successfully detected configuration links after %u loops: 0x%02x\n",
> +		 i, conflink_mask);
> +
> +	return 0;
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * V4L2 Subdev
> + */
> +
> +static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
> +				struct v4l2_subdev *subdev,
> +				struct v4l2_async_subdev *asd)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(notifier->sd);
> +	struct max9286_source *source = asd_to_max9286_source(asd);
> +	unsigned int index = to_index(priv, source);
> +	unsigned int src_pad;
> +	int ret;
> +
> +	ret = media_entity_get_fwnode_pad(&subdev->entity,
> +					  source->fwnode,
> +					  MEDIA_PAD_FL_SOURCE);
> +	if (ret < 0) {
> +		dev_err(&priv->client->dev,
> +			"Failed to find pad for %s\n", subdev->name);
> +		return ret;
> +	}
> +
> +	priv->bound_sources |= BIT(index);
> +	source->sd = subdev;
> +	src_pad = ret;
> +
> +	ret = media_create_pad_link(&source->sd->entity, src_pad,
> +				    &priv->sd.entity, index,
> +				    MEDIA_LNK_FL_ENABLED |
> +				    MEDIA_LNK_FL_IMMUTABLE);
> +	if (ret) {
> +		dev_err(&priv->client->dev,
> +			"Unable to link %s:%u -> %s:%u\n",
> +			source->sd->name, src_pad, priv->sd.name, index);
> +		return ret;
> +	}
> +
> +	dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
> +		subdev->name, src_pad, index);
> +
> +	/*
> +	 * We can only register v4l2_async_notifiers which do not provide a
> +	 * means to register a complete callback. bound_sources allows us to
> +	 * identify when all remove serializers have completed their probe.
> +	 */
> +	if (priv->bound_sources != priv->source_mask)
> +		return 0;
> +
> +	/*
> +	 * All enabled sources have probed and enabled their reverse control
> +	 * channels:
> +	 *
> +	 * - Verify all configuration links are properly detected
> +	 * - Disable auto-ack as communication on the control channel are now
> +	 *   stable.
> +	 */
> +	max9286_check_config_link(priv, priv->source_mask);
> +
> +	/*
> +	 * Re-configure I2C with local acknowledge disabled after cameras have
> +	 * probed.
> +	 */
> +	max9286_configure_i2c(priv, false);
> +
> +	return 0;
> +}
> +
> +static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
> +				  struct v4l2_subdev *subdev,
> +				  struct v4l2_async_subdev *asd)
> +{
> +	struct max9286_source *source = asd_to_max9286_source(asd);
> +
> +	source->sd = NULL;
> +}
> +
> +static const struct v4l2_async_notifier_operations max9286_notify_ops = {
> +	.bound = max9286_notify_bound,
> +	.unbind = max9286_notify_unbind,
> +};
> +
> +static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct max9286_source *source = NULL;
> +	int ret;
> +
> +	if (!priv->nsources)
> +		return 0;
> +
> +	v4l2_async_notifier_init(&priv->notifier);
> +
> +	for_each_source(priv, source) {
> +		unsigned int i = to_index(priv, source);
> +
> +		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> +		source->asd.match.fwnode = source->fwnode;
> +
> +		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
> +						     &source->asd);
> +		if (ret) {
> +			dev_err(dev, "Failed to add subdev for source %d", i);
> +			v4l2_async_notifier_cleanup(&priv->notifier);
> +			return ret;
> +		}
> +
> +		/*
> +		 * Balance the reference counting handled through
> +		 * v4l2_async_notifier_cleanup()
> +		 */
> +		fwnode_handle_get(source->fwnode);
> +	}
> +
> +	priv->notifier.ops = &max9286_notify_ops;
> +
> +	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
> +	if (ret) {
> +		dev_err(dev, "Failed to register subdev_notifier");
> +		v4l2_async_notifier_cleanup(&priv->notifier);
> +		return ret;
> +	}
> +
> +	return 0;
> +}
> +
> +static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
> +{
> +	if (!priv->nsources)
> +		return;
> +
> +	v4l2_async_notifier_unregister(&priv->notifier);
> +	v4l2_async_notifier_cleanup(&priv->notifier);
> +}
> +
> +static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(sd);
> +	struct max9286_source *source;
> +	unsigned int i;
> +	bool sync = false;
> +	int ret;
> +
> +	if (enable) {
> +		/*
> +		 * The frame sync between cameras is transmitted across the
> +		 * reverse channel as GPIO. We must open all channels while
> +		 * streaming to allow this synchronisation signal to be shared.
> +		 */
> +		max9286_i2c_mux_open(priv);

What does this do here, actually? What happens if the user attempts to
access the sensor before this call?

> +
> +		/* Start all cameras. */
> +		for_each_source(priv, source) {
> +			ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
> +			if (ret)
> +				return ret;
> +		}
> +
> +		ret = max9286_check_video_links(priv);
> +		if (ret)
> +			return ret;
> +
> +		/*
> +		 * Wait until frame synchronization is locked.
> +		 *
> +		 * Manual says frame sync locking should take ~6 VTS.
> +		 * From practical experience at least 8 are required. Give
> +		 * 12 complete frames time (~400ms at 30 fps) to achieve frame
> +		 * locking before returning error.
> +		 */
> +		for (i = 0; i < 40; i++) {
> +			if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
> +				sync = true;
> +				break;
> +			}
> +			usleep_range(9000, 11000);
> +		}
> +
> +		if (!sync) {
> +			dev_err(&priv->client->dev,
> +				"Failed to get frame synchronization\n");
> +			return -EXDEV; /* Invalid cross-device link */
> +		}
> +
> +		/*
> +		 * Enable CSI output, VC set according to link number.
> +		 * Bit 7 must be set (chip manual says it's 0 and reserved).
> +		 */
> +		max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
> +			      MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
> +	} else {
> +		max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> +
> +		/* Stop all cameras. */
> +		for_each_source(priv, source)
> +			v4l2_subdev_call(source->sd, video, s_stream, 0);
> +
> +		max9286_i2c_mux_close(priv);
> +	}
> +
> +	return 0;
> +}
> +
> +static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
> +				  struct v4l2_subdev_pad_config *cfg,
> +				  struct v4l2_subdev_mbus_code_enum *code)
> +{
> +	if (code->pad || code->index > 0)
> +		return -EINVAL;
> +
> +	code->code = MEDIA_BUS_FMT_UYVY8_2X8;
> +
> +	return 0;
> +}
> +
> +static struct v4l2_mbus_framefmt *
> +max9286_get_pad_format(struct max9286_priv *priv,
> +		       struct v4l2_subdev_pad_config *cfg,
> +		       unsigned int pad, u32 which)
> +{
> +	switch (which) {
> +	case V4L2_SUBDEV_FORMAT_TRY:
> +		return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
> +	case V4L2_SUBDEV_FORMAT_ACTIVE:
> +		return &priv->fmt[pad];
> +	default:
> +		return NULL;
> +	}
> +}
> +
> +static int max9286_set_fmt(struct v4l2_subdev *sd,
> +			   struct v4l2_subdev_pad_config *cfg,
> +			   struct v4l2_subdev_format *format)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(sd);
> +	struct v4l2_mbus_framefmt *cfg_fmt;
> +
> +	if (format->pad >= MAX9286_SRC_PAD)
> +		return -EINVAL;
> +
> +	/* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
> +	switch (format->format.code) {
> +	case MEDIA_BUS_FMT_UYVY8_2X8:
> +	case MEDIA_BUS_FMT_VYUY8_2X8:
> +	case MEDIA_BUS_FMT_YUYV8_2X8:
> +	case MEDIA_BUS_FMT_YVYU8_2X8:
> +		break;
> +	default:
> +		format->format.code = MEDIA_BUS_FMT_YUYV8_2X8;
> +		break;
> +	}
> +
> +	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
> +	if (!cfg_fmt)
> +		return -EINVAL;
> +
> +	*cfg_fmt = format->format;

I believe access to cfg_fmt needs to be serialised, by using e.g. a mutex.

> +
> +	return 0;
> +}
> +
> +static int max9286_get_fmt(struct v4l2_subdev *sd,
> +			   struct v4l2_subdev_pad_config *cfg,
> +			   struct v4l2_subdev_format *format)
> +{
> +	struct max9286_priv *priv = sd_to_max9286(sd);
> +	struct v4l2_mbus_framefmt *cfg_fmt;
> +
> +	if (format->pad >= MAX9286_SRC_PAD)
> +		return -EINVAL;
> +
> +	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
> +	if (!cfg_fmt)
> +		return -EINVAL;
> +
> +	format->format = *cfg_fmt;

Same here.

> +
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_video_ops max9286_video_ops = {
> +	.s_stream	= max9286_s_stream,
> +};
> +
> +static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
> +	.enum_mbus_code = max9286_enum_mbus_code,
> +	.get_fmt	= max9286_get_fmt,
> +	.set_fmt	= max9286_set_fmt,
> +};
> +
> +static const struct v4l2_subdev_ops max9286_subdev_ops = {
> +	.video		= &max9286_video_ops,
> +	.pad		= &max9286_pad_ops,
> +};
> +
> +static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
> +{
> +	fmt->width		= 1280;
> +	fmt->height		= 800;
> +	fmt->code		= MEDIA_BUS_FMT_UYVY8_2X8;
> +	fmt->colorspace		= V4L2_COLORSPACE_SRGB;
> +	fmt->field		= V4L2_FIELD_NONE;
> +	fmt->ycbcr_enc		= V4L2_YCBCR_ENC_DEFAULT;
> +	fmt->quantization	= V4L2_QUANTIZATION_DEFAULT;
> +	fmt->xfer_func		= V4L2_XFER_FUNC_DEFAULT;
> +}
> +
> +static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
> +{
> +	struct v4l2_mbus_framefmt *format;
> +	unsigned int i;
> +
> +	for (i = 0; i < MAX9286_N_SINKS; i++) {
> +		format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
> +		max9286_init_format(format);
> +	}
> +
> +	return 0;
> +}
> +
> +static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
> +	.open = max9286_open,
> +};
> +
> +static int max9286_v4l2_register(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct fwnode_handle *ep;
> +	int ret;
> +	int i;
> +
> +	/* Register v4l2 async notifiers for connected Camera subdevices */
> +	ret = max9286_v4l2_notifier_register(priv);
> +	if (ret) {
> +		dev_err(dev, "Unable to register V4L2 async notifiers\n");
> +		return ret;
> +	}
> +
> +	/* Configure V4L2 for the MAX9286 itself */
> +
> +	v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
> +	priv->sd.internal_ops = &max9286_subdev_internal_ops;
> +	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> +
> +	v4l2_ctrl_handler_init(&priv->ctrls, 1);
> +	/*
> +	 * FIXME: Compute the real pixel rate. The 50 MP/s value comes from the
> +	 * hardcoded frequency in the BSP CSI-2 receiver driver.
> +	 */
> +	v4l2_ctrl_new_std(&priv->ctrls, NULL, V4L2_CID_PIXEL_RATE,
> +			  50000000, 50000000, 1, 50000000);

This driver wouldn't get any notification on the upstream pixel rate
changes. Something to think about indeed.

> +	priv->sd.ctrl_handler = &priv->ctrls;
> +	ret = priv->ctrls.error;
> +	if (ret)
> +		goto err_async;
> +
> +	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
> +
> +	priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
> +	for (i = 0; i < MAX9286_SRC_PAD; i++)
> +		priv->pads[i].flags = MEDIA_PAD_FL_SINK;
> +	ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
> +				     priv->pads);
> +	if (ret)
> +		goto err_async;
> +
> +	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,

The graph ports and entity pads match now, but they're not the same thing.

I'd add at least comment along the definition it is used for OF as well.

> +					     0, 0);
> +	if (!ep) {
> +		dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
> +		ret = -ENOENT;
> +		goto err_async;
> +	}
> +	priv->sd.fwnode = ep;
> +
> +	ret = v4l2_async_register_subdev(&priv->sd);
> +	if (ret < 0) {
> +		dev_err(dev, "Unable to register subdevice\n");
> +		goto err_put_node;
> +	}
> +
> +	return 0;
> +
> +err_put_node:
> +	fwnode_handle_put(ep);
> +err_async:
> +	max9286_v4l2_notifier_unregister(priv);
> +
> +	return ret;
> +}
> +
> +static void max9286_v4l2_unregister(struct max9286_priv *priv)
> +{
> +	fwnode_handle_put(priv->sd.fwnode);
> +	v4l2_async_unregister_subdev(&priv->sd);
> +	max9286_v4l2_notifier_unregister(priv);
> +}
> +
> +/* -----------------------------------------------------------------------------
> + * Probe/Remove
> + */
> +
> +static int max9286_setup(struct max9286_priv *priv)
> +{
> +	/*
> +	 * Link ordering values for all enabled links combinations. Orders must
> +	 * be assigned sequentially from 0 to the number of enabled links
> +	 * without leaving any hole for disabled links. We thus assign orders to
> +	 * enabled links first, and use the remaining order values for disabled
> +	 * links are all links must have a different order value;
> +	 */
> +	static const u8 link_order[] = {
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
> +		(3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
> +		(3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
> +		(3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
> +		(3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
> +		(3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
> +		(0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
> +		(1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
> +		(1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
> +		(2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
> +		(1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
> +		(2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
> +		(2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
> +	};
> +
> +	/*
> +	 * Set the I2C bus speed.
> +	 *
> +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> +	 * only. This should be disabled after the mux is initialised.
> +	 */
> +	max9286_configure_i2c(priv, true);
> +
> +	/*
> +	 * Reverse channel setup.
> +	 *
> +	 * - Enable custom reverse channel configuration (through register 0x3f)
> +	 *   and set the first pulse length to 35 clock cycles.
> +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> +	 *   high threshold enabled by the serializer driver.
> +	 */
> +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> +		      MAX9286_REV_AMP_X);
> +	usleep_range(2000, 2500);
> +
> +	/*
> +	 * Enable GMSL links, mask unused ones and autodetect link
> +	 * used as CSI clock source.
> +	 */
> +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> +
> +	/*
> +	 * Video format setup:
> +	 * Disable CSI output, VC is set according to Link number.
> +	 */
> +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> +
> +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> +		      MAX9286_DATATYPE_YUV422_8BIT);
> +
> +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> +		      MAX9286_FSYNCMETH_AUTO);
> +
> +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> +		      MAX9286_HVSRC_D14);
> +
> +	/*
> +	 * Wait for 2ms to allow the link to resynchronize after the
> +	 * configuration change.
> +	 */
> +	usleep_range(2000, 5000);
> +
> +	return 0;
> +}
> +
> +static const struct of_device_id max9286_dt_ids[] = {
> +	{ .compatible = "maxim,max9286" },
> +	{},
> +};
> +MODULE_DEVICE_TABLE(of, max9286_dt_ids);
> +
> +static void max9286_gpio_set(struct gpio_chip *chip,
> +			     unsigned int offset, int value)
> +{
> +	struct max9286_priv *priv = gpiochip_get_data(chip);
> +
> +	if (value)
> +		priv->gpio_state |= BIT(offset);
> +	else
> +		priv->gpio_state &= ~BIT(offset);
> +
> +	max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
> +}
> +
> +static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
> +{
> +	struct max9286_priv *priv = gpiochip_get_data(chip);
> +
> +	return priv->gpio_state & BIT(offset);
> +}
> +
> +static int max9286_gpio(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct gpio_chip *gpio = &priv->gpio;
> +	int ret;
> +
> +	static const char * const names[] = {
> +		"GPIO0OUT",
> +		"GPIO1OUT",
> +	};
> +
> +	/* Configure the GPIO */
> +	gpio->label = dev_name(dev);
> +	gpio->parent = dev;
> +	gpio->owner = THIS_MODULE;
> +	gpio->of_node = dev->of_node;
> +	gpio->ngpio = 2;
> +	gpio->base = -1;
> +	gpio->set = max9286_gpio_set;
> +	gpio->get = max9286_gpio_get;
> +	gpio->can_sleep = true;
> +	gpio->names = names;
> +
> +	/* GPIO values default to high */
> +	priv->gpio_state = BIT(0) | BIT(1);
> +
> +	ret = devm_gpiochip_add_data(dev, gpio, priv);
> +	if (ret)
> +		dev_err(dev, "Unable to create gpio_chip\n");
> +
> +	return ret;
> +}
> +
> +static int max9286_init(struct device *dev)
> +{
> +	struct max9286_priv *priv;
> +	struct i2c_client *client;
> +	int ret;
> +
> +	/* Skip non-max9286 devices. */
> +	if (!dev->of_node || !of_match_node(max9286_dt_ids, dev->of_node))
> +		return 0;
> +
> +	client = to_i2c_client(dev);
> +	priv = i2c_get_clientdata(client);
> +
> +	/* Enable the bus power. */
> +	ret = regulator_enable(priv->regulator);
> +	if (ret < 0) {
> +		dev_err(&client->dev, "Unable to turn PoC on\n");
> +		return ret;
> +	}
> +
> +	priv->poc_enabled = true;
> +
> +	ret = max9286_setup(priv);
> +	if (ret) {
> +		dev_err(dev, "Unable to setup max9286\n");
> +		goto err_regulator;
> +	}
> +
> +	/*
> +	 * Register all V4L2 interactions for the MAX9286 and notifiers for
> +	 * any subdevices connected.
> +	 */
> +	ret = max9286_v4l2_register(priv);
> +	if (ret) {
> +		dev_err(dev, "Failed to register with V4L2\n");
> +		goto err_regulator;
> +	}
> +
> +	ret = max9286_i2c_mux_init(priv);
> +	if (ret) {
> +		dev_err(dev, "Unable to initialize I2C multiplexer\n");
> +		goto err_v4l2_register;
> +	}
> +
> +	/* Leave the mux channels disabled until they are selected. */
> +	max9286_i2c_mux_close(priv);
> +
> +	return 0;
> +
> +err_v4l2_register:
> +	max9286_v4l2_unregister(priv);
> +err_regulator:
> +	regulator_disable(priv->regulator);
> +	priv->poc_enabled = false;
> +
> +	return ret;
> +}
> +
> +static void max9286_cleanup_dt(struct max9286_priv *priv)
> +{
> +	struct max9286_source *source;
> +
> +	for_each_source(priv, source) {
> +		fwnode_handle_put(source->fwnode);
> +		source->fwnode = NULL;
> +	}
> +}
> +
> +static int max9286_parse_dt(struct max9286_priv *priv)
> +{
> +	struct device *dev = &priv->client->dev;
> +	struct device_node *i2c_mux;
> +	struct device_node *node = NULL;
> +	unsigned int i2c_mux_mask = 0;
> +
> +	of_node_get(dev->of_node);
> +	i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
> +	if (!i2c_mux) {
> +		dev_err(dev, "Failed to find i2c-mux node\n");
> +		return -EINVAL;
> +	}
> +
> +	/* Identify which i2c-mux channels are enabled */
> +	for_each_child_of_node(i2c_mux, node) {
> +		u32 id = 0;
> +
> +		of_property_read_u32(node, "reg", &id);
> +		if (id >= MAX9286_NUM_GMSL)
> +			continue;
> +
> +		if (!of_device_is_available(node)) {
> +			dev_dbg(dev, "Skipping disabled I2C bus port %u\n",
> +				id);

Fits on the same line.

> +			continue;
> +		}
> +
> +		i2c_mux_mask |= BIT(id);
> +	}
> +	of_node_put(node);
> +	of_node_put(i2c_mux);
> +
> +	/* Parse the endpoints */
> +	for_each_endpoint_of_node(dev->of_node, node) {
> +		struct max9286_source *source;
> +		struct of_endpoint ep;
> +
> +		of_graph_parse_endpoint(node, &ep);
> +		dev_dbg(dev, "Endpoint %pOF on port %d",
> +			ep.local_node, ep.port);
> +
> +		if (ep.port > MAX9286_NUM_GMSL) {
> +			dev_err(dev, "Invalid endpoint %s on port %d",
> +				of_node_full_name(ep.local_node), ep.port);
> +			continue;
> +		}
> +
> +		/* For the source endpoint just parse the bus configuration. */
> +		if (ep.port == MAX9286_SRC_PAD) {
> +			struct v4l2_fwnode_endpoint vep = {
> +				.bus_type = V4L2_MBUS_CSI2_DPHY
> +			};
> +			int ret;
> +
> +			ret = v4l2_fwnode_endpoint_parse(
> +					of_fwnode_handle(node), &vep);
> +			if (ret) {
> +				of_node_put(node);
> +				return ret;
> +			}
> +
> +			if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
> +				dev_err(dev,
> +					"Media bus %u type not supported\n",
> +					vep.bus_type);
> +				v4l2_fwnode_endpoint_free(&vep);
> +				of_node_put(node);
> +				return -EINVAL;
> +			}
> +
> +			priv->csi2_data_lanes =
> +				vep.bus.mipi_csi2.num_data_lanes;
> +			v4l2_fwnode_endpoint_free(&vep);
> +
> +			continue;
> +		}
> +
> +		/* Skip if the corresponding GMSL link is unavailable. */
> +		if (!(i2c_mux_mask & BIT(ep.port)))
> +			continue;
> +
> +		if (priv->sources[ep.port].fwnode) {
> +			dev_err(dev,
> +				"Multiple port endpoints are not supported: %d",
> +				ep.port);
> +
> +			continue;
> +		}
> +
> +		source = &priv->sources[ep.port];
> +		source->fwnode = fwnode_graph_get_remote_endpoint(
> +						of_fwnode_handle(node));
> +		if (!source->fwnode) {
> +			dev_err(dev,
> +				"Endpoint %pOF has no remote endpoint connection\n",
> +				ep.local_node);
> +
> +			continue;
> +		}
> +
> +		priv->source_mask |= BIT(ep.port);
> +		priv->nsources++;
> +	}
> +	of_node_put(node);
> +
> +	priv->route_mask = priv->source_mask;
> +
> +	return 0;
> +}
> +
> +static int max9286_probe(struct i2c_client *client)
> +{
> +	struct max9286_priv *priv;
> +	unsigned int i;
> +	int ret;
> +
> +	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
> +	if (!priv)
> +		return -ENOMEM;

You won't lose anything by using the devm_ variant here.

> +
> +	priv->client = client;
> +	i2c_set_clientdata(client, priv);
> +
> +	for (i = 0; i < MAX9286_N_SINKS; i++)
> +		max9286_init_format(&priv->fmt[i]);
> +
> +	ret = max9286_parse_dt(priv);
> +	if (ret)
> +		return ret;

But you can avoid accidental memory leaks for nothing. :-)

> +
> +	priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
> +						   GPIOD_OUT_HIGH);
> +	if (IS_ERR(priv->gpiod_pwdn))
> +		return PTR_ERR(priv->gpiod_pwdn);
> +
> +	gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
> +	gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
> +
> +	/* Wait at least 4ms before the I2C lines latch to the address */
> +	if (priv->gpiod_pwdn)
> +		usleep_range(4000, 5000);
> +
> +	ret = max9286_gpio(priv);
> +	if (ret)
> +		return ret;
> +
> +	priv->regulator = regulator_get(&client->dev, "poc");

Why not devm_regulator_get()?

> +	if (IS_ERR(priv->regulator)) {
> +		if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
> +			dev_err(&client->dev,
> +				"Unable to get PoC regulator (%ld)\n",
> +				PTR_ERR(priv->regulator));
> +		ret = PTR_ERR(priv->regulator);
> +		priv->regulator = NULL;
> +		goto err_free;
> +	}
> +
> +	/*
> +	 * We can have multiple MAX9286 instances on the same physical I2C
> +	 * bus, and I2C children behind ports of separate MAX9286 instances
> +	 * having the same I2C address. As the MAX9286 starts by default with
> +	 * all ports enabled, we need to disable all ports on all MAX9286
> +	 * instances before proceeding to further initialize the devices and
> +	 * instantiate children.
> +	 *
> +	 * Start by just disabling all channels on the current device. Then,
> +	 * if all other MAX9286 on the parent bus have been probed, proceed
> +	 * to initialize them all, including the current one.
> +	 */
> +	max9286_i2c_mux_close(priv);
> +
> +	/*
> +	 * The MAX9286 initialises with auto-acknowledge enabled by default.
> +	 * This means that if multiple MAX9286 devices are connected to an I2C
> +	 * bus, another MAX9286 could ack I2C transfers meant for a device on
> +	 * the other side of the GMSL links for this MAX9286 (such as a
> +	 * MAX9271). To prevent that disable auto-acknowledge early on; it
> +	 * will be enabled later as needed.
> +	 */
> +	max9286_configure_i2c(priv, false);
> +
> +	ret = max9286_init(&client->dev);
> +	if (ret < 0)
> +		goto err_regulator;
> +
> +	return 0;
> +
> +err_regulator:
> +	regulator_put(priv->regulator);
> +	max9286_i2c_mux_close(priv);
> +	max9286_configure_i2c(priv, false);
> +err_free:
> +	max9286_cleanup_dt(priv);
> +	kfree(priv);
> +
> +	return ret;
> +}
> +
> +static int max9286_remove(struct i2c_client *client)
> +{
> +	struct max9286_priv *priv = i2c_get_clientdata(client);
> +
> +	i2c_mux_del_adapters(priv->mux);
> +
> +	max9286_v4l2_unregister(priv);
> +
> +	if (priv->poc_enabled)
> +		regulator_disable(priv->regulator);

Hmm. Isn't poc_enabled always true (and the regulator enabled) here? If
so, you could disable the regulator unconditionally.

> +	regulator_put(priv->regulator);
> +
> +	max9286_cleanup_dt(priv);
> +
> +	gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
> +
> +	kfree(priv);
> +
> +	return 0;
> +}
> +
> +static const struct i2c_device_id max9286_id[] = {
> +	{ "max9286", 0 },
> +	{ }
> +};
> +MODULE_DEVICE_TABLE(i2c, max9286_id);

Do you need this table?

> +
> +static struct i2c_driver max9286_i2c_driver = {
> +	.driver	= {
> +		.name		= "max9286",
> +		.of_match_table	= of_match_ptr(max9286_dt_ids),
> +	},
> +	.probe_new	= max9286_probe,
> +	.remove		= max9286_remove,
> +	.id_table	= max9286_id,
> +};
> +
> +module_i2c_driver(max9286_i2c_driver);
> +
> +MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
> +MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
> +MODULE_LICENSE("GPL");
Kieran Bingham Feb. 27, 2020, 5:03 p.m. UTC | #3
Hi Sakari,

Thank you for taking the time to review this, it certainly helps get
this code progressing once again.

On 21/02/2020 07:59, Sakari Ailus wrote:
> Hi Kieran,
> 
> Thank you for the update. I have some comments below.
> 
> On Fri, Feb 14, 2020 at 10:31:36AM +0000, Kieran Bingham wrote:
>> The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
>> CSI-2 output. The device supports multicamera streaming applications,
>> and features the ability to synchronise the attached cameras.
>>
>> CSI-2 output can be configured with 1 to 4 lanes, and a control channel
>> is supported over I2C, which implements an I2C mux to facilitate
>> communications with connected cameras across the reverse control
>> channel.
> 
> Do you happen to have an example of a sensor driver that would work with
> this driver?

We are currently using the RDACM20, and we are in progress for sharing
this code across with the RDACM21 (which is why they haven't been posted
yet).

Both the RDACM20/21 use a max9271 serialiser, but different sensor
configurations, so Jacopo is working to create a means to allow the
max9271 serialiser to be common.

I believe that will be posted sometime soon from Jacopo when he's got
RDACM21 working happily.

I'm also aware of an AR0231 based camera which Linaro have been working
on based on some of the framework of this driver, so I would expect that
to later be supported also.


I'll work through your comments below, and aim towards a v8 (I've got a
few other changes to come in too)

I'll see if I can synchronise with Jacopo to post a sensor driver with
the next version.

>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>>
>> --
>> v2:
>>  - Fix MAINTAINERS entry
>>
>> This posting is released with the following modifications to work
>> without Sakari's VC developments:
>>  - max9286_g_mbus_config() re-instated
>>  - max9286_get_frame_desc() is not bus/csi aware
>>  - max9286_{get,set}_routing() removed
>>
>> v3:
>>  - Initialise notifier with v4l2_async_notifier_init
>>  - Update for new mbus csi2 format V4L2_MBUS_CSI2_DPHY
>>
>> v4: - Re-introduce required code to function with the VC series.
>>
>>  - Implement max9286_get_routing, max9286_set_routing
>>  - Remove max9286_g_mbus_config
> 
> I understand there is no dependency to the VC patchset.
> 
> How does the receiver figure out what it should receive? Do you assume a
> particular receiver driver, for example?
> 
>>
>> v5: (internal release)
>>  - Fix printk formatting for hex value
>>  - max9286->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE (add |)
>>  - MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER -> MEDIA_ENT_F_VID_IF_BRIDGE
>>  - Remove 'device is bound' workaround
>>
>> v6:
>>  - v4l2_subdev_krouting instead of v4l2_subdev_routing separated
>>    to allow integration without the VC/V4L2-Mux series.
>>  - convert sd_to_max9286 to inline function
>>  - rename max9286_device to max9286_priv
>>  - Cleanup the v4l2_async_notifier
>>  - Extend MODULE_AUTHOR
>>  - Replace of_graph_get_endpoint_by_regs with fwnode_graph_get_endpoint_by_id
>>  - Pass default bus type when parsing fwnode endpoint (Manivannan Sadhasivam)
>>  - Use new YAML file reference in MAINTAINERS
>>  - Parse new i2c-mux node in max9286_get_i2c_by_id
>>    (This could/should be refactored to parse these separately first)
>>  - Spelling and calculation fixes in the FSYNC_LOCKED check comments
>>  - Identify each enabled i2c-mux channel in a single pass
>>  - max9286: Improve mux-state readbility [v2]
>>  - Fix frame sync lock durations
>>  - Add comment to describe /why/ we must open the mux in s_stream
>>  - use -EXDEV as return code for failed link synchronisation.
>>  - Fix reference counting of the dt nodeS
>>  - Convert to probe_new for I2C
>>  - Remove redundant max9286_i2c_mux_state
>>  - Provide optional enable-gpio (max9286-pwdn)
>>
>> v7:
>>  [Kieran]
>>  - Ensure powerdown lines are optional
>>  - Add a 4ms power-up delay
>>  - Add max9286_check_config_link() to core
>>  - Add GPIO chip controller for GPIO0OUT and GPIO1OUT
>>  - Fix GPIO registration
>>  - max9286: Split out async registration
>>    (fixes regulator -EPROBE_DEFERs failures)
>>  - Collect all V4L2 registrations
>>  - balance v4l2_async refcnting
>>  - Rename max9286_v4l2_async_ => max9286_v4l2_notifier_
>>
>>  [Jacopo]
>>  - Remove redundanct MAXIM_I2C_SPEED macros
>>  - Move notifiers operations
>>  - Add delay after reverse channel reconfiguration
>>  - Move link setup to completion
>>  - Fix up max9286_check_config_link() implementation
>>  - Remove redundant dual configuration of reverse channel
>>
>>  MAINTAINERS                 |   10 +
>>  drivers/media/i2c/Kconfig   |   11 +
>>  drivers/media/i2c/Makefile  |    1 +
>>  drivers/media/i2c/max9286.c | 1278 +++++++++++++++++++++++++++++++++++
>>  4 files changed, 1300 insertions(+)
>>  create mode 100644 drivers/media/i2c/max9286.c
>>
>> diff --git a/MAINTAINERS b/MAINTAINERS
>> index 983d3c97edd1..148706353d25 100644
>> --- a/MAINTAINERS
>> +++ b/MAINTAINERS
>> @@ -10033,6 +10033,16 @@ F:	Documentation/devicetree/bindings/hwmon/max6697.txt
>>  F:	drivers/hwmon/max6697.c
>>  F:	include/linux/platform_data/max6697.h
>>  
>> +MAX9286 QUAD GMSL DESERIALIZER DRIVER
>> +M:	Jacopo Mondi <jacopo+renesas@jmondi.org>
>> +M:	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>> +M:	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>> +M:	Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>> +L:	linux-media@vger.kernel.org
>> +S:	Maintained
>> +F:	Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml
>> +F:	drivers/media/i2c/max9286.c
>> +
>>  MAX9860 MONO AUDIO VOICE CODEC DRIVER
>>  M:	Peter Rosin <peda@axentia.se>
>>  L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
>> diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
>> index c68e002d26ea..32a4deb90617 100644
>> --- a/drivers/media/i2c/Kconfig
>> +++ b/drivers/media/i2c/Kconfig
>> @@ -442,6 +442,17 @@ config VIDEO_VPX3220
>>  	  To compile this driver as a module, choose M here: the
>>  	  module will be called vpx3220.
>>  
>> +config VIDEO_MAX9286
>> +	tristate "Maxim MAX9286 GMSL deserializer support"
>> +	depends on I2C && I2C_MUX
>> +	depends on VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER
>> +	select V4L2_FWNODE
>> +	help
>> +	  This driver supports the Maxim MAX9286 GMSL deserializer.
>> +
>> +	  To compile this driver as a module, choose M here: the
>> +	  module will be called max9286.
>> +
>>  comment "Video and audio decoders"
>>  
>>  config VIDEO_SAA717X
>> diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
>> index c147bb9d28db..8896cf8bfc4f 100644
>> --- a/drivers/media/i2c/Makefile
>> +++ b/drivers/media/i2c/Makefile
>> @@ -117,5 +117,6 @@ obj-$(CONFIG_VIDEO_IMX290)	+= imx290.o
>>  obj-$(CONFIG_VIDEO_IMX319)	+= imx319.o
>>  obj-$(CONFIG_VIDEO_IMX355)	+= imx355.o
>>  obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o
>> +obj-$(CONFIG_VIDEO_MAX9286)	+= max9286.o
>>  
>>  obj-$(CONFIG_SDR_MAX2175) += max2175.o
>> diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c
>> new file mode 100644
>> index 000000000000..a20829297ef6
>> --- /dev/null
>> +++ b/drivers/media/i2c/max9286.c
>> @@ -0,0 +1,1278 @@
>> +// SPDX-License-Identifier: GPL-2.0+
>> +/*
>> + * Maxim MAX9286 GMSL Deserializer Driver
>> + *
>> + * Copyright (C) 2017-2019 Jacopo Mondi
>> + * Copyright (C) 2017-2019 Kieran Bingham
>> + * Copyright (C) 2017-2019 Laurent Pinchart
>> + * Copyright (C) 2017-2019 Niklas Söderlund
>> + * Copyright (C) 2016 Renesas Electronics Corporation
>> + * Copyright (C) 2015 Cogent Embedded, Inc.
>> + */
>> +
>> +#include <linux/delay.h>
>> +#include <linux/device.h>
>> +#include <linux/fwnode.h>
>> +#include <linux/gpio/consumer.h>
>> +#include <linux/gpio/driver.h>
>> +#include <linux/i2c.h>
>> +#include <linux/i2c-mux.h>
>> +#include <linux/module.h>
>> +#include <linux/of_graph.h>
>> +#include <linux/regulator/consumer.h>
>> +#include <linux/slab.h>
>> +
>> +#include <media/v4l2-async.h>
>> +#include <media/v4l2-ctrls.h>
>> +#include <media/v4l2-device.h>
>> +#include <media/v4l2-fwnode.h>
>> +#include <media/v4l2-subdev.h>
>> +
>> +/* Register 0x00 */
>> +#define MAX9286_MSTLINKSEL_AUTO		(7 << 5)
>> +#define MAX9286_MSTLINKSEL(n)		((n) << 5)
>> +#define MAX9286_EN_VS_GEN		BIT(4)
>> +#define MAX9286_LINKEN(n)		(1 << (n))
>> +/* Register 0x01 */
>> +#define MAX9286_FSYNCMODE_ECU		(3 << 6)
>> +#define MAX9286_FSYNCMODE_EXT		(2 << 6)
>> +#define MAX9286_FSYNCMODE_INT_OUT	(1 << 6)
>> +#define MAX9286_FSYNCMODE_INT_HIZ	(0 << 6)
>> +#define MAX9286_GPIEN			BIT(5)
>> +#define MAX9286_ENLMO_RSTFSYNC		BIT(2)
>> +#define MAX9286_FSYNCMETH_AUTO		(2 << 0)
>> +#define MAX9286_FSYNCMETH_SEMI_AUTO	(1 << 0)
>> +#define MAX9286_FSYNCMETH_MANUAL	(0 << 0)
>> +#define MAX9286_REG_FSYNC_PERIOD_L	0x06
>> +#define MAX9286_REG_FSYNC_PERIOD_M	0x07
>> +#define MAX9286_REG_FSYNC_PERIOD_H	0x08
>> +/* Register 0x0a */
>> +#define MAX9286_FWDCCEN(n)		(1 << ((n) + 4))
>> +#define MAX9286_REVCCEN(n)		(1 << (n))
>> +/* Register 0x0c */
>> +#define MAX9286_HVEN			BIT(7)
>> +#define MAX9286_EDC_6BIT_HAMMING	(2 << 5)
>> +#define MAX9286_EDC_6BIT_CRC		(1 << 5)
>> +#define MAX9286_EDC_1BIT_PARITY		(0 << 5)
>> +#define MAX9286_DESEL			BIT(4)
>> +#define MAX9286_INVVS			BIT(3)
>> +#define MAX9286_INVHS			BIT(2)
>> +#define MAX9286_HVSRC_D0		(2 << 0)
>> +#define MAX9286_HVSRC_D14		(1 << 0)
>> +#define MAX9286_HVSRC_D18		(0 << 0)
>> +/* Register 0x0f */
>> +#define MAX9286_0X0F_RESERVED		BIT(3)
>> +/* Register 0x12 */
>> +#define MAX9286_CSILANECNT(n)		(((n) - 1) << 6)
>> +#define MAX9286_CSIDBL			BIT(5)
>> +#define MAX9286_DBL			BIT(4)
>> +#define MAX9286_DATATYPE_USER_8BIT	(11 << 0)
>> +#define MAX9286_DATATYPE_USER_YUV_12BIT	(10 << 0)
>> +#define MAX9286_DATATYPE_USER_24BIT	(9 << 0)
>> +#define MAX9286_DATATYPE_RAW14		(8 << 0)
>> +#define MAX9286_DATATYPE_RAW11		(7 << 0)
>> +#define MAX9286_DATATYPE_RAW10		(6 << 0)
>> +#define MAX9286_DATATYPE_RAW8		(5 << 0)
>> +#define MAX9286_DATATYPE_YUV422_10BIT	(4 << 0)
>> +#define MAX9286_DATATYPE_YUV422_8BIT	(3 << 0)
>> +#define MAX9286_DATATYPE_RGB555		(2 << 0)
>> +#define MAX9286_DATATYPE_RGB565		(1 << 0)
>> +#define MAX9286_DATATYPE_RGB888		(0 << 0)
>> +/* Register 0x15 */
>> +#define MAX9286_VC(n)			((n) << 5)
>> +#define MAX9286_VCTYPE			BIT(4)
>> +#define MAX9286_CSIOUTEN		BIT(3)
>> +#define MAX9286_0X15_RESV		(3 << 0)
>> +/* Register 0x1b */
>> +#define MAX9286_SWITCHIN(n)		(1 << ((n) + 4))
>> +#define MAX9286_ENEQ(n)			(1 << (n))
>> +/* Register 0x27 */
>> +#define MAX9286_LOCKED			BIT(7)
>> +/* Register 0x31 */
>> +#define MAX9286_FSYNC_LOCKED		BIT(6)
>> +/* Register 0x34 */
>> +#define MAX9286_I2CLOCACK		BIT(7)
>> +#define MAX9286_I2CSLVSH_1046NS_469NS	(3 << 5)
>> +#define MAX9286_I2CSLVSH_938NS_352NS	(2 << 5)
>> +#define MAX9286_I2CSLVSH_469NS_234NS	(1 << 5)
>> +#define MAX9286_I2CSLVSH_352NS_117NS	(0 << 5)
>> +#define MAX9286_I2CMSTBT_837KBPS	(7 << 2)
>> +#define MAX9286_I2CMSTBT_533KBPS	(6 << 2)
>> +#define MAX9286_I2CMSTBT_339KBPS	(5 << 2)
>> +#define MAX9286_I2CMSTBT_173KBPS	(4 << 2)
>> +#define MAX9286_I2CMSTBT_105KBPS	(3 << 2)
>> +#define MAX9286_I2CMSTBT_84KBPS		(2 << 2)
>> +#define MAX9286_I2CMSTBT_28KBPS		(1 << 2)
>> +#define MAX9286_I2CMSTBT_8KBPS		(0 << 2)
>> +#define MAX9286_I2CSLVTO_NONE		(3 << 0)
>> +#define MAX9286_I2CSLVTO_1024US		(2 << 0)
>> +#define MAX9286_I2CSLVTO_256US		(1 << 0)
>> +#define MAX9286_I2CSLVTO_64US		(0 << 0)
>> +/* Register 0x3b */
>> +#define MAX9286_REV_TRF(n)		((n) << 4)
>> +#define MAX9286_REV_AMP(n)		((((n) - 30) / 10) << 1) /* in mV */
>> +#define MAX9286_REV_AMP_X		BIT(0)
>> +/* Register 0x3f */
>> +#define MAX9286_EN_REV_CFG		BIT(6)
>> +#define MAX9286_REV_FLEN(n)		((n) - 20)
>> +/* Register 0x49 */
>> +#define MAX9286_VIDEO_DETECT_MASK	0x0f
>> +/* Register 0x69 */
>> +#define MAX9286_LFLTBMONMASKED		BIT(7)
>> +#define MAX9286_LOCKMONMASKED		BIT(6)
>> +#define MAX9286_AUTOCOMBACKEN		BIT(5)
>> +#define MAX9286_AUTOMASKEN		BIT(4)
>> +#define MAX9286_MASKLINK(n)		((n) << 0)
>> +
>> +#define MAX9286_NUM_GMSL		4
>> +#define MAX9286_N_SINKS			4
>> +#define MAX9286_N_PADS			5
>> +#define MAX9286_SRC_PAD			4
>> +
>> +struct max9286_source {
>> +	struct v4l2_async_subdev asd;
>> +	struct v4l2_subdev *sd;
>> +	struct fwnode_handle *fwnode;
>> +};
>> +
>> +#define asd_to_max9286_source(_asd) \
>> +	container_of(_asd, struct max9286_source, asd)
>> +
>> +struct max9286_priv {
>> +	struct i2c_client *client;
>> +	struct gpio_desc *gpiod_pwdn;
>> +	struct v4l2_subdev sd;
>> +	struct media_pad pads[MAX9286_N_PADS];
>> +	struct regulator *regulator;
>> +	bool poc_enabled;
>> +
>> +	struct gpio_chip gpio;
>> +	u8 gpio_state;
>> +
>> +	struct i2c_mux_core *mux;
>> +	unsigned int mux_channel;
>> +	bool mux_open;
>> +
>> +	struct v4l2_ctrl_handler ctrls;
>> +
>> +	struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
>> +
>> +	unsigned int nsources;
>> +	unsigned int source_mask;
>> +	unsigned int route_mask;
>> +	unsigned int bound_sources;
>> +	unsigned int csi2_data_lanes;
>> +	struct max9286_source sources[MAX9286_NUM_GMSL];
>> +	struct v4l2_async_notifier notifier;
>> +};
>> +
>> +static struct max9286_source *next_source(struct max9286_priv *priv,
>> +					  struct max9286_source *source)
>> +{
>> +	if (!source)
>> +		source = &priv->sources[0];
>> +	else
>> +		source++;
>> +
>> +	for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
>> +		if (source->fwnode)
>> +			return source;
>> +	}
>> +
>> +	return NULL;
>> +}
>> +
>> +#define for_each_source(priv, source) \
>> +	for ((source) = NULL; ((source) = next_source((priv), (source))); )
>> +
>> +#define to_index(priv, source) ((source) - &(priv)->sources[0])
>> +
>> +static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
>> +{
>> +	return container_of(sd, struct max9286_priv, sd);
>> +}
>> +
>> +/* -----------------------------------------------------------------------------
>> + * I2C IO
>> + */
>> +
>> +static int max9286_read(struct max9286_priv *priv, u8 reg)
>> +{
>> +	int ret;
>> +
>> +	ret = i2c_smbus_read_byte_data(priv->client, reg);
>> +	if (ret < 0)
>> +		dev_err(&priv->client->dev,
>> +			"%s: register 0x%02x read failed (%d)\n",
>> +			__func__, reg, ret);
>> +
>> +	return ret;
>> +}
>> +
>> +static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
>> +{
>> +	int ret;
>> +
>> +	ret = i2c_smbus_write_byte_data(priv->client, reg, val);
>> +	if (ret < 0)
>> +		dev_err(&priv->client->dev,
>> +			"%s: register 0x%02x write failed (%d)\n",
>> +			__func__, reg, ret);
>> +
>> +	return ret;
>> +}
>> +
>> +/* -----------------------------------------------------------------------------
>> + * I2C Multiplexer
>> + */
>> +
>> +static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
>> +{
>> +	max9286_write(priv, 0x0a, conf);
>> +
>> +	/*
>> +	 * We must sleep after any change to the forward or reverse channel
>> +	 * configuration.
>> +	 */
>> +	usleep_range(3000, 5000);
>> +}
>> +
>> +static void max9286_i2c_mux_open(struct max9286_priv *priv)
>> +{
>> +	/* Open all channels on the MAX9286 */
>> +	max9286_i2c_mux_configure(priv, 0xff);
>> +
>> +	priv->mux_open = true;
>> +}
>> +
>> +static void max9286_i2c_mux_close(struct max9286_priv *priv)
>> +{
>> +	/*
>> +	 * Ensure that both the forward and reverse channel are disabled on the
>> +	 * mux, and that the channel ID is invalidated to ensure we reconfigure
>> +	 * on the next max9286_i2c_mux_select() call.
>> +	 */
>> +	max9286_i2c_mux_configure(priv, 0x00);
>> +
>> +	priv->mux_open = false;
>> +	priv->mux_channel = -1;
>> +}
>> +
>> +static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
>> +{
>> +	struct max9286_priv *priv = i2c_mux_priv(muxc);
>> +
>> +	/* Channel select is disabled when configured in the opened state. */
>> +	if (priv->mux_open)
>> +		return 0;
>> +
>> +	if (priv->mux_channel == chan)
>> +		return 0;
>> +
>> +	priv->mux_channel = chan;
>> +
>> +	max9286_i2c_mux_configure(priv,
>> +				  MAX9286_FWDCCEN(chan) |
>> +				  MAX9286_REVCCEN(chan));
>> +
>> +	return 0;
>> +}
>> +
>> +static int max9286_i2c_mux_init(struct max9286_priv *priv)
>> +{
>> +	struct max9286_source *source;
>> +	int ret;
>> +
>> +	if (!i2c_check_functionality(priv->client->adapter,
>> +				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
>> +		return -ENODEV;
>> +
>> +	priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
>> +				  priv->nsources, 0, I2C_MUX_LOCKED,
>> +				  max9286_i2c_mux_select, NULL);
>> +	if (!priv->mux)
>> +		return -ENOMEM;
>> +
>> +	priv->mux->priv = priv;
>> +
>> +	for_each_source(priv, source) {
>> +		unsigned int index = to_index(priv, source);
>> +
>> +		ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
>> +		if (ret < 0)
>> +			goto error;
>> +	}
>> +
>> +	return 0;
>> +
>> +error:
>> +	i2c_mux_del_adapters(priv->mux);
>> +	return ret;
>> +}
>> +
>> +static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
>> +{
>> +	u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
>> +		    MAX9286_I2CMSTBT_105KBPS;
>> +
>> +	if (localack)
>> +		config |= MAX9286_I2CLOCACK;
>> +
>> +	max9286_write(priv, 0x34, config);
>> +	usleep_range(3000, 5000);
>> +}
>> +
>> +/*
>> + * max9286_check_video_links() - Make sure video links are detected and locked
>> + *
>> + * Performs safety checks on video link status. Make sure they are detected
>> + * and all enabled links are locked.
>> + *
>> + * Returns 0 for success, -EIO for errors.
>> + */
>> +static int max9286_check_video_links(struct max9286_priv *priv)
>> +{
>> +	unsigned int i;
>> +	int ret;
>> +
>> +	/*
>> +	 * Make sure valid video links are detected.
>> +	 * The delay is not characterized in de-serializer manual, wait up
>> +	 * to 5 ms.
>> +	 */
>> +	for (i = 0; i < 10; i++) {
>> +		ret = max9286_read(priv, 0x49);
>> +		if (ret < 0)
>> +			return -EIO;
>> +
>> +		if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
>> +			break;
>> +
>> +		usleep_range(350, 500);
>> +	}
>> +
>> +	if (i == 10) {
>> +		dev_err(&priv->client->dev,
>> +			"Unable to detect video links: 0x%02x\n", ret);
>> +		return -EIO;
>> +	}
>> +
>> +	/* Make sure all enabled links are locked (4ms max). */
>> +	for (i = 0; i < 10; i++) {
>> +		ret = max9286_read(priv, 0x27);
>> +		if (ret < 0)
>> +			return -EIO;
>> +
>> +		if (ret & MAX9286_LOCKED)
>> +			break;
>> +
>> +		usleep_range(350, 450);
>> +	}
>> +
>> +	if (i == 10) {
>> +		dev_err(&priv->client->dev, "Not all enabled links locked\n");
>> +		return -EIO;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +/*
>> + * max9286_check_config_link() - Detect and wait for configuration links
>> + *
>> + * Determine if the configuration channel is up and settled for a link.
>> + *
>> + * Returns 0 for success, -EIO for errors.
>> + */
>> +static int max9286_check_config_link(struct max9286_priv *priv,
>> +				     unsigned int source_mask)
>> +{
>> +	unsigned int conflink_mask = (source_mask & 0x0f) << 4;
>> +	unsigned int i;
>> +	int ret;
>> +
>> +	/*
>> +	 * Make sure requested configuration links are detected.
>> +	 * The delay is not characterized in the chip manual: wait up
>> +	 * to 5 milliseconds.
>> +	 */
>> +	for (i = 0; i < 10; i++) {
>> +		ret = max9286_read(priv, 0x49) & 0xf0;
>> +		if (ret < 0)
>> +			return -EIO;
>> +
>> +		if (ret == conflink_mask)
>> +			break;
>> +
>> +		usleep_range(350, 500);
>> +	}
>> +
>> +	if (ret != conflink_mask) {
>> +		dev_err(&priv->client->dev,
>> +			"Unable to detect configuration links: 0x%02x expected 0x%02x\n",
>> +			ret, conflink_mask);
>> +		return -EIO;
>> +	}
>> +
>> +	dev_info(&priv->client->dev,
>> +		 "Successfully detected configuration links after %u loops: 0x%02x\n",
>> +		 i, conflink_mask);
>> +
>> +	return 0;
>> +}
>> +
>> +/* -----------------------------------------------------------------------------
>> + * V4L2 Subdev
>> + */
>> +
>> +static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
>> +				struct v4l2_subdev *subdev,
>> +				struct v4l2_async_subdev *asd)
>> +{
>> +	struct max9286_priv *priv = sd_to_max9286(notifier->sd);
>> +	struct max9286_source *source = asd_to_max9286_source(asd);
>> +	unsigned int index = to_index(priv, source);
>> +	unsigned int src_pad;
>> +	int ret;
>> +
>> +	ret = media_entity_get_fwnode_pad(&subdev->entity,
>> +					  source->fwnode,
>> +					  MEDIA_PAD_FL_SOURCE);
>> +	if (ret < 0) {
>> +		dev_err(&priv->client->dev,
>> +			"Failed to find pad for %s\n", subdev->name);
>> +		return ret;
>> +	}
>> +
>> +	priv->bound_sources |= BIT(index);
>> +	source->sd = subdev;
>> +	src_pad = ret;
>> +
>> +	ret = media_create_pad_link(&source->sd->entity, src_pad,
>> +				    &priv->sd.entity, index,
>> +				    MEDIA_LNK_FL_ENABLED |
>> +				    MEDIA_LNK_FL_IMMUTABLE);
>> +	if (ret) {
>> +		dev_err(&priv->client->dev,
>> +			"Unable to link %s:%u -> %s:%u\n",
>> +			source->sd->name, src_pad, priv->sd.name, index);
>> +		return ret;
>> +	}
>> +
>> +	dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
>> +		subdev->name, src_pad, index);
>> +
>> +	/*
>> +	 * We can only register v4l2_async_notifiers which do not provide a
>> +	 * means to register a complete callback. bound_sources allows us to
>> +	 * identify when all remove serializers have completed their probe.
>> +	 */
>> +	if (priv->bound_sources != priv->source_mask)
>> +		return 0;
>> +
>> +	/*
>> +	 * All enabled sources have probed and enabled their reverse control
>> +	 * channels:
>> +	 *
>> +	 * - Verify all configuration links are properly detected
>> +	 * - Disable auto-ack as communication on the control channel are now
>> +	 *   stable.
>> +	 */
>> +	max9286_check_config_link(priv, priv->source_mask);
>> +
>> +	/*
>> +	 * Re-configure I2C with local acknowledge disabled after cameras have
>> +	 * probed.
>> +	 */
>> +	max9286_configure_i2c(priv, false);
>> +
>> +	return 0;
>> +}
>> +
>> +static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
>> +				  struct v4l2_subdev *subdev,
>> +				  struct v4l2_async_subdev *asd)
>> +{
>> +	struct max9286_source *source = asd_to_max9286_source(asd);
>> +
>> +	source->sd = NULL;
>> +}
>> +
>> +static const struct v4l2_async_notifier_operations max9286_notify_ops = {
>> +	.bound = max9286_notify_bound,
>> +	.unbind = max9286_notify_unbind,
>> +};
>> +
>> +static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
>> +{
>> +	struct device *dev = &priv->client->dev;
>> +	struct max9286_source *source = NULL;
>> +	int ret;
>> +
>> +	if (!priv->nsources)
>> +		return 0;
>> +
>> +	v4l2_async_notifier_init(&priv->notifier);
>> +
>> +	for_each_source(priv, source) {
>> +		unsigned int i = to_index(priv, source);
>> +
>> +		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
>> +		source->asd.match.fwnode = source->fwnode;
>> +
>> +		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
>> +						     &source->asd);
>> +		if (ret) {
>> +			dev_err(dev, "Failed to add subdev for source %d", i);
>> +			v4l2_async_notifier_cleanup(&priv->notifier);
>> +			return ret;
>> +		}
>> +
>> +		/*
>> +		 * Balance the reference counting handled through
>> +		 * v4l2_async_notifier_cleanup()
>> +		 */
>> +		fwnode_handle_get(source->fwnode);
>> +	}
>> +
>> +	priv->notifier.ops = &max9286_notify_ops;
>> +
>> +	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
>> +	if (ret) {
>> +		dev_err(dev, "Failed to register subdev_notifier");
>> +		v4l2_async_notifier_cleanup(&priv->notifier);
>> +		return ret;
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
>> +{
>> +	if (!priv->nsources)
>> +		return;
>> +
>> +	v4l2_async_notifier_unregister(&priv->notifier);
>> +	v4l2_async_notifier_cleanup(&priv->notifier);
>> +}
>> +
>> +static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
>> +{
>> +	struct max9286_priv *priv = sd_to_max9286(sd);
>> +	struct max9286_source *source;
>> +	unsigned int i;
>> +	bool sync = false;
>> +	int ret;
>> +
>> +	if (enable) {
>> +		/*
>> +		 * The frame sync between cameras is transmitted across the
>> +		 * reverse channel as GPIO. We must open all channels while
>> +		 * streaming to allow this synchronisation signal to be shared.
>> +		 */
>> +		max9286_i2c_mux_open(priv);
> 
> What does this do here, actually? What happens if the user attempts to
> access the sensor before this call?

Before this point the i2c-mux works in a per-channel mode. So only the
channel being used to communicate is open, and any write to another
camera/channel will close and reopen.

See:
 - max9286_i2c_mux_select() /* Open a single channel */
 - max9286_i2c_mux_open() /* Open all channels */
 - max9286_i2c_mux_close() /* Close all channels */

This prevents cross-communication between cameras and ensures that the
i2c-traffic across the i2c-muxes is controlled.

When we 'stream on', however we must have all channels open to allow the
synchronisation signals to be communicated between the cameras

 (which I believe are technically 'gpio' but these can only pass if the
'mux' channel is open)

> 
>> +
>> +		/* Start all cameras. */
>> +		for_each_source(priv, source) {
>> +			ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
>> +			if (ret)
>> +				return ret;
>> +		}
>> +
>> +		ret = max9286_check_video_links(priv);
>> +		if (ret)
>> +			return ret;
>> +
>> +		/*
>> +		 * Wait until frame synchronization is locked.
>> +		 *
>> +		 * Manual says frame sync locking should take ~6 VTS.
>> +		 * From practical experience at least 8 are required. Give
>> +		 * 12 complete frames time (~400ms at 30 fps) to achieve frame
>> +		 * locking before returning error.
>> +		 */
>> +		for (i = 0; i < 40; i++) {
>> +			if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
>> +				sync = true;
>> +				break;
>> +			}
>> +			usleep_range(9000, 11000);
>> +		}
>> +
>> +		if (!sync) {
>> +			dev_err(&priv->client->dev,
>> +				"Failed to get frame synchronization\n");
>> +			return -EXDEV; /* Invalid cross-device link */
>> +		}
>> +
>> +		/*
>> +		 * Enable CSI output, VC set according to link number.
>> +		 * Bit 7 must be set (chip manual says it's 0 and reserved).
>> +		 */
>> +		max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
>> +			      MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
>> +	} else {
>> +		max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
>> +
>> +		/* Stop all cameras. */
>> +		for_each_source(priv, source)
>> +			v4l2_subdev_call(source->sd, video, s_stream, 0);
>> +
>> +		max9286_i2c_mux_close(priv);
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
>> +				  struct v4l2_subdev_pad_config *cfg,
>> +				  struct v4l2_subdev_mbus_code_enum *code)
>> +{
>> +	if (code->pad || code->index > 0)
>> +		return -EINVAL;
>> +
>> +	code->code = MEDIA_BUS_FMT_UYVY8_2X8;
>> +
>> +	return 0;
>> +}
>> +
>> +static struct v4l2_mbus_framefmt *
>> +max9286_get_pad_format(struct max9286_priv *priv,
>> +		       struct v4l2_subdev_pad_config *cfg,
>> +		       unsigned int pad, u32 which)
>> +{
>> +	switch (which) {
>> +	case V4L2_SUBDEV_FORMAT_TRY:
>> +		return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
>> +	case V4L2_SUBDEV_FORMAT_ACTIVE:
>> +		return &priv->fmt[pad];
>> +	default:
>> +		return NULL;
>> +	}
>> +}
>> +
>> +static int max9286_set_fmt(struct v4l2_subdev *sd,
>> +			   struct v4l2_subdev_pad_config *cfg,
>> +			   struct v4l2_subdev_format *format)
>> +{
>> +	struct max9286_priv *priv = sd_to_max9286(sd);
>> +	struct v4l2_mbus_framefmt *cfg_fmt;
>> +
>> +	if (format->pad >= MAX9286_SRC_PAD)
>> +		return -EINVAL;
>> +
>> +	/* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
>> +	switch (format->format.code) {
>> +	case MEDIA_BUS_FMT_UYVY8_2X8:
>> +	case MEDIA_BUS_FMT_VYUY8_2X8:
>> +	case MEDIA_BUS_FMT_YUYV8_2X8:
>> +	case MEDIA_BUS_FMT_YVYU8_2X8:
>> +		break;
>> +	default:
>> +		format->format.code = MEDIA_BUS_FMT_YUYV8_2X8;
>> +		break;
>> +	}
>> +
>> +	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
>> +	if (!cfg_fmt)
>> +		return -EINVAL;
>> +
>> +	*cfg_fmt = format->format;
> 
> I believe access to cfg_fmt needs to be serialised, by using e.g. a mutex.
> 

Ack.


>> +
>> +	return 0;
>> +}
>> +
>> +static int max9286_get_fmt(struct v4l2_subdev *sd,
>> +			   struct v4l2_subdev_pad_config *cfg,
>> +			   struct v4l2_subdev_format *format)
>> +{
>> +	struct max9286_priv *priv = sd_to_max9286(sd);
>> +	struct v4l2_mbus_framefmt *cfg_fmt;
>> +
>> +	if (format->pad >= MAX9286_SRC_PAD)
>> +		return -EINVAL;
>> +
>> +	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
>> +	if (!cfg_fmt)
>> +		return -EINVAL;
>> +
>> +	format->format = *cfg_fmt;
> 
> Same here.
> 
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct v4l2_subdev_video_ops max9286_video_ops = {
>> +	.s_stream	= max9286_s_stream,
>> +};
>> +
>> +static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
>> +	.enum_mbus_code = max9286_enum_mbus_code,
>> +	.get_fmt	= max9286_get_fmt,
>> +	.set_fmt	= max9286_set_fmt,
>> +};
>> +
>> +static const struct v4l2_subdev_ops max9286_subdev_ops = {
>> +	.video		= &max9286_video_ops,
>> +	.pad		= &max9286_pad_ops,
>> +};
>> +
>> +static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
>> +{
>> +	fmt->width		= 1280;
>> +	fmt->height		= 800;
>> +	fmt->code		= MEDIA_BUS_FMT_UYVY8_2X8;
>> +	fmt->colorspace		= V4L2_COLORSPACE_SRGB;
>> +	fmt->field		= V4L2_FIELD_NONE;
>> +	fmt->ycbcr_enc		= V4L2_YCBCR_ENC_DEFAULT;
>> +	fmt->quantization	= V4L2_QUANTIZATION_DEFAULT;
>> +	fmt->xfer_func		= V4L2_XFER_FUNC_DEFAULT;
>> +}
>> +
>> +static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
>> +{
>> +	struct v4l2_mbus_framefmt *format;
>> +	unsigned int i;
>> +
>> +	for (i = 0; i < MAX9286_N_SINKS; i++) {
>> +		format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
>> +		max9286_init_format(format);
>> +	}
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
>> +	.open = max9286_open,
>> +};
>> +
>> +static int max9286_v4l2_register(struct max9286_priv *priv)
>> +{
>> +	struct device *dev = &priv->client->dev;
>> +	struct fwnode_handle *ep;
>> +	int ret;
>> +	int i;
>> +
>> +	/* Register v4l2 async notifiers for connected Camera subdevices */
>> +	ret = max9286_v4l2_notifier_register(priv);
>> +	if (ret) {
>> +		dev_err(dev, "Unable to register V4L2 async notifiers\n");
>> +		return ret;
>> +	}
>> +
>> +	/* Configure V4L2 for the MAX9286 itself */
>> +
>> +	v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
>> +	priv->sd.internal_ops = &max9286_subdev_internal_ops;
>> +	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
>> +
>> +	v4l2_ctrl_handler_init(&priv->ctrls, 1);
>> +	/*
>> +	 * FIXME: Compute the real pixel rate. The 50 MP/s value comes from the
>> +	 * hardcoded frequency in the BSP CSI-2 receiver driver.
>> +	 */
>> +	v4l2_ctrl_new_std(&priv->ctrls, NULL, V4L2_CID_PIXEL_RATE,
>> +			  50000000, 50000000, 1, 50000000);
> 
> This driver wouldn't get any notification on the upstream pixel rate
> changes. Something to think about indeed.

Indeed, we're trying to fix this up now as we need to convey the correct
pixel rate when 4 cameras are used with higher framesizes which requires
a higher bus speed.


>> +	priv->sd.ctrl_handler = &priv->ctrls;
>> +	ret = priv->ctrls.error;
>> +	if (ret)
>> +		goto err_async;
>> +
>> +	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
>> +
>> +	priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
>> +	for (i = 0; i < MAX9286_SRC_PAD; i++)
>> +		priv->pads[i].flags = MEDIA_PAD_FL_SINK;
>> +	ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
>> +				     priv->pads);
>> +	if (ret)
>> +		goto err_async;
>> +
>> +	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
> 
> The graph ports and entity pads match now, but they're not the same thing.
> 
> I'd add at least comment along the definition it is used for OF as well.

Ayeee ok.

> 
>> +					     0, 0);
>> +	if (!ep) {
>> +		dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
>> +		ret = -ENOENT;
>> +		goto err_async;
>> +	}
>> +	priv->sd.fwnode = ep;
>> +
>> +	ret = v4l2_async_register_subdev(&priv->sd);
>> +	if (ret < 0) {
>> +		dev_err(dev, "Unable to register subdevice\n");
>> +		goto err_put_node;
>> +	}
>> +
>> +	return 0;
>> +
>> +err_put_node:
>> +	fwnode_handle_put(ep);
>> +err_async:
>> +	max9286_v4l2_notifier_unregister(priv);
>> +
>> +	return ret;
>> +}
>> +
>> +static void max9286_v4l2_unregister(struct max9286_priv *priv)
>> +{
>> +	fwnode_handle_put(priv->sd.fwnode);
>> +	v4l2_async_unregister_subdev(&priv->sd);
>> +	max9286_v4l2_notifier_unregister(priv);
>> +}
>> +
>> +/* -----------------------------------------------------------------------------
>> + * Probe/Remove
>> + */
>> +
>> +static int max9286_setup(struct max9286_priv *priv)
>> +{
>> +	/*
>> +	 * Link ordering values for all enabled links combinations. Orders must
>> +	 * be assigned sequentially from 0 to the number of enabled links
>> +	 * without leaving any hole for disabled links. We thus assign orders to
>> +	 * enabled links first, and use the remaining order values for disabled
>> +	 * links are all links must have a different order value;
>> +	 */
>> +	static const u8 link_order[] = {
>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
>> +		(3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
>> +		(3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
>> +		(3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
>> +		(3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
>> +		(3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
>> +		(0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
>> +		(1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
>> +		(1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
>> +		(2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
>> +		(1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
>> +		(2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
>> +		(2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
>> +	};
>> +
>> +	/*
>> +	 * Set the I2C bus speed.
>> +	 *
>> +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
>> +	 * only. This should be disabled after the mux is initialised.
>> +	 */
>> +	max9286_configure_i2c(priv, true);
>> +
>> +	/*
>> +	 * Reverse channel setup.
>> +	 *
>> +	 * - Enable custom reverse channel configuration (through register 0x3f)
>> +	 *   and set the first pulse length to 35 clock cycles.
>> +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
>> +	 *   high threshold enabled by the serializer driver.
>> +	 */
>> +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
>> +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
>> +		      MAX9286_REV_AMP_X);
>> +	usleep_range(2000, 2500);
>> +
>> +	/*
>> +	 * Enable GMSL links, mask unused ones and autodetect link
>> +	 * used as CSI clock source.
>> +	 */
>> +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
>> +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
>> +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
>> +
>> +	/*
>> +	 * Video format setup:
>> +	 * Disable CSI output, VC is set according to Link number.
>> +	 */
>> +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
>> +
>> +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
>> +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
>> +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
>> +		      MAX9286_DATATYPE_YUV422_8BIT);
>> +
>> +	/* Automatic: FRAMESYNC taken from the slowest Link. */
>> +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
>> +		      MAX9286_FSYNCMETH_AUTO);
>> +
>> +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
>> +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
>> +		      MAX9286_HVSRC_D14);
>> +
>> +	/*
>> +	 * Wait for 2ms to allow the link to resynchronize after the
>> +	 * configuration change.
>> +	 */
>> +	usleep_range(2000, 5000);
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct of_device_id max9286_dt_ids[] = {
>> +	{ .compatible = "maxim,max9286" },
>> +	{},
>> +};
>> +MODULE_DEVICE_TABLE(of, max9286_dt_ids);


Hrm ... how has this ended up all the way up here ... moving somewhere
more appropriate.


>> +
>> +static void max9286_gpio_set(struct gpio_chip *chip,
>> +			     unsigned int offset, int value)
>> +{
>> +	struct max9286_priv *priv = gpiochip_get_data(chip);
>> +
>> +	if (value)
>> +		priv->gpio_state |= BIT(offset);
>> +	else
>> +		priv->gpio_state &= ~BIT(offset);
>> +
>> +	max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
>> +}
>> +
>> +static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
>> +{
>> +	struct max9286_priv *priv = gpiochip_get_data(chip);
>> +
>> +	return priv->gpio_state & BIT(offset);
>> +}
>> +
>> +static int max9286_gpio(struct max9286_priv *priv)
>> +{
>> +	struct device *dev = &priv->client->dev;
>> +	struct gpio_chip *gpio = &priv->gpio;
>> +	int ret;
>> +
>> +	static const char * const names[] = {
>> +		"GPIO0OUT",
>> +		"GPIO1OUT",
>> +	};
>> +
>> +	/* Configure the GPIO */
>> +	gpio->label = dev_name(dev);
>> +	gpio->parent = dev;
>> +	gpio->owner = THIS_MODULE;
>> +	gpio->of_node = dev->of_node;
>> +	gpio->ngpio = 2;
>> +	gpio->base = -1;
>> +	gpio->set = max9286_gpio_set;
>> +	gpio->get = max9286_gpio_get;
>> +	gpio->can_sleep = true;
>> +	gpio->names = names;
>> +
>> +	/* GPIO values default to high */
>> +	priv->gpio_state = BIT(0) | BIT(1);
>> +
>> +	ret = devm_gpiochip_add_data(dev, gpio, priv);
>> +	if (ret)
>> +		dev_err(dev, "Unable to create gpio_chip\n");
>> +
>> +	return ret;
>> +}
>> +
>> +static int max9286_init(struct device *dev)
>> +{
>> +	struct max9286_priv *priv;
>> +	struct i2c_client *client;
>> +	int ret;
>> +
>> +	/* Skip non-max9286 devices. */
>> +	if (!dev->of_node || !of_match_node(max9286_dt_ids, dev->of_node))
>> +		return 0;

Ah - because of this - which is unnecessary - (part of multi-device
workaround - removing).

>> +
>> +	client = to_i2c_client(dev);
>> +	priv = i2c_get_clientdata(client);
>> +
>> +	/* Enable the bus power. */
>> +	ret = regulator_enable(priv->regulator);
>> +	if (ret < 0) {
>> +		dev_err(&client->dev, "Unable to turn PoC on\n");
>> +		return ret;
>> +	}
>> +
>> +	priv->poc_enabled = true;
>> +
>> +	ret = max9286_setup(priv);
>> +	if (ret) {
>> +		dev_err(dev, "Unable to setup max9286\n");
>> +		goto err_regulator;
>> +	}
>> +
>> +	/*
>> +	 * Register all V4L2 interactions for the MAX9286 and notifiers for
>> +	 * any subdevices connected.
>> +	 */
>> +	ret = max9286_v4l2_register(priv);
>> +	if (ret) {
>> +		dev_err(dev, "Failed to register with V4L2\n");
>> +		goto err_regulator;
>> +	}
>> +
>> +	ret = max9286_i2c_mux_init(priv);
>> +	if (ret) {
>> +		dev_err(dev, "Unable to initialize I2C multiplexer\n");
>> +		goto err_v4l2_register;
>> +	}
>> +
>> +	/* Leave the mux channels disabled until they are selected. */
>> +	max9286_i2c_mux_close(priv);
>> +
>> +	return 0;
>> +
>> +err_v4l2_register:
>> +	max9286_v4l2_unregister(priv);
>> +err_regulator:
>> +	regulator_disable(priv->regulator);
>> +	priv->poc_enabled = false;
>> +
>> +	return ret;
>> +}
>> +
>> +static void max9286_cleanup_dt(struct max9286_priv *priv)
>> +{
>> +	struct max9286_source *source;
>> +
>> +	for_each_source(priv, source) {
>> +		fwnode_handle_put(source->fwnode);
>> +		source->fwnode = NULL;
>> +	}
>> +}
>> +
>> +static int max9286_parse_dt(struct max9286_priv *priv)
>> +{
>> +	struct device *dev = &priv->client->dev;
>> +	struct device_node *i2c_mux;
>> +	struct device_node *node = NULL;
>> +	unsigned int i2c_mux_mask = 0;
>> +
>> +	of_node_get(dev->of_node);
>> +	i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
>> +	if (!i2c_mux) {
>> +		dev_err(dev, "Failed to find i2c-mux node\n");
>> +		return -EINVAL;
>> +	}
>> +
>> +	/* Identify which i2c-mux channels are enabled */
>> +	for_each_child_of_node(i2c_mux, node) {
>> +		u32 id = 0;
>> +
>> +		of_property_read_u32(node, "reg", &id);
>> +		if (id >= MAX9286_NUM_GMSL)
>> +			continue;
>> +
>> +		if (!of_device_is_available(node)) {
>> +			dev_dbg(dev, "Skipping disabled I2C bus port %u\n",
>> +				id);
> 
> Fits on the same line.

Ah yes, just ;-)

> 
>> +			continue;
>> +		}
>> +
>> +		i2c_mux_mask |= BIT(id);
>> +	}
>> +	of_node_put(node);
>> +	of_node_put(i2c_mux);
>> +
>> +	/* Parse the endpoints */
>> +	for_each_endpoint_of_node(dev->of_node, node) {
>> +		struct max9286_source *source;
>> +		struct of_endpoint ep;
>> +
>> +		of_graph_parse_endpoint(node, &ep);
>> +		dev_dbg(dev, "Endpoint %pOF on port %d",
>> +			ep.local_node, ep.port);
>> +
>> +		if (ep.port > MAX9286_NUM_GMSL) {
>> +			dev_err(dev, "Invalid endpoint %s on port %d",
>> +				of_node_full_name(ep.local_node), ep.port);
>> +			continue;
>> +		}
>> +
>> +		/* For the source endpoint just parse the bus configuration. */
>> +		if (ep.port == MAX9286_SRC_PAD) {
>> +			struct v4l2_fwnode_endpoint vep = {
>> +				.bus_type = V4L2_MBUS_CSI2_DPHY
>> +			};
>> +			int ret;
>> +
>> +			ret = v4l2_fwnode_endpoint_parse(
>> +					of_fwnode_handle(node), &vep);
>> +			if (ret) {
>> +				of_node_put(node);
>> +				return ret;
>> +			}
>> +
>> +			if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
>> +				dev_err(dev,
>> +					"Media bus %u type not supported\n",
>> +					vep.bus_type);
>> +				v4l2_fwnode_endpoint_free(&vep);
>> +				of_node_put(node);
>> +				return -EINVAL;
>> +			}
>> +
>> +			priv->csi2_data_lanes =
>> +				vep.bus.mipi_csi2.num_data_lanes;
>> +			v4l2_fwnode_endpoint_free(&vep);
>> +
>> +			continue;
>> +		}
>> +
>> +		/* Skip if the corresponding GMSL link is unavailable. */
>> +		if (!(i2c_mux_mask & BIT(ep.port)))
>> +			continue;
>> +
>> +		if (priv->sources[ep.port].fwnode) {
>> +			dev_err(dev,
>> +				"Multiple port endpoints are not supported: %d",
>> +				ep.port);
>> +
>> +			continue;
>> +		}
>> +
>> +		source = &priv->sources[ep.port];
>> +		source->fwnode = fwnode_graph_get_remote_endpoint(
>> +						of_fwnode_handle(node));
>> +		if (!source->fwnode) {
>> +			dev_err(dev,
>> +				"Endpoint %pOF has no remote endpoint connection\n",
>> +				ep.local_node);
>> +
>> +			continue;
>> +		}
>> +
>> +		priv->source_mask |= BIT(ep.port);
>> +		priv->nsources++;
>> +	}
>> +	of_node_put(node);
>> +
>> +	priv->route_mask = priv->source_mask;
>> +
>> +	return 0;
>> +}
>> +
>> +static int max9286_probe(struct i2c_client *client)
>> +{
>> +	struct max9286_priv *priv;
>> +	unsigned int i;
>> +	int ret;
>> +
>> +	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
>> +	if (!priv)
>> +		return -ENOMEM;
> 
> You won't lose anything by using the devm_ variant here.

Indeed,

> 
>> +
>> +	priv->client = client;
>> +	i2c_set_clientdata(client, priv);
>> +
>> +	for (i = 0; i < MAX9286_N_SINKS; i++)
>> +		max9286_init_format(&priv->fmt[i]);
>> +
>> +	ret = max9286_parse_dt(priv);
>> +	if (ret)
>> +		return ret;
> 
> But you can avoid accidental memory leaks for nothing. :-)

It would be good not to leak indeed!

> 
>> +
>> +	priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
>> +						   GPIOD_OUT_HIGH);
>> +	if (IS_ERR(priv->gpiod_pwdn))
>> +		return PTR_ERR(priv->gpiod_pwdn);
>> +
>> +	gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
>> +	gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
>> +
>> +	/* Wait at least 4ms before the I2C lines latch to the address */
>> +	if (priv->gpiod_pwdn)
>> +		usleep_range(4000, 5000);
>> +
>> +	ret = max9286_gpio(priv);
>> +	if (ret)

This fails to clean up after the _parse_dt() path here too :-(

>> +		return ret;
>> +
>> +	priv->regulator = regulator_get(&client->dev, "poc");
> 
> Why not devm_regulator_get()?

Indeed, should be fine I believe.
Updated.


> 
>> +	if (IS_ERR(priv->regulator)) {
>> +		if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
>> +			dev_err(&client->dev,
>> +				"Unable to get PoC regulator (%ld)\n",
>> +				PTR_ERR(priv->regulator));
>> +		ret = PTR_ERR(priv->regulator);
>> +		priv->regulator = NULL;
>> +		goto err_free;
>> +	}
>> +
>> +	/*
>> +	 * We can have multiple MAX9286 instances on the same physical I2C
>> +	 * bus, and I2C children behind ports of separate MAX9286 instances
>> +	 * having the same I2C address. As the MAX9286 starts by default with
>> +	 * all ports enabled, we need to disable all ports on all MAX9286
>> +	 * instances before proceeding to further initialize the devices and
>> +	 * instantiate children.
>> +	 *
>> +	 * Start by just disabling all channels on the current device. Then,
>> +	 * if all other MAX9286 on the parent bus have been probed, proceed
>> +	 * to initialize them all, including the current one.
>> +	 */
>> +	max9286_i2c_mux_close(priv);
>> +
>> +	/*
>> +	 * The MAX9286 initialises with auto-acknowledge enabled by default.
>> +	 * This means that if multiple MAX9286 devices are connected to an I2C
>> +	 * bus, another MAX9286 could ack I2C transfers meant for a device on
>> +	 * the other side of the GMSL links for this MAX9286 (such as a
>> +	 * MAX9271). To prevent that disable auto-acknowledge early on; it
>> +	 * will be enabled later as needed.
>> +	 */
>> +	max9286_configure_i2c(priv, false);
>> +
>> +	ret = max9286_init(&client->dev);
>> +	if (ret < 0)
>> +		goto err_regulator;
>> +
>> +	return 0;
>> +
>> +err_regulator:
>> +	regulator_put(priv->regulator);
>> +	max9286_i2c_mux_close(priv);
>> +	max9286_configure_i2c(priv, false);
>> +err_free:
>> +	max9286_cleanup_dt(priv);
>> +	kfree(priv);
>> +
>> +	return ret;
>> +}
>> +
>> +static int max9286_remove(struct i2c_client *client)
>> +{
>> +	struct max9286_priv *priv = i2c_get_clientdata(client);
>> +
>> +	i2c_mux_del_adapters(priv->mux);
>> +
>> +	max9286_v4l2_unregister(priv);
>> +
>> +	if (priv->poc_enabled)
>> +		regulator_disable(priv->regulator);
> 
> Hmm. Isn't poc_enabled always true (and the regulator enabled) here? If
> so, you could disable the regulator unconditionally.

Hrm ... in /this/ variant of the driver yes, but we have to do a
*really* horrible workaround for an issue if we have two of the same
device on the same I2C bus (which of course is the platform
configuration on our boards).

I'll move this to the support patch for two max9286's on the same bus.



>> +	regulator_put(priv->regulator);
>> +
>> +	max9286_cleanup_dt(priv);
>> +
>> +	gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
>> +
>> +	kfree(priv);
>> +
>> +	return 0;
>> +}
>> +
>> +static const struct i2c_device_id max9286_id[] = {
>> +	{ "max9286", 0 },
>> +	{ }
>> +};
>> +MODULE_DEVICE_TABLE(i2c, max9286_id);
> 
> Do you need this table?

'Technically' this table is still required for module autoloading, until
some solution such as [0] is merged:

[0] [PATCH RFC] modpost: Support I2C Aliases from OF tables

https://lore.kernel.org/lkml/20190710193918.31135-1-kieran.bingham+renesas@ideasonboard.com/

(Do you have any comments on [0] per chance too?)


However in practice, I think the only restriction that gets lost is
device instantiation from sysfs, which wouldn't really work for this
driver anyway, because it requires a description of connected endpoints.

So - yes, I think it's quite safe to drop it.

>> +
>> +static struct i2c_driver max9286_i2c_driver = {
>> +	.driver	= {
>> +		.name		= "max9286",
>> +		.of_match_table	= of_match_ptr(max9286_dt_ids),
>> +	},
>> +	.probe_new	= max9286_probe,
>> +	.remove		= max9286_remove,
>> +	.id_table	= max9286_id,
>> +};
>> +
>> +module_i2c_driver(max9286_i2c_driver);
>> +
>> +MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
>> +MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
>> +MODULE_LICENSE("GPL");
>
Hyun Kwon Feb. 28, 2020, 6:13 p.m. UTC | #4
Hi Kieran,

Thanks for sharing a patch.

Sorry for late response. I'm trying this driver along with Xilinx MIPI
pipeline and GMSL sensors with max96705. I wanted to confirm a few things
before replying. It's still on going, but replying before it gets too late.
Mostly it's questions and looking for some input.

On Fri, 2020-02-14 at 03:54:19 -0800, Kieran Bingham wrote:
> Small update,
> 
> On 14/02/2020 10:31, Kieran Bingham wrote:
> > The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
> > CSI-2 output. The device supports multicamera streaming applications,
> > and features the ability to synchronise the attached cameras.
> > 
> > CSI-2 output can be configured with 1 to 4 lanes, and a control channel
> > is supported over I2C, which implements an I2C mux to facilitate
> > communications with connected cameras across the reverse control
> > channel.
> 
> This is missing the Co-developed-by: tags ...
> 
> Co-developed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> > Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
> 
> Co-developed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> > Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> 
> Co-developed-by: Laurent Pinchart
> <laurent.pinchart+renesas@ideasonboard.com>
> 
> > Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> 
> Co-developed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> 
> > Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> 
> --
> Kieran
> 
> 
> 
> > 
> > --
> > v2:
> >  - Fix MAINTAINERS entry
> > 
> > This posting is released with the following modifications to work
> > without Sakari's VC developments:
> >  - max9286_g_mbus_config() re-instated
> >  - max9286_get_frame_desc() is not bus/csi aware
> >  - max9286_{get,set}_routing() removed
> > 
> > v3:
> >  - Initialise notifier with v4l2_async_notifier_init
> >  - Update for new mbus csi2 format V4L2_MBUS_CSI2_DPHY
> > 
> > v4: - Re-introduce required code to function with the VC series.
> > 
> >  - Implement max9286_get_routing, max9286_set_routing
> >  - Remove max9286_g_mbus_config
> > 
> > v5: (internal release)
> >  - Fix printk formatting for hex value
> >  - max9286->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE (add |)
> >  - MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER -> MEDIA_ENT_F_VID_IF_BRIDGE
> >  - Remove 'device is bound' workaround
> > 
> > v6:
> >  - v4l2_subdev_krouting instead of v4l2_subdev_routing separated
> >    to allow integration without the VC/V4L2-Mux series.
> >  - convert sd_to_max9286 to inline function
> >  - rename max9286_device to max9286_priv
> >  - Cleanup the v4l2_async_notifier
> >  - Extend MODULE_AUTHOR
> >  - Replace of_graph_get_endpoint_by_regs with fwnode_graph_get_endpoint_by_id
> >  - Pass default bus type when parsing fwnode endpoint (Manivannan Sadhasivam)
> >  - Use new YAML file reference in MAINTAINERS
> >  - Parse new i2c-mux node in max9286_get_i2c_by_id
> >    (This could/should be refactored to parse these separately first)
> >  - Spelling and calculation fixes in the FSYNC_LOCKED check comments
> >  - Identify each enabled i2c-mux channel in a single pass
> >  - max9286: Improve mux-state readbility [v2]
> >  - Fix frame sync lock durations
> >  - Add comment to describe /why/ we must open the mux in s_stream
> >  - use -EXDEV as return code for failed link synchronisation.
> >  - Fix reference counting of the dt nodeS
> >  - Convert to probe_new for I2C
> >  - Remove redundant max9286_i2c_mux_state
> >  - Provide optional enable-gpio (max9286-pwdn)
> > 
> > v7:
> >  [Kieran]
> >  - Ensure powerdown lines are optional
> >  - Add a 4ms power-up delay
> >  - Add max9286_check_config_link() to core
> >  - Add GPIO chip controller for GPIO0OUT and GPIO1OUT
> >  - Fix GPIO registration
> >  - max9286: Split out async registration
> >    (fixes regulator -EPROBE_DEFERs failures)
> >  - Collect all V4L2 registrations
> >  - balance v4l2_async refcnting
> >  - Rename max9286_v4l2_async_ => max9286_v4l2_notifier_
> > 
> >  [Jacopo]
> >  - Remove redundanct MAXIM_I2C_SPEED macros
> >  - Move notifiers operations
> >  - Add delay after reverse channel reconfiguration
> >  - Move link setup to completion
> >  - Fix up max9286_check_config_link() implementation
> >  - Remove redundant dual configuration of reverse channel
> > 
> >  MAINTAINERS                 |   10 +
> >  drivers/media/i2c/Kconfig   |   11 +
> >  drivers/media/i2c/Makefile  |    1 +
> >  drivers/media/i2c/max9286.c | 1278 +++++++++++++++++++++++++++++++++++
> >  4 files changed, 1300 insertions(+)
> >  create mode 100644 drivers/media/i2c/max9286.c
> > 
> > diff --git a/MAINTAINERS b/MAINTAINERS
> > index 983d3c97edd1..148706353d25 100644
> > --- a/MAINTAINERS
> > +++ b/MAINTAINERS
> > @@ -10033,6 +10033,16 @@ F:	Documentation/devicetree/bindings/hwmon/max6697.txt
> >  F:	drivers/hwmon/max6697.c
> >  F:	include/linux/platform_data/max6697.h
> >  
> > +MAX9286 QUAD GMSL DESERIALIZER DRIVER
> > +M:	Jacopo Mondi <jacopo+renesas@jmondi.org>
> > +M:	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
> > +M:	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
> > +M:	Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
> > +L:	linux-media@vger.kernel.org
> > +S:	Maintained
> > +F:	Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml
> > +F:	drivers/media/i2c/max9286.c
> > +
> >  MAX9860 MONO AUDIO VOICE CODEC DRIVER
> >  M:	Peter Rosin <peda@axentia.se>
> >  L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
> > diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
> > index c68e002d26ea..32a4deb90617 100644
> > --- a/drivers/media/i2c/Kconfig
> > +++ b/drivers/media/i2c/Kconfig
> > @@ -442,6 +442,17 @@ config VIDEO_VPX3220
> >  	  To compile this driver as a module, choose M here: the
> >  	  module will be called vpx3220.
> >  
> > +config VIDEO_MAX9286
> > +	tristate "Maxim MAX9286 GMSL deserializer support"
> > +	depends on I2C && I2C_MUX
> > +	depends on VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER
> > +	select V4L2_FWNODE
> > +	help
> > +	  This driver supports the Maxim MAX9286 GMSL deserializer.
> > +
> > +	  To compile this driver as a module, choose M here: the
> > +	  module will be called max9286.
> > +
> >  comment "Video and audio decoders"
> >  
> >  config VIDEO_SAA717X
> > diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
> > index c147bb9d28db..8896cf8bfc4f 100644
> > --- a/drivers/media/i2c/Makefile
> > +++ b/drivers/media/i2c/Makefile
> > @@ -117,5 +117,6 @@ obj-$(CONFIG_VIDEO_IMX290)	+= imx290.o
> >  obj-$(CONFIG_VIDEO_IMX319)	+= imx319.o
> >  obj-$(CONFIG_VIDEO_IMX355)	+= imx355.o
> >  obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o
> > +obj-$(CONFIG_VIDEO_MAX9286)	+= max9286.o
> >  
> >  obj-$(CONFIG_SDR_MAX2175) += max2175.o
> > diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c
> > new file mode 100644
> > index 000000000000..a20829297ef6
> > --- /dev/null
> > +++ b/drivers/media/i2c/max9286.c
> > @@ -0,0 +1,1278 @@
> > +// SPDX-License-Identifier: GPL-2.0+
> > +/*
> > + * Maxim MAX9286 GMSL Deserializer Driver
> > + *

[snip]

> > +
> > +static const struct v4l2_async_notifier_operations max9286_notify_ops = {
> > +	.bound = max9286_notify_bound,
> > +	.unbind = max9286_notify_unbind,
> > +};
> > +
> > +static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
> > +{
> > +	struct device *dev = &priv->client->dev;
> > +	struct max9286_source *source = NULL;
> > +	int ret;
> > +
> > +	if (!priv->nsources)
> > +		return 0;
> > +
> > +	v4l2_async_notifier_init(&priv->notifier);
> > +
> > +	for_each_source(priv, source) {
> > +		unsigned int i = to_index(priv, source);
> > +
> > +		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> > +		source->asd.match.fwnode = source->fwnode;
> > +
> > +		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
> > +						     &source->asd);
> > +		if (ret) {
> > +			dev_err(dev, "Failed to add subdev for source %d", i);
> > +			v4l2_async_notifier_cleanup(&priv->notifier);
> > +			return ret;
> > +		}
> > +
> > +		/*
> > +		 * Balance the reference counting handled through
> > +		 * v4l2_async_notifier_cleanup()
> > +		 */
> > +		fwnode_handle_get(source->fwnode);
> > +	}
> > +
> > +	priv->notifier.ops = &max9286_notify_ops;
> > +
> > +	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
> > +	if (ret) {
> > +		dev_err(dev, "Failed to register subdev_notifier");
> > +		v4l2_async_notifier_cleanup(&priv->notifier);
> > +		return ret;
> > +	}
> > +
> > +	return 0;
> > +}

This was giving me some touble because this subdev notifier chain is a part
of a bigger graph (Xilinx Video pipeline graph). Those are defined using
same graph bindings, hence conflicting each other. For now, in order to 
work around, I'm calling bound of subdev notifier if there's any match 
already in parent's done list [1]. Do you have any input how this should be
handled properly?


> > +
> > +static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
> > +{
> > +	if (!priv->nsources)
> > +		return;
> > +
> > +	v4l2_async_notifier_unregister(&priv->notifier);
> > +	v4l2_async_notifier_cleanup(&priv->notifier);
> > +}
> > +

[snip]

> > +};
> > +
> > +static int max9286_v4l2_register(struct max9286_priv *priv)
> > +{
> > +	struct device *dev = &priv->client->dev;
> > +	struct fwnode_handle *ep;
> > +	int ret;
> > +	int i;
> > +
> > +	/* Register v4l2 async notifiers for connected Camera subdevices */
> > +	ret = max9286_v4l2_notifier_register(priv);
> > +	if (ret) {
> > +		dev_err(dev, "Unable to register V4L2 async notifiers\n");
> > +		return ret;
> > +	}
> > +
> > +	/* Configure V4L2 for the MAX9286 itself */
> > +
> > +	v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
> > +	priv->sd.internal_ops = &max9286_subdev_internal_ops;
> > +	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
> > +
> > +	v4l2_ctrl_handler_init(&priv->ctrls, 1);
> > +	/*
> > +	 * FIXME: Compute the real pixel rate. The 50 MP/s value comes from the
> > +	 * hardcoded frequency in the BSP CSI-2 receiver driver.
> > +	 */
> > +	v4l2_ctrl_new_std(&priv->ctrls, NULL, V4L2_CID_PIXEL_RATE,
> > +			  50000000, 50000000, 1, 50000000);
> > +	priv->sd.ctrl_handler = &priv->ctrls;
> > +	ret = priv->ctrls.error;
> > +	if (ret)
> > +		goto err_async;
> > +
> > +	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
> > +
> > +	priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
> > +	for (i = 0; i < MAX9286_SRC_PAD; i++)
> > +		priv->pads[i].flags = MEDIA_PAD_FL_SINK;
> > +	ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
> > +				     priv->pads);
> > +	if (ret)
> > +		goto err_async;
> > +
> > +	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
> > +					     0, 0);
> > +	if (!ep) {
> > +		dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
> > +		ret = -ENOENT;
> > +		goto err_async;
> > +	}
> > +	priv->sd.fwnode = ep;

I learned that an endpoint node is used for match in some drivers, including
this one [2], while a device node is used in others including Xilinx one. :-)
Hence they don't work with each other. I feel like this better be unified for
interoperability. I understand it's not a problem of this patch, but maybe good
to discuss?

> > +
> > +	ret = v4l2_async_register_subdev(&priv->sd);
> > +	if (ret < 0) {
> > +		dev_err(dev, "Unable to register subdevice\n");
> > +		goto err_put_node;
> > +	}
> > +
> > +	return 0;
> > +
> > +err_put_node:
> > +	fwnode_handle_put(ep);
> > +err_async:
> > +	max9286_v4l2_notifier_unregister(priv);
> > +
> > +	return ret;
> > +}
> > +
> > +static void max9286_v4l2_unregister(struct max9286_priv *priv)
> > +{
> > +	fwnode_handle_put(priv->sd.fwnode);
> > +	v4l2_async_unregister_subdev(&priv->sd);
> > +	max9286_v4l2_notifier_unregister(priv);
> > +}
> > +
> > +/* -----------------------------------------------------------------------------
> > + * Probe/Remove
> > + */
> > +
> > +static int max9286_setup(struct max9286_priv *priv)
> > +{
> > +	/*
> > +	 * Link ordering values for all enabled links combinations. Orders must
> > +	 * be assigned sequentially from 0 to the number of enabled links
> > +	 * without leaving any hole for disabled links. We thus assign orders to
> > +	 * enabled links first, and use the remaining order values for disabled
> > +	 * links are all links must have a different order value;
> > +	 */
> > +	static const u8 link_order[] = {
> > +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
> > +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
> > +		(3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
> > +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
> > +		(3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
> > +		(3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
> > +		(3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
> > +		(3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
> > +		(0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
> > +		(1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
> > +		(1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
> > +		(2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
> > +		(1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
> > +		(2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
> > +		(2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
> > +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
> > +	};
> > +
> > +	/*
> > +	 * Set the I2C bus speed.
> > +	 *
> > +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> > +	 * only. This should be disabled after the mux is initialised.
> > +	 */
> > +	max9286_configure_i2c(priv, true);
> > +
> > +	/*
> > +	 * Reverse channel setup.
> > +	 *
> > +	 * - Enable custom reverse channel configuration (through register 0x3f)
> > +	 *   and set the first pulse length to 35 clock cycles.
> > +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> > +	 *   high threshold enabled by the serializer driver.
> > +	 */
> > +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> > +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> > +		      MAX9286_REV_AMP_X);
> > +	usleep_range(2000, 2500);
> > +
> > +	/*
> > +	 * Enable GMSL links, mask unused ones and autodetect link
> > +	 * used as CSI clock source.
> > +	 */
> > +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> > +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> > +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> > +
> > +	/*
> > +	 * Video format setup:
> > +	 * Disable CSI output, VC is set according to Link number.
> > +	 */
> > +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> > +
> > +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> > +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> > +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> > +		      MAX9286_DATATYPE_YUV422_8BIT);
> > +
> > +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> > +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> > +		      MAX9286_FSYNCMETH_AUTO);
> > +
> > +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> > +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> > +		      MAX9286_HVSRC_D14);

Some of these configs in fact need some handshake between serializer and
de-serializer. For example, I had to invert vsync in serializer [3] to make
it work with this patch.

In addition to that, I need a couple of additional programmings on max9286
(registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
oddly change reserved bits) to get frames. The datasheet doesn't explain
enough for me to understand. I'm talking to Maxim to get more details and
see if those can be handled by serilizer driver.

In a longer term, it'd be nice if such alignment between serializer and
de-serializer is handled in more scalable way.

Thanks,
-hyun

[1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
[2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
[3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
Kieran Bingham March 2, 2020, 10:33 a.m. UTC | #5
Hi Hyun,

On 28/02/2020 18:13, Hyun Kwon wrote:
> Hi Kieran,
> 
> Thanks for sharing a patch.
> 
> Sorry for late response. I'm trying this driver along with Xilinx MIPI
> pipeline and GMSL sensors with max96705. I wanted to confirm a few things
> before replying. It's still on going, but replying before it gets too late.
> Mostly it's questions and looking for some input.

Not too late at all.

We're very pleased to get input from other users and system configurations!


> On Fri, 2020-02-14 at 03:54:19 -0800, Kieran Bingham wrote:
>> Small update,
>>
>> On 14/02/2020 10:31, Kieran Bingham wrote:
>>> The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
>>> CSI-2 output. The device supports multicamera streaming applications,
>>> and features the ability to synchronise the attached cameras.
>>>
>>> CSI-2 output can be configured with 1 to 4 lanes, and a control channel
>>> is supported over I2C, which implements an I2C mux to facilitate
>>> communications with connected cameras across the reverse control
>>> channel.
>>
>> This is missing the Co-developed-by: tags ...
>>
>> Co-developed-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>
>>> Signed-off-by: Jacopo Mondi <jacopo+renesas@jmondi.org>
>>
>> Co-developed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>>> Signed-off-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>
>> Co-developed-by: Laurent Pinchart
>> <laurent.pinchart+renesas@ideasonboard.com>
>>
>>> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>>
>> Co-developed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>>
>>> Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>>
>> --
>> Kieran
>>
>>
>>
>>>
>>> --
>>> v2:
>>>  - Fix MAINTAINERS entry
>>>
>>> This posting is released with the following modifications to work
>>> without Sakari's VC developments:
>>>  - max9286_g_mbus_config() re-instated
>>>  - max9286_get_frame_desc() is not bus/csi aware
>>>  - max9286_{get,set}_routing() removed
>>>
>>> v3:
>>>  - Initialise notifier with v4l2_async_notifier_init
>>>  - Update for new mbus csi2 format V4L2_MBUS_CSI2_DPHY
>>>
>>> v4: - Re-introduce required code to function with the VC series.
>>>
>>>  - Implement max9286_get_routing, max9286_set_routing
>>>  - Remove max9286_g_mbus_config
>>>
>>> v5: (internal release)
>>>  - Fix printk formatting for hex value
>>>  - max9286->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE (add |)
>>>  - MEDIA_ENT_F_PROC_VIDEO_PIXEL_FORMATTER -> MEDIA_ENT_F_VID_IF_BRIDGE
>>>  - Remove 'device is bound' workaround
>>>
>>> v6:
>>>  - v4l2_subdev_krouting instead of v4l2_subdev_routing separated
>>>    to allow integration without the VC/V4L2-Mux series.
>>>  - convert sd_to_max9286 to inline function
>>>  - rename max9286_device to max9286_priv
>>>  - Cleanup the v4l2_async_notifier
>>>  - Extend MODULE_AUTHOR
>>>  - Replace of_graph_get_endpoint_by_regs with fwnode_graph_get_endpoint_by_id
>>>  - Pass default bus type when parsing fwnode endpoint (Manivannan Sadhasivam)
>>>  - Use new YAML file reference in MAINTAINERS
>>>  - Parse new i2c-mux node in max9286_get_i2c_by_id
>>>    (This could/should be refactored to parse these separately first)
>>>  - Spelling and calculation fixes in the FSYNC_LOCKED check comments
>>>  - Identify each enabled i2c-mux channel in a single pass
>>>  - max9286: Improve mux-state readbility [v2]
>>>  - Fix frame sync lock durations
>>>  - Add comment to describe /why/ we must open the mux in s_stream
>>>  - use -EXDEV as return code for failed link synchronisation.
>>>  - Fix reference counting of the dt nodeS
>>>  - Convert to probe_new for I2C
>>>  - Remove redundant max9286_i2c_mux_state
>>>  - Provide optional enable-gpio (max9286-pwdn)
>>>
>>> v7:
>>>  [Kieran]
>>>  - Ensure powerdown lines are optional
>>>  - Add a 4ms power-up delay
>>>  - Add max9286_check_config_link() to core
>>>  - Add GPIO chip controller for GPIO0OUT and GPIO1OUT
>>>  - Fix GPIO registration
>>>  - max9286: Split out async registration
>>>    (fixes regulator -EPROBE_DEFERs failures)
>>>  - Collect all V4L2 registrations
>>>  - balance v4l2_async refcnting
>>>  - Rename max9286_v4l2_async_ => max9286_v4l2_notifier_
>>>
>>>  [Jacopo]
>>>  - Remove redundanct MAXIM_I2C_SPEED macros
>>>  - Move notifiers operations
>>>  - Add delay after reverse channel reconfiguration
>>>  - Move link setup to completion
>>>  - Fix up max9286_check_config_link() implementation
>>>  - Remove redundant dual configuration of reverse channel
>>>
>>>  MAINTAINERS                 |   10 +
>>>  drivers/media/i2c/Kconfig   |   11 +
>>>  drivers/media/i2c/Makefile  |    1 +
>>>  drivers/media/i2c/max9286.c | 1278 +++++++++++++++++++++++++++++++++++
>>>  4 files changed, 1300 insertions(+)
>>>  create mode 100644 drivers/media/i2c/max9286.c
>>>
>>> diff --git a/MAINTAINERS b/MAINTAINERS
>>> index 983d3c97edd1..148706353d25 100644
>>> --- a/MAINTAINERS
>>> +++ b/MAINTAINERS
>>> @@ -10033,6 +10033,16 @@ F:	Documentation/devicetree/bindings/hwmon/max6697.txt
>>>  F:	drivers/hwmon/max6697.c
>>>  F:	include/linux/platform_data/max6697.h
>>>  
>>> +MAX9286 QUAD GMSL DESERIALIZER DRIVER
>>> +M:	Jacopo Mondi <jacopo+renesas@jmondi.org>
>>> +M:	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
>>> +M:	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
>>> +M:	Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
>>> +L:	linux-media@vger.kernel.org
>>> +S:	Maintained
>>> +F:	Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml
>>> +F:	drivers/media/i2c/max9286.c
>>> +
>>>  MAX9860 MONO AUDIO VOICE CODEC DRIVER
>>>  M:	Peter Rosin <peda@axentia.se>
>>>  L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
>>> diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
>>> index c68e002d26ea..32a4deb90617 100644
>>> --- a/drivers/media/i2c/Kconfig
>>> +++ b/drivers/media/i2c/Kconfig
>>> @@ -442,6 +442,17 @@ config VIDEO_VPX3220
>>>  	  To compile this driver as a module, choose M here: the
>>>  	  module will be called vpx3220.
>>>  
>>> +config VIDEO_MAX9286
>>> +	tristate "Maxim MAX9286 GMSL deserializer support"
>>> +	depends on I2C && I2C_MUX
>>> +	depends on VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER
>>> +	select V4L2_FWNODE
>>> +	help
>>> +	  This driver supports the Maxim MAX9286 GMSL deserializer.
>>> +
>>> +	  To compile this driver as a module, choose M here: the
>>> +	  module will be called max9286.
>>> +
>>>  comment "Video and audio decoders"
>>>  
>>>  config VIDEO_SAA717X
>>> diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
>>> index c147bb9d28db..8896cf8bfc4f 100644
>>> --- a/drivers/media/i2c/Makefile
>>> +++ b/drivers/media/i2c/Makefile
>>> @@ -117,5 +117,6 @@ obj-$(CONFIG_VIDEO_IMX290)	+= imx290.o
>>>  obj-$(CONFIG_VIDEO_IMX319)	+= imx319.o
>>>  obj-$(CONFIG_VIDEO_IMX355)	+= imx355.o
>>>  obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o
>>> +obj-$(CONFIG_VIDEO_MAX9286)	+= max9286.o
>>>  
>>>  obj-$(CONFIG_SDR_MAX2175) += max2175.o
>>> diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c
>>> new file mode 100644
>>> index 000000000000..a20829297ef6
>>> --- /dev/null
>>> +++ b/drivers/media/i2c/max9286.c
>>> @@ -0,0 +1,1278 @@
>>> +// SPDX-License-Identifier: GPL-2.0+
>>> +/*
>>> + * Maxim MAX9286 GMSL Deserializer Driver
>>> + *
> 
> [snip]
> 
>>> +
>>> +static const struct v4l2_async_notifier_operations max9286_notify_ops = {
>>> +	.bound = max9286_notify_bound,
>>> +	.unbind = max9286_notify_unbind,
>>> +};
>>> +
>>> +static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
>>> +{
>>> +	struct device *dev = &priv->client->dev;
>>> +	struct max9286_source *source = NULL;
>>> +	int ret;
>>> +
>>> +	if (!priv->nsources)
>>> +		return 0;
>>> +
>>> +	v4l2_async_notifier_init(&priv->notifier);
>>> +
>>> +	for_each_source(priv, source) {
>>> +		unsigned int i = to_index(priv, source);
>>> +
>>> +		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
>>> +		source->asd.match.fwnode = source->fwnode;
>>> +
>>> +		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
>>> +						     &source->asd);
>>> +		if (ret) {
>>> +			dev_err(dev, "Failed to add subdev for source %d", i);
>>> +			v4l2_async_notifier_cleanup(&priv->notifier);
>>> +			return ret;
>>> +		}
>>> +
>>> +		/*
>>> +		 * Balance the reference counting handled through
>>> +		 * v4l2_async_notifier_cleanup()
>>> +		 */
>>> +		fwnode_handle_get(source->fwnode);
>>> +	}
>>> +
>>> +	priv->notifier.ops = &max9286_notify_ops;
>>> +
>>> +	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
>>> +	if (ret) {
>>> +		dev_err(dev, "Failed to register subdev_notifier");
>>> +		v4l2_async_notifier_cleanup(&priv->notifier);
>>> +		return ret;
>>> +	}
>>> +
>>> +	return 0;
>>> +}
> 
> This was giving me some touble because this subdev notifier chain is a part
> of a bigger graph (Xilinx Video pipeline graph). Those are defined using
> same graph bindings, hence conflicting each other. For now, in order to 
> work around, I'm calling bound of subdev notifier if there's any match 
> already in parent's done list [1]. Do you have any input how this should be
> handled properly?

I suspect that it is likely your existing framework is matching at the
device level instead of the endpoint level, as it sounds like a topic we
hit on both this GMSL implementation and the ADV748x, but I'll have to
take a deeper look to be sure.

Matching should be done on endpoints, not devices as there could now be
multiple 'endpoints' connected to a single device.


The RCar-VIN platform now solely uses endpoint matching, and I believe
we may have to work through other platforms to update to the same approach.


A 'temporary' solution may be in the form of this patch:

https://git.linuxtv.org/sailus/media_tree.git/commit/?h=fwnode-const&id=35c32d99b2c3f5086b911ec817926de9b7bc3b41

Which I had mistakenly thought was already accepted for upstream but
appears to have stalled.

I'll follow this up separately to see what we need to do here.


>>> +
>>> +static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
>>> +{
>>> +	if (!priv->nsources)
>>> +		return;
>>> +
>>> +	v4l2_async_notifier_unregister(&priv->notifier);
>>> +	v4l2_async_notifier_cleanup(&priv->notifier);
>>> +}
>>> +
> 
> [snip]
> 
>>> +};
>>> +
>>> +static int max9286_v4l2_register(struct max9286_priv *priv)
>>> +{
>>> +	struct device *dev = &priv->client->dev;
>>> +	struct fwnode_handle *ep;
>>> +	int ret;
>>> +	int i;
>>> +
>>> +	/* Register v4l2 async notifiers for connected Camera subdevices */
>>> +	ret = max9286_v4l2_notifier_register(priv);
>>> +	if (ret) {
>>> +		dev_err(dev, "Unable to register V4L2 async notifiers\n");
>>> +		return ret;
>>> +	}
>>> +
>>> +	/* Configure V4L2 for the MAX9286 itself */
>>> +
>>> +	v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
>>> +	priv->sd.internal_ops = &max9286_subdev_internal_ops;
>>> +	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
>>> +
>>> +	v4l2_ctrl_handler_init(&priv->ctrls, 1);
>>> +	/*
>>> +	 * FIXME: Compute the real pixel rate. The 50 MP/s value comes from the
>>> +	 * hardcoded frequency in the BSP CSI-2 receiver driver.
>>> +	 */
>>> +	v4l2_ctrl_new_std(&priv->ctrls, NULL, V4L2_CID_PIXEL_RATE,
>>> +			  50000000, 50000000, 1, 50000000);
>>> +	priv->sd.ctrl_handler = &priv->ctrls;
>>> +	ret = priv->ctrls.error;
>>> +	if (ret)
>>> +		goto err_async;
>>> +
>>> +	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
>>> +
>>> +	priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
>>> +	for (i = 0; i < MAX9286_SRC_PAD; i++)
>>> +		priv->pads[i].flags = MEDIA_PAD_FL_SINK;
>>> +	ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
>>> +				     priv->pads);
>>> +	if (ret)
>>> +		goto err_async;
>>> +
>>> +	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
>>> +					     0, 0);
>>> +	if (!ep) {
>>> +		dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
>>> +		ret = -ENOENT;
>>> +		goto err_async;
>>> +	}
>>> +	priv->sd.fwnode = ep;
> 
> I learned that an endpoint node is used for match in some drivers, including
> this one [2], while a device node is used in others including Xilinx one. :-)
> Hence they don't work with each other. I feel like this better be unified for
> interoperability. I understand it's not a problem of this patch, but maybe good
> to discuss?

Indeed, it becomes a requirement to match on endpoints to be able to
correctly identify which subdevice is matched.

Please try:

https://git.linuxtv.org/sailus/media_tree.git/commit/?h=fwnode-const&id=35c32d99b2c3f5086b911ec817926de9b7bc3b41


and let me know if it resolves your matching issues.

That's from 2017, so the patch itself may have bitrotted since and need
a refresh. Let me know if you have any difficulties applying and I'll
see about getting a refreshed patch posted to the mailing lists to
discuss this particular topic again.


>>> +
>>> +	ret = v4l2_async_register_subdev(&priv->sd);
>>> +	if (ret < 0) {
>>> +		dev_err(dev, "Unable to register subdevice\n");
>>> +		goto err_put_node;
>>> +	}
>>> +
>>> +	return 0;
>>> +
>>> +err_put_node:
>>> +	fwnode_handle_put(ep);
>>> +err_async:
>>> +	max9286_v4l2_notifier_unregister(priv);
>>> +
>>> +	return ret;
>>> +}
>>> +
>>> +static void max9286_v4l2_unregister(struct max9286_priv *priv)
>>> +{
>>> +	fwnode_handle_put(priv->sd.fwnode);
>>> +	v4l2_async_unregister_subdev(&priv->sd);
>>> +	max9286_v4l2_notifier_unregister(priv);
>>> +}
>>> +
>>> +/* -----------------------------------------------------------------------------
>>> + * Probe/Remove
>>> + */
>>> +
>>> +static int max9286_setup(struct max9286_priv *priv)
>>> +{
>>> +	/*
>>> +	 * Link ordering values for all enabled links combinations. Orders must
>>> +	 * be assigned sequentially from 0 to the number of enabled links
>>> +	 * without leaving any hole for disabled links. We thus assign orders to
>>> +	 * enabled links first, and use the remaining order values for disabled
>>> +	 * links are all links must have a different order value;
>>> +	 */
>>> +	static const u8 link_order[] = {
>>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
>>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
>>> +		(3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
>>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
>>> +		(3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
>>> +		(3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
>>> +		(3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
>>> +		(3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
>>> +		(0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
>>> +		(1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
>>> +		(1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
>>> +		(2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
>>> +		(1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
>>> +		(2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
>>> +		(2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
>>> +		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
>>> +	};
>>> +
>>> +	/*
>>> +	 * Set the I2C bus speed.
>>> +	 *
>>> +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
>>> +	 * only. This should be disabled after the mux is initialised.
>>> +	 */
>>> +	max9286_configure_i2c(priv, true);
>>> +
>>> +	/*
>>> +	 * Reverse channel setup.
>>> +	 *
>>> +	 * - Enable custom reverse channel configuration (through register 0x3f)
>>> +	 *   and set the first pulse length to 35 clock cycles.
>>> +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
>>> +	 *   high threshold enabled by the serializer driver.
>>> +	 */
>>> +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
>>> +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
>>> +		      MAX9286_REV_AMP_X);
>>> +	usleep_range(2000, 2500);
>>> +
>>> +	/*
>>> +	 * Enable GMSL links, mask unused ones and autodetect link
>>> +	 * used as CSI clock source.
>>> +	 */
>>> +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
>>> +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
>>> +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
>>> +
>>> +	/*
>>> +	 * Video format setup:
>>> +	 * Disable CSI output, VC is set according to Link number.
>>> +	 */
>>> +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
>>> +
>>> +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
>>> +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
>>> +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
>>> +		      MAX9286_DATATYPE_YUV422_8BIT);
>>> +
>>> +	/* Automatic: FRAMESYNC taken from the slowest Link. */
>>> +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
>>> +		      MAX9286_FSYNCMETH_AUTO);
>>> +
>>> +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
>>> +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
>>> +		      MAX9286_HVSRC_D14);
> 
> Some of these configs in fact need some handshake between serializer and
> de-serializer. For example, I had to invert vsync in serializer [3] to make
> it work with this patch.
> 
> In addition to that, I need a couple of additional programmings on max9286
> (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> oddly change reserved bits) to get frames. The datasheet doesn't explain
> enough for me to understand. I'm talking to Maxim to get more details and
> see if those can be handled by serilizer driver.

It seems Jacopo also had to disable the overlap window for the RDACM21:

https://jmondi.org/cgit/linux/commit/?h=gmsl/jmondi/platform/rdacm21&id=576bbaee7cc707869a0c5e90befd99c9e2cf754e

Please let us know if you hear back from Maxim.


> In a longer term, it'd be nice if such alignment between serializer and
> de-serializer is handled in more scalable way.

I agree, We are currently trying to tackle similar issues between our
two current cameras "RDACM20" and "RDACM21" which have different
requirements for the two configurations so we are trying to look at ways
to handle that too.

In particular we also need to handle:
 - Pixelrate control to determine CSI2 bus speed.
 - Link amplitude and threshold levels
 - Format differences

Are you still using the 'Sensing/Vision' (AR0231?) camera module that
Linaro were working with? (I currently have one, so let me know if you'd
like me to do any testing)


If they are of any use/reference to you, here are our current WIP
drivers for the RDACM20 [0] and RDACM21 [1] which Jacopo has been
developing which show how we currently separate the max9271 and sensor
packaging:


[0]
https://jmondi.org/cgit/linux/commit/?h=gmsl/jmondi/platform/rdacm21&id=d52329c6f2f7c07e5ad833f55f26ec0e329b0baf

[1]
https://jmondi.org/cgit/linux/commit/?h=gmsl/jmondi/platform/rdacm21&id=80dff408a63c22cda7da5f715968de8f2cbcbb35

(on branch
  https://jmondi.org/cgit/linux/log/?h=gmsl/jmondi/platform/rdacm21 )

Cheers

Kieran


> Thanks,
> -hyun
> 
> [1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
> [2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
> [3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
>
Hyun Kwon March 3, 2020, 7:43 p.m. UTC | #6
Hi Kieran,

On Mon, 2020-03-02 at 02:33:18 -0800, Kieran Bingham wrote:
> Hi Hyun,
> 
> On 28/02/2020 18:13, Hyun Kwon wrote:
> > Hi Kieran,
> > 
> > Thanks for sharing a patch.
> > 
> > Sorry for late response. I'm trying this driver along with Xilinx MIPI
> > pipeline and GMSL sensors with max96705. I wanted to confirm a few things
> > before replying. It's still on going, but replying before it gets too late.
> > Mostly it's questions and looking for some input.
> 
> Not too late at all.
> 
> We're very pleased to get input from other users and system configurations!
> 
> 
> > On Fri, 2020-02-14 at 03:54:19 -0800, Kieran Bingham wrote:
> >> Small update,
> >>
> >> On 14/02/2020 10:31, Kieran Bingham wrote:
> >>> The MAX9286 is a 4-channel GMSL deserializer with coax or STP input and
> >>> CSI-2 output. The device supports multicamera streaming applications,
> >>> and features the ability to synchronise the attached cameras.
> >>>

[snip]

> >>> +// SPDX-License-Identifier: GPL-2.0+
> >>> +/*
> >>> + * Maxim MAX9286 GMSL Deserializer Driver
> >>> + *
> > 
> > [snip]
> > 
> >>> +
> >>> +static const struct v4l2_async_notifier_operations max9286_notify_ops = {
> >>> +	.bound = max9286_notify_bound,
> >>> +	.unbind = max9286_notify_unbind,
> >>> +};
> >>> +
> >>> +static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
> >>> +{
> >>> +	struct device *dev = &priv->client->dev;
> >>> +	struct max9286_source *source = NULL;
> >>> +	int ret;
> >>> +
> >>> +	if (!priv->nsources)
> >>> +		return 0;
> >>> +
> >>> +	v4l2_async_notifier_init(&priv->notifier);
> >>> +
> >>> +	for_each_source(priv, source) {
> >>> +		unsigned int i = to_index(priv, source);
> >>> +
> >>> +		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
> >>> +		source->asd.match.fwnode = source->fwnode;
> >>> +
> >>> +		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
> >>> +						     &source->asd);
> >>> +		if (ret) {
> >>> +			dev_err(dev, "Failed to add subdev for source %d", i);
> >>> +			v4l2_async_notifier_cleanup(&priv->notifier);
> >>> +			return ret;
> >>> +		}
> >>> +
> >>> +		/*
> >>> +		 * Balance the reference counting handled through
> >>> +		 * v4l2_async_notifier_cleanup()
> >>> +		 */
> >>> +		fwnode_handle_get(source->fwnode);
> >>> +	}
> >>> +
> >>> +	priv->notifier.ops = &max9286_notify_ops;
> >>> +
> >>> +	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
> >>> +	if (ret) {
> >>> +		dev_err(dev, "Failed to register subdev_notifier");
> >>> +		v4l2_async_notifier_cleanup(&priv->notifier);
> >>> +		return ret;
> >>> +	}
> >>> +
> >>> +	return 0;
> >>> +}
> > 
> > This was giving me some touble because this subdev notifier chain is a part
> > of a bigger graph (Xilinx Video pipeline graph). Those are defined using
> > same graph bindings, hence conflicting each other. For now, in order to 
> > work around, I'm calling bound of subdev notifier if there's any match 
> > already in parent's done list [1]. Do you have any input how this should be
> > handled properly?
> 
> I suspect that it is likely your existing framework is matching at the
> device level instead of the endpoint level, as it sounds like a topic we
> hit on both this GMSL implementation and the ADV748x, but I'll have to
> take a deeper look to be sure.
> 

The problem with subdev notifier is, for example, the Xilinx platform parses
and registers a notifier for the entire pipeline. The current single stream
(to be simpler for problem description) pipeline looks like,

	sensor -> serializer -> deserializer -> mipi -> scaler -> dma

If the max9286 registers the subdev notifier within the video dev notifier,
it never gets to match and notified because the bound subdev is already
moved out of subdev list to the notifier done list. I feel v4l2-async should
be able to identify this and complete the subdev notifier if it's already
a part of bigger one. Let me see if I can figure out any sensible fix.

> Matching should be done on endpoints, not devices as there could now be
> multiple 'endpoints' connected to a single device.
> 
> 
> The RCar-VIN platform now solely uses endpoint matching, and I believe
> we may have to work through other platforms to update to the same approach.
> 
> 
> A 'temporary' solution may be in the form of this patch:
> 
> https://git.linuxtv.org/sailus/media_tree.git/commit/?h=fwnode-const&id=35c32d99b2c3f5086b911ec817926de9b7bc3b41
> 
> Which I had mistakenly thought was already accepted for upstream but
> appears to have stalled.
> 
> I'll follow this up separately to see what we need to do here.
> 

This doesn't fix the issue completely, because the Xilinx platform layer uses
the asd match node assuming it's device node. I can fix the Xilinx platform
part. I'm going through some previous email threads / patches, trying to get
better context.

> 
> >>> +
> >>> +static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
> >>> +{
> >>> +	if (!priv->nsources)
> >>> +		return;
> >>> +
> >>> +	v4l2_async_notifier_unregister(&priv->notifier);
> >>> +	v4l2_async_notifier_cleanup(&priv->notifier);
> >>> +}
> >>> +
> > 
> > [snip]
> > 
> >>> +};
> >>> +

[snip]

> >>> +	/*
> >>> +	 * Reverse channel setup.
> >>> +	 *
> >>> +	 * - Enable custom reverse channel configuration (through register 0x3f)
> >>> +	 *   and set the first pulse length to 35 clock cycles.
> >>> +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> >>> +	 *   high threshold enabled by the serializer driver.
> >>> +	 */
> >>> +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> >>> +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> >>> +		      MAX9286_REV_AMP_X);
> >>> +	usleep_range(2000, 2500);
> >>> +
> >>> +	/*
> >>> +	 * Enable GMSL links, mask unused ones and autodetect link
> >>> +	 * used as CSI clock source.
> >>> +	 */
> >>> +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> >>> +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> >>> +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> >>> +
> >>> +	/*
> >>> +	 * Video format setup:
> >>> +	 * Disable CSI output, VC is set according to Link number.
> >>> +	 */
> >>> +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> >>> +
> >>> +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> >>> +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> >>> +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> >>> +		      MAX9286_DATATYPE_YUV422_8BIT);
> >>> +
> >>> +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> >>> +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> >>> +		      MAX9286_FSYNCMETH_AUTO);
> >>> +
> >>> +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> >>> +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> >>> +		      MAX9286_HVSRC_D14);
> > 
> > Some of these configs in fact need some handshake between serializer and
> > de-serializer. For example, I had to invert vsync in serializer [3] to make
> > it work with this patch.
> > 
> > In addition to that, I need a couple of additional programmings on max9286
> > (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> > oddly change reserved bits) to get frames. The datasheet doesn't explain
> > enough for me to understand. I'm talking to Maxim to get more details and
> > see if those can be handled by serilizer driver.
> 
> It seems Jacopo also had to disable the overlap window for the RDACM21:
> 
> https://jmondi.org/cgit/linux/commit/?h=gmsl/jmondi/platform/rdacm21&id=576bbaee7cc707869a0c5e90befd99c9e2cf754e
> 
> Please let us know if you hear back from Maxim.
> 
> 
> > In a longer term, it'd be nice if such alignment between serializer and
> > de-serializer is handled in more scalable way.
> 
> I agree, We are currently trying to tackle similar issues between our
> two current cameras "RDACM20" and "RDACM21" which have different
> requirements for the two configurations so we are trying to look at ways
> to handle that too.
> 
> In particular we also need to handle:
>  - Pixelrate control to determine CSI2 bus speed.
>  - Link amplitude and threshold levels
>  - Format differences
> 
> Are you still using the 'Sensing/Vision' (AR0231?) camera module that
> Linaro were working with? (I currently have one, so let me know if you'd
> like me to do any testing)
> 
> 
> If they are of any use/reference to you, here are our current WIP
> drivers for the RDACM20 [0] and RDACM21 [1] which Jacopo has been
> developing which show how we currently separate the max9271 and sensor
> packaging:

Thanks for pointers. I was able to google-search some of those drivers already,
but maybe this is latest.. :-) I also checked to get same sensors (vendor,
distributor,,, and IdeasOnBoard as well :-)), but it's not available anymore.

So the setup that I have now,

	AR0231 -> AP0202 ISP -> MAX96705 -> MAX9286 -> Xilinx MIPI -> Xilinx pipeline / DMA

Yesterday I was able to get correct frames, with some hacks and workarounds.
Only missing things from this max9286 driver for my setup are,
- disabling the overlap window
- programming 0x1c register. I believe lower bits have something to do with
three level BWS config, so changing from 0xf6 to 0xf4 changes from high
bandwidth mode to 24 bit mode. But I couldn't get it working with high bandwidth
mode (27 bit) yet.

I got some response from Maxim, but haven't found clarifications yet.
As mentioned above, what is the proposed way that is being looked for
this ser-des config, if any? I can try and align max96705 driver implementation
with it.

Thanks,
-hyun
Jacopo Mondi March 15, 2020, 11:15 p.m. UTC | #7
Hello Hyun, Kieran,
   it's great you are looking into this!

On Fri, Feb 28, 2020 at 10:13:04AM -0800, Hyun Kwon wrote:
> Hi Kieran,
>
> Thanks for sharing a patch.
>
[snip]

> > > +
> > > +	/*
> > > +	 * Set the I2C bus speed.
> > > +	 *
> > > +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> > > +	 * only. This should be disabled after the mux is initialised.
> > > +	 */
> > > +	max9286_configure_i2c(priv, true);
> > > +
> > > +	/*
> > > +	 * Reverse channel setup.
> > > +	 *
> > > +	 * - Enable custom reverse channel configuration (through register 0x3f)
> > > +	 *   and set the first pulse length to 35 clock cycles.
> > > +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> > > +	 *   high threshold enabled by the serializer driver.
> > > +	 */
> > > +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> > > +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> > > +		      MAX9286_REV_AMP_X);
> > > +	usleep_range(2000, 2500);
> > > +
> > > +	/*
> > > +	 * Enable GMSL links, mask unused ones and autodetect link
> > > +	 * used as CSI clock source.
> > > +	 */
> > > +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> > > +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> > > +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> > > +
> > > +	/*
> > > +	 * Video format setup:
> > > +	 * Disable CSI output, VC is set according to Link number.
> > > +	 */
> > > +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> > > +
> > > +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> > > +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> > > +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> > > +		      MAX9286_DATATYPE_YUV422_8BIT);
> > > +
> > > +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> > > +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> > > +		      MAX9286_FSYNCMETH_AUTO);
> > > +
> > > +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> > > +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> > > +		      MAX9286_HVSRC_D14);
>

I agree we need to make some of these configurable, we need that too
to handle both rdacm20 and 21.

> Some of these configs in fact need some handshake between serializer and
> de-serializer. For example, I had to invert vsync in serializer [3] to make
> it work with this patch.

Quickly skamming through the datasheet I'm surprised there is no way
to control the vsync input polarity and you have to go through the
crossbar :) Oh well, I think this could be well controlled through a
device property of the serializer, what do you think?

We have standard properties to control vsync and hsync polarities, but
they're usually used for output signals, and I would reserve them for
that future usage.. maybe a custom property to control the input vsync
and hsync polarities would do...

>
> In addition to that, I need a couple of additional programmings on max9286
> (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> oddly change reserved bits) to get frames. The datasheet doesn't explain
> enough for me to understand. I'm talking to Maxim to get more details and
> see if those can be handled by serilizer driver.

I would be really interested in knowing what's the overlap window control
about... it's very little detailed in the manual, I agree :) 0xf4 is
not even documented in my version. I assume it's something related to
fsync sync locking (Fig. 46) as I failed to achieve it without that
setting. How did it fail for you ?

On how to control overlap window a integer would do ? Setting it to 0
disables it, so we could use a boolean property for convenience..

Not knowing what it does I would be careful.. I think we should
actualy require a mandatory property, so all current dts select their
behaviour explicitly. If we later find out what it does we could
define a default behaviour by defining a boolean property. New dts
simpler and old dts still happy. What do you think ?

>
> In a longer term, it'd be nice if such alignment between serializer and
> de-serializer is handled in more scalable way.
>

Indeed :)

Thanks
  j

> Thanks,
> -hyun
>
> [1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
> [2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
> [3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
>
Hyun Kwon March 19, 2020, 1:07 a.m. UTC | #8
Hi Jacobo,

On Sun, 2020-03-15 at 16:15:17 -0700, Jacopo Mondi wrote:
> Hello Hyun, Kieran,
>    it's great you are looking into this!
> 
> On Fri, Feb 28, 2020 at 10:13:04AM -0800, Hyun Kwon wrote:
> > Hi Kieran,
> >
> > Thanks for sharing a patch.
> >
> [snip]
> 
> > > > +
> > > > +	/*
> > > > +	 * Set the I2C bus speed.
> > > > +	 *
> > > > +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> > > > +	 * only. This should be disabled after the mux is initialised.
> > > > +	 */
> > > > +	max9286_configure_i2c(priv, true);
> > > > +
> > > > +	/*
> > > > +	 * Reverse channel setup.
> > > > +	 *
> > > > +	 * - Enable custom reverse channel configuration (through register 0x3f)
> > > > +	 *   and set the first pulse length to 35 clock cycles.
> > > > +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> > > > +	 *   high threshold enabled by the serializer driver.
> > > > +	 */
> > > > +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> > > > +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> > > > +		      MAX9286_REV_AMP_X);
> > > > +	usleep_range(2000, 2500);
> > > > +
> > > > +	/*
> > > > +	 * Enable GMSL links, mask unused ones and autodetect link
> > > > +	 * used as CSI clock source.
> > > > +	 */
> > > > +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> > > > +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> > > > +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> > > > +
> > > > +	/*
> > > > +	 * Video format setup:
> > > > +	 * Disable CSI output, VC is set according to Link number.
> > > > +	 */
> > > > +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> > > > +
> > > > +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> > > > +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> > > > +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> > > > +		      MAX9286_DATATYPE_YUV422_8BIT);
> > > > +
> > > > +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> > > > +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> > > > +		      MAX9286_FSYNCMETH_AUTO);
> > > > +
> > > > +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> > > > +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> > > > +		      MAX9286_HVSRC_D14);
> >
> 
> I agree we need to make some of these configurable, we need that too
> to handle both rdacm20 and 21.
> 
> > Some of these configs in fact need some handshake between serializer and
> > de-serializer. For example, I had to invert vsync in serializer [3] to make
> > it work with this patch.
> 
> Quickly skamming through the datasheet I'm surprised there is no way
> to control the vsync input polarity and you have to go through the
> crossbar :) Oh well, I think this could be well controlled through a
> device property of the serializer, what do you think?
> 
> We have standard properties to control vsync and hsync polarities, but
> they're usually used for output signals, and I would reserve them for
> that future usage.. maybe a custom property to control the input vsync
> and hsync polarities would do...

Thanks for sharing pointers. These are not really hardened - static properties
so I'm not sure if device tree is the right place. I was thinking something
more similar to phy_configure_opts_mipi_dphy in phy subsystem.

> 
> >
> > In addition to that, I need a couple of additional programmings on max9286
> > (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> > oddly change reserved bits) to get frames. The datasheet doesn't explain
> > enough for me to understand. I'm talking to Maxim to get more details and
> > see if those can be handled by serilizer driver.
> 
> I would be really interested in knowing what's the overlap window control
> about... it's very little detailed in the manual, I agree :) 0xf4 is
> not even documented in my version. I assume it's something related to
> fsync sync locking (Fig. 46) as I failed to achieve it without that
> setting. How did it fail for you ?
> 

I received one doc "Frame Synchronization Block" that explains the overlap
window in more details. It's essentially a window between camera vsync and
frame sync. If those 2 don't happen within the window, it errors out. So it
gives a validation check, but may not work depending on the vsync patterm from
camera or the window should be bigger, which makes the validation less
useful in my opinion.

I believe 0x1c has something to do with BWS as mentioned in my previous reply.
The max9286 on my board sets BWS pin as open, and it makes the bandwidth
to be 27 bit mode by default. So writing 0xf4 to 0x1c register sets to 24 bit
mode (while 0xf6 = 27 bit mode). But I didn't hear back from Maxim regarding 
this yet. And unfortunately, I couldn't make it work with 27 bit mode on both
max9286 and max96705.

So this and similar properties may also be something that can be handled by
the negotiating call mentioned above, while the configuraton through external
pins can be modeled as device tree properties?

Thanks,
-hyun

> On how to control overlap window a integer would do ? Setting it to 0
> disables it, so we could use a boolean property for convenience..
> 
> Not knowing what it does I would be careful.. I think we should
> actualy require a mandatory property, so all current dts select their
> behaviour explicitly. If we later find out what it does we could
> define a default behaviour by defining a boolean property. New dts
> simpler and old dts still happy. What do you think ?
> 
> >
> > In a longer term, it'd be nice if such alignment between serializer and
> > de-serializer is handled in more scalable way.
> >
> 
> Indeed :)
> 
> Thanks
>   j
> 
> > Thanks,
> > -hyun
> >
> > [1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
> > [2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
> > [3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
> >
Jacopo Mondi March 19, 2020, 8:45 a.m. UTC | #9
Hi Hyun,

On Wed, Mar 18, 2020 at 06:07:35PM -0700, Hyun Kwon wrote:
> Hi Jacobo,
>
> On Sun, 2020-03-15 at 16:15:17 -0700, Jacopo Mondi wrote:
> > Hello Hyun, Kieran,
> >    it's great you are looking into this!
> >
> > On Fri, Feb 28, 2020 at 10:13:04AM -0800, Hyun Kwon wrote:
> > > Hi Kieran,
> > >
> > > Thanks for sharing a patch.
> > >
> > [snip]
> >
> > > > > +
> > > > > +	/*
> > > > > +	 * Set the I2C bus speed.
> > > > > +	 *
> > > > > +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> > > > > +	 * only. This should be disabled after the mux is initialised.
> > > > > +	 */
> > > > > +	max9286_configure_i2c(priv, true);
> > > > > +
> > > > > +	/*
> > > > > +	 * Reverse channel setup.
> > > > > +	 *
> > > > > +	 * - Enable custom reverse channel configuration (through register 0x3f)
> > > > > +	 *   and set the first pulse length to 35 clock cycles.
> > > > > +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> > > > > +	 *   high threshold enabled by the serializer driver.
> > > > > +	 */
> > > > > +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> > > > > +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> > > > > +		      MAX9286_REV_AMP_X);
> > > > > +	usleep_range(2000, 2500);
> > > > > +
> > > > > +	/*
> > > > > +	 * Enable GMSL links, mask unused ones and autodetect link
> > > > > +	 * used as CSI clock source.
> > > > > +	 */
> > > > > +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> > > > > +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> > > > > +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> > > > > +
> > > > > +	/*
> > > > > +	 * Video format setup:
> > > > > +	 * Disable CSI output, VC is set according to Link number.
> > > > > +	 */
> > > > > +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> > > > > +
> > > > > +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> > > > > +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> > > > > +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> > > > > +		      MAX9286_DATATYPE_YUV422_8BIT);
> > > > > +
> > > > > +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> > > > > +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> > > > > +		      MAX9286_FSYNCMETH_AUTO);
> > > > > +
> > > > > +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> > > > > +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> > > > > +		      MAX9286_HVSRC_D14);
> > >
> >
> > I agree we need to make some of these configurable, we need that too
> > to handle both rdacm20 and 21.
> >
> > > Some of these configs in fact need some handshake between serializer and
> > > de-serializer. For example, I had to invert vsync in serializer [3] to make
> > > it work with this patch.
> >
> > Quickly skamming through the datasheet I'm surprised there is no way
> > to control the vsync input polarity and you have to go through the
> > crossbar :) Oh well, I think this could be well controlled through a
> > device property of the serializer, what do you think?
> >
> > We have standard properties to control vsync and hsync polarities, but
> > they're usually used for output signals, and I would reserve them for
> > that future usage.. maybe a custom property to control the input vsync
> > and hsync polarities would do...
>
> Thanks for sharing pointers. These are not really hardened - static properties
> so I'm not sure if device tree is the right place. I was thinking something
> more similar to phy_configure_opts_mipi_dphy in phy subsystem.

Let's take a step back, as it seems I was confused as well.

Not knowing the device, I can only guess on why you need to invert
the input VSYNC signal in the cross-bar. I see two options:

1) Looking at Figure 1 (Functional block diagram) the sensor vsync signal
is fed to the video timing generation circtuit. The cross-bar switch
comes after the timing generation circuit, and inverting vsync there
is then equivalent to invert the vsync output of the timing generation
block. If that's the case, instead of going through the crossbar,
the same result can be obtained by setting the VSYNC_INV bit of
register cxtp (0x4d[3]). If that's the case, I agree this setting
should be negotiated between ser/desr, as the VS_OUT signal in Figure
18 is inverted in the serialized byte stream. Is this the case ?

2) Alternatively, you need to invert the input vsync polarity to trigger
the timing generation circuit. This mean vsync is inverted -before-
being fed to timing generation, and this was my first understanding,
as I assumed the crossbar switch come -before- the timing generation
circtuitry. If this is the case, this setting should not be negotiated
between ser/deser but between the serializer and the connected camera
sensor.

Which case are you trying to address ?

>
> >
> > >
> > > In addition to that, I need a couple of additional programmings on max9286
> > > (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> > > oddly change reserved bits) to get frames. The datasheet doesn't explain
> > > enough for me to understand. I'm talking to Maxim to get more details and
> > > see if those can be handled by serilizer driver.
> >
> > I would be really interested in knowing what's the overlap window control
> > about... it's very little detailed in the manual, I agree :) 0xf4 is
> > not even documented in my version. I assume it's something related to
> > fsync sync locking (Fig. 46) as I failed to achieve it without that
> > setting. How did it fail for you ?
> >
>
> I received one doc "Frame Synchronization Block" that explains the overlap
> window in more details. It's essentially a window between camera vsync and
> frame sync. If those 2 don't happen within the window, it errors out. So it
> gives a validation check, but may not work depending on the vsync patterm from
> camera or the window should be bigger, which makes the validation less
> useful in my opinion.

Thanks for the detailed info!

This reinforces the idea this setting should be disabled by default.
If we want to enable it, a value should be provided explicitly. I
still think DTS are the right place for this setting, as this is a
deserializer-only configuration parameter..

>
> I believe 0x1c has something to do with BWS as mentioned in my previous reply.
> The max9286 on my board sets BWS pin as open, and it makes the bandwidth
> to be 27 bit mode by default. So writing 0xf4 to 0x1c register sets to 24 bit
> mode (while 0xf6 = 27 bit mode). But I didn't hear back from Maxim regarding
> this yet. And unfortunately, I couldn't make it work with 27 bit mode on both
> max9286 and max96705.
>
> So this and similar properties may also be something that can be handled by
> the negotiating call mentioned above, while the configuraton through external
> pins can be modeled as device tree properties?

Indeed external pin configuration fits well as DTS property. Would you
like to have a go ?

Thanks
   j

>
> Thanks,
> -hyun
>
> > On how to control overlap window a integer would do ? Setting it to 0
> > disables it, so we could use a boolean property for convenience..
> >
> > Not knowing what it does I would be careful.. I think we should
> > actualy require a mandatory property, so all current dts select their
> > behaviour explicitly. If we later find out what it does we could
> > define a default behaviour by defining a boolean property. New dts
> > simpler and old dts still happy. What do you think ?
> >
> > >
> > > In a longer term, it'd be nice if such alignment between serializer and
> > > de-serializer is handled in more scalable way.
> > >
> >
> > Indeed :)
> >
> > Thanks
> >   j
> >
> > > Thanks,
> > > -hyun
> > >
> > > [1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
> > > [2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
> > > [3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
> > >
Hyun Kwon March 19, 2020, 11:20 p.m. UTC | #10
Hi Jacopo,

On Thu, 2020-03-19 at 01:45:57 -0700, Jacopo Mondi wrote:
> Hi Hyun,
> 
> On Wed, Mar 18, 2020 at 06:07:35PM -0700, Hyun Kwon wrote:
> > Hi Jacobo,
> >
> > On Sun, 2020-03-15 at 16:15:17 -0700, Jacopo Mondi wrote:
> > > Hello Hyun, Kieran,
> > >    it's great you are looking into this!
> > >
> > > On Fri, Feb 28, 2020 at 10:13:04AM -0800, Hyun Kwon wrote:
> > > > Hi Kieran,
> > > >
> > > > Thanks for sharing a patch.
> > > >
> > > [snip]
> > >
> > > > > > +
> > > > > > +	/*
> > > > > > +	 * Set the I2C bus speed.
> > > > > > +	 *
> > > > > > +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> > > > > > +	 * only. This should be disabled after the mux is initialised.
> > > > > > +	 */
> > > > > > +	max9286_configure_i2c(priv, true);
> > > > > > +
> > > > > > +	/*
> > > > > > +	 * Reverse channel setup.
> > > > > > +	 *
> > > > > > +	 * - Enable custom reverse channel configuration (through register 0x3f)
> > > > > > +	 *   and set the first pulse length to 35 clock cycles.
> > > > > > +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> > > > > > +	 *   high threshold enabled by the serializer driver.
> > > > > > +	 */
> > > > > > +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> > > > > > +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> > > > > > +		      MAX9286_REV_AMP_X);
> > > > > > +	usleep_range(2000, 2500);
> > > > > > +
> > > > > > +	/*
> > > > > > +	 * Enable GMSL links, mask unused ones and autodetect link
> > > > > > +	 * used as CSI clock source.
> > > > > > +	 */
> > > > > > +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> > > > > > +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> > > > > > +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> > > > > > +
> > > > > > +	/*
> > > > > > +	 * Video format setup:
> > > > > > +	 * Disable CSI output, VC is set according to Link number.
> > > > > > +	 */
> > > > > > +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> > > > > > +
> > > > > > +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> > > > > > +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> > > > > > +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> > > > > > +		      MAX9286_DATATYPE_YUV422_8BIT);
> > > > > > +
> > > > > > +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> > > > > > +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> > > > > > +		      MAX9286_FSYNCMETH_AUTO);
> > > > > > +
> > > > > > +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> > > > > > +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> > > > > > +		      MAX9286_HVSRC_D14);
> > > >
> > >
> > > I agree we need to make some of these configurable, we need that too
> > > to handle both rdacm20 and 21.
> > >
> > > > Some of these configs in fact need some handshake between serializer and
> > > > de-serializer. For example, I had to invert vsync in serializer [3] to make
> > > > it work with this patch.
> > >
> > > Quickly skamming through the datasheet I'm surprised there is no way
> > > to control the vsync input polarity and you have to go through the
> > > crossbar :) Oh well, I think this could be well controlled through a
> > > device property of the serializer, what do you think?
> > >
> > > We have standard properties to control vsync and hsync polarities, but
> > > they're usually used for output signals, and I would reserve them for
> > > that future usage.. maybe a custom property to control the input vsync
> > > and hsync polarities would do...
> >
> > Thanks for sharing pointers. These are not really hardened - static properties
> > so I'm not sure if device tree is the right place. I was thinking something
> > more similar to phy_configure_opts_mipi_dphy in phy subsystem.
> 
> Let's take a step back, as it seems I was confused as well.
> 
> Not knowing the device, I can only guess on why you need to invert
> the input VSYNC signal in the cross-bar. I see two options:
> 
> 1) Looking at Figure 1 (Functional block diagram) the sensor vsync signal
> is fed to the video timing generation circtuit. The cross-bar switch
> comes after the timing generation circuit, and inverting vsync there
> is then equivalent to invert the vsync output of the timing generation
> block. If that's the case, instead of going through the crossbar,
> the same result can be obtained by setting the VSYNC_INV bit of
> register cxtp (0x4d[3]). If that's the case, I agree this setting
> should be negotiated between ser/desr, as the VS_OUT signal in Figure
> 18 is inverted in the serialized byte stream. Is this the case ?
> 
> 2) Alternatively, you need to invert the input vsync polarity to trigger
> the timing generation circuit. This mean vsync is inverted -before-
> being fed to timing generation, and this was my first understanding,
> as I assumed the crossbar switch come -before- the timing generation
> circtuitry. If this is the case, this setting should not be negotiated
> between ser/deser but between the serializer and the connected camera
> sensor.
> 
> Which case are you trying to address ?
> 

My case is simpler in fact :-), hence the executive summary is,
The sensor vsync signal is active high, and it passes through the serializer.
Since the vsync is already inverted in de-serializer by this patch, expecting
active low, I'm inverting it again in serializer to match.

	sensor -- (vsync active high) --> serializer -- (vsync active low) --> de-serializer
    
If the vsync inversion becomes a device tree property of max9286, the property
value will have to align with polarity of vsync source. In my case, I can
disable the inversion knowing the sensor vsync is active high. But in other
cases, such chain can be quite deep and may be inconvinient for users to check.

Another one is the BWS setting, which is just between ser and de-ser.

With mbus_get_config() operation, the problem can be isolated nicely in
my opinion, and the solution handles all above and scales better.
- The de-serializer checks the vsync polarity of all channels using GMSL
  config. If all are active low, invert the vsync (if it can)

	vsync_bitmap = 0;
	for(chan : channels) {
		config = get_mbus_config(chan);
		if (config->type != gmsl)
			error;

		if (config->gmsl.vsync == +)
			vsync_bitmap |= << chan->chan_id;
	}

	if (vsync_bitmap == (1 << channels.size() - 1))
		nop(); // all active high. don't invert
	else if (vsync_bitmap == 0)
		invert_vsync(ser);
	else
		error;

- The serializer checks vsync polarity in the parallel port config, and
  if it's active low (and if it can), invert to make it active high.
  Otherwise mark it in GMSL config, so the de-serializer can hanle.

	max96705_get_mbus_config()
	{
		config = get_mbus_config(sensor);
		if (config->type != parallel)
			error;

		if (config->parallel.vsync == -) {
			if (invert_vsync(ser))
				ser_config->gmsl.vsync = +;
			else
				ser_config->gmsl.vsync = -;
		}

		return ser_config;
	}

The same can be used for bandwidth setting. The max96705 driver sets 24 bit
mode only as supported bandwidth. The deserializer driver can pick it up from
mbus_get_config(), and adjust its own config accordingly. It will need some
remote node handling in each driver, but seems worth to me.

This became too lengthy! Hope it explains better and aligns with your thought,
described in other thread. I will give it a try too!

Thanks,
-hyun

> >
> > >
> > > >
> > > > In addition to that, I need a couple of additional programmings on max9286
> > > > (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> > > > oddly change reserved bits) to get frames. The datasheet doesn't explain
> > > > enough for me to understand. I'm talking to Maxim to get more details and
> > > > see if those can be handled by serilizer driver.
> > >
> > > I would be really interested in knowing what's the overlap window control
> > > about... it's very little detailed in the manual, I agree :) 0xf4 is
> > > not even documented in my version. I assume it's something related to
> > > fsync sync locking (Fig. 46) as I failed to achieve it without that
> > > setting. How did it fail for you ?
> > >
> >
> > I received one doc "Frame Synchronization Block" that explains the overlap
> > window in more details. It's essentially a window between camera vsync and
> > frame sync. If those 2 don't happen within the window, it errors out. So it
> > gives a validation check, but may not work depending on the vsync patterm from
> > camera or the window should be bigger, which makes the validation less
> > useful in my opinion.
> 
> Thanks for the detailed info!
> 
> This reinforces the idea this setting should be disabled by default.
> If we want to enable it, a value should be provided explicitly. I
> still think DTS are the right place for this setting, as this is a
> deserializer-only configuration parameter..
> 
> >
> > I believe 0x1c has something to do with BWS as mentioned in my previous reply.
> > The max9286 on my board sets BWS pin as open, and it makes the bandwidth
> > to be 27 bit mode by default. So writing 0xf4 to 0x1c register sets to 24 bit
> > mode (while 0xf6 = 27 bit mode). But I didn't hear back from Maxim regarding
> > this yet. And unfortunately, I couldn't make it work with 27 bit mode on both
> > max9286 and max96705.
> >
> > So this and similar properties may also be something that can be handled by
> > the negotiating call mentioned above, while the configuraton through external
> > pins can be modeled as device tree properties?
> 
> Indeed external pin configuration fits well as DTS property. Would you
> like to have a go ?
> 
> Thanks
>    j
> 
> >
> > Thanks,
> > -hyun
> >
> > > On how to control overlap window a integer would do ? Setting it to 0
> > > disables it, so we could use a boolean property for convenience..
> > >
> > > Not knowing what it does I would be careful.. I think we should
> > > actualy require a mandatory property, so all current dts select their
> > > behaviour explicitly. If we later find out what it does we could
> > > define a default behaviour by defining a boolean property. New dts
> > > simpler and old dts still happy. What do you think ?
> > >
> > > >
> > > > In a longer term, it'd be nice if such alignment between serializer and
> > > > de-serializer is handled in more scalable way.
> > > >
> > >
> > > Indeed :)
> > >
> > > Thanks
> > >   j
> > >
> > > > Thanks,
> > > > -hyun
> > > >
> > > > [1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
> > > > [2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
> > > > [3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
> > > >
Hyun Kwon March 26, 2020, 1:12 a.m. UTC | #11
Hi Jacopo,

On Thu, 2020-03-19 at 16:20:05 -0700, Hyun Kwon wrote:
> Hi Jacopo,
> 
> On Thu, 2020-03-19 at 01:45:57 -0700, Jacopo Mondi wrote:
> > Hi Hyun,
> > 
> > On Wed, Mar 18, 2020 at 06:07:35PM -0700, Hyun Kwon wrote:
> > > Hi Jacobo,
> > >
> > > On Sun, 2020-03-15 at 16:15:17 -0700, Jacopo Mondi wrote:
> > > > Hello Hyun, Kieran,
> > > >    it's great you are looking into this!
> > > >
> > > > On Fri, Feb 28, 2020 at 10:13:04AM -0800, Hyun Kwon wrote:
> > > > > Hi Kieran,
> > > > >
> > > > > Thanks for sharing a patch.
> > > > >
> > > > [snip]
> > > >
> > > > > > > +
> > > > > > > +	/*
> > > > > > > +	 * Set the I2C bus speed.
> > > > > > > +	 *
> > > > > > > +	 * Enable I2C Local Acknowledge during the probe sequences of the camera
> > > > > > > +	 * only. This should be disabled after the mux is initialised.
> > > > > > > +	 */
> > > > > > > +	max9286_configure_i2c(priv, true);
> > > > > > > +
> > > > > > > +	/*
> > > > > > > +	 * Reverse channel setup.
> > > > > > > +	 *
> > > > > > > +	 * - Enable custom reverse channel configuration (through register 0x3f)
> > > > > > > +	 *   and set the first pulse length to 35 clock cycles.
> > > > > > > +	 * - Increase the reverse channel amplitude to 170mV to accommodate the
> > > > > > > +	 *   high threshold enabled by the serializer driver.
> > > > > > > +	 */
> > > > > > > +	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
> > > > > > > +	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
> > > > > > > +		      MAX9286_REV_AMP_X);
> > > > > > > +	usleep_range(2000, 2500);
> > > > > > > +
> > > > > > > +	/*
> > > > > > > +	 * Enable GMSL links, mask unused ones and autodetect link
> > > > > > > +	 * used as CSI clock source.
> > > > > > > +	 */
> > > > > > > +	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
> > > > > > > +	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
> > > > > > > +	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
> > > > > > > +
> > > > > > > +	/*
> > > > > > > +	 * Video format setup:
> > > > > > > +	 * Disable CSI output, VC is set according to Link number.
> > > > > > > +	 */
> > > > > > > +	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
> > > > > > > +
> > > > > > > +	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
> > > > > > > +	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
> > > > > > > +		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
> > > > > > > +		      MAX9286_DATATYPE_YUV422_8BIT);
> > > > > > > +
> > > > > > > +	/* Automatic: FRAMESYNC taken from the slowest Link. */
> > > > > > > +	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
> > > > > > > +		      MAX9286_FSYNCMETH_AUTO);
> > > > > > > +
> > > > > > > +	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
> > > > > > > +	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
> > > > > > > +		      MAX9286_HVSRC_D14);
> > > > >
> > > >
> > > > I agree we need to make some of these configurable, we need that too
> > > > to handle both rdacm20 and 21.
> > > >
> > > > > Some of these configs in fact need some handshake between serializer and
> > > > > de-serializer. For example, I had to invert vsync in serializer [3] to make
> > > > > it work with this patch.
> > > >
> > > > Quickly skamming through the datasheet I'm surprised there is no way
> > > > to control the vsync input polarity and you have to go through the
> > > > crossbar :) Oh well, I think this could be well controlled through a
> > > > device property of the serializer, what do you think?
> > > >
> > > > We have standard properties to control vsync and hsync polarities, but
> > > > they're usually used for output signals, and I would reserve them for
> > > > that future usage.. maybe a custom property to control the input vsync
> > > > and hsync polarities would do...
> > >
> > > Thanks for sharing pointers. These are not really hardened - static properties
> > > so I'm not sure if device tree is the right place. I was thinking something
> > > more similar to phy_configure_opts_mipi_dphy in phy subsystem.
> > 
> > Let's take a step back, as it seems I was confused as well.
> > 
> > Not knowing the device, I can only guess on why you need to invert
> > the input VSYNC signal in the cross-bar. I see two options:
> > 
> > 1) Looking at Figure 1 (Functional block diagram) the sensor vsync signal
> > is fed to the video timing generation circtuit. The cross-bar switch
> > comes after the timing generation circuit, and inverting vsync there
> > is then equivalent to invert the vsync output of the timing generation
> > block. If that's the case, instead of going through the crossbar,
> > the same result can be obtained by setting the VSYNC_INV bit of
> > register cxtp (0x4d[3]). If that's the case, I agree this setting
> > should be negotiated between ser/desr, as the VS_OUT signal in Figure
> > 18 is inverted in the serialized byte stream. Is this the case ?
> > 
> > 2) Alternatively, you need to invert the input vsync polarity to trigger
> > the timing generation circuit. This mean vsync is inverted -before-
> > being fed to timing generation, and this was my first understanding,
> > as I assumed the crossbar switch come -before- the timing generation
> > circtuitry. If this is the case, this setting should not be negotiated
> > between ser/deser but between the serializer and the connected camera
> > sensor.
> > 
> > Which case are you trying to address ?
> > 
> 
> My case is simpler in fact :-), hence the executive summary is,
> The sensor vsync signal is active high, and it passes through the serializer.
> Since the vsync is already inverted in de-serializer by this patch, expecting
> active low, I'm inverting it again in serializer to match.
> 
> 	sensor -- (vsync active high) --> serializer -- (vsync active low) --> de-serializer
>     
> If the vsync inversion becomes a device tree property of max9286, the property
> value will have to align with polarity of vsync source. In my case, I can
> disable the inversion knowing the sensor vsync is active high. But in other
> cases, such chain can be quite deep and may be inconvinient for users to check.
> 
> Another one is the BWS setting, which is just between ser and de-ser.
> 
> With mbus_get_config() operation, the problem can be isolated nicely in
> my opinion, and the solution handles all above and scales better.
> - The de-serializer checks the vsync polarity of all channels using GMSL
>   config. If all are active low, invert the vsync (if it can)
> 
> 	vsync_bitmap = 0;
> 	for(chan : channels) {
> 		config = get_mbus_config(chan);
> 		if (config->type != gmsl)
> 			error;
> 
> 		if (config->gmsl.vsync == +)
> 			vsync_bitmap |= << chan->chan_id;
> 	}
> 
> 	if (vsync_bitmap == (1 << channels.size() - 1))
> 		nop(); // all active high. don't invert
> 	else if (vsync_bitmap == 0)
> 		invert_vsync(ser);
> 	else
> 		error;
> 
> - The serializer checks vsync polarity in the parallel port config, and
>   if it's active low (and if it can), invert to make it active high.
>   Otherwise mark it in GMSL config, so the de-serializer can hanle.
> 
> 	max96705_get_mbus_config()
> 	{
> 		config = get_mbus_config(sensor);
> 		if (config->type != parallel)
> 			error;
> 
> 		if (config->parallel.vsync == -) {
> 			if (invert_vsync(ser))
> 				ser_config->gmsl.vsync = +;
> 			else
> 				ser_config->gmsl.vsync = -;
> 		}
> 
> 		return ser_config;
> 	}
> 
> The same can be used for bandwidth setting. The max96705 driver sets 24 bit
> mode only as supported bandwidth. The deserializer driver can pick it up from
> mbus_get_config(), and adjust its own config accordingly. It will need some
> remote node handling in each driver, but seems worth to me.
> 
> This became too lengthy! Hope it explains better and aligns with your thought,
> described in other thread. I will give it a try too!
> 

And I got a chance to try.
- used the mbus config for sync between devices. Ex, vsync inversion in [1]
- made the overlap window of max9286 as a control in [2]
- some other configs using the mbus config in [3]
Let me know if this aligns with your thought.

Thanks,
-hyun

[1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/a1d812c0452905a644d83f715c43e91ade11b266
[2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/c3d55a9e0a8d2b67f27996529582bb7cfa551b6a
[3] https://github.com/xlnx-hyunkwon/linux-xlnx/commits/hyunk/vision-wip-5.4-next


> Thanks,
> -hyun
> 
> > >
> > > >
> > > > >
> > > > > In addition to that, I need a couple of additional programmings on max9286
> > > > > (registers 0x0 to 0x63/0x64- disable overlap window and 0xf4 to 0x1c which
> > > > > oddly change reserved bits) to get frames. The datasheet doesn't explain
> > > > > enough for me to understand. I'm talking to Maxim to get more details and
> > > > > see if those can be handled by serilizer driver.
> > > >
> > > > I would be really interested in knowing what's the overlap window control
> > > > about... it's very little detailed in the manual, I agree :) 0xf4 is
> > > > not even documented in my version. I assume it's something related to
> > > > fsync sync locking (Fig. 46) as I failed to achieve it without that
> > > > setting. How did it fail for you ?
> > > >
> > >
> > > I received one doc "Frame Synchronization Block" that explains the overlap
> > > window in more details. It's essentially a window between camera vsync and
> > > frame sync. If those 2 don't happen within the window, it errors out. So it
> > > gives a validation check, but may not work depending on the vsync patterm from
> > > camera or the window should be bigger, which makes the validation less
> > > useful in my opinion.
> > 
> > Thanks for the detailed info!
> > 
> > This reinforces the idea this setting should be disabled by default.
> > If we want to enable it, a value should be provided explicitly. I
> > still think DTS are the right place for this setting, as this is a
> > deserializer-only configuration parameter..
> > 
> > >
> > > I believe 0x1c has something to do with BWS as mentioned in my previous reply.
> > > The max9286 on my board sets BWS pin as open, and it makes the bandwidth
> > > to be 27 bit mode by default. So writing 0xf4 to 0x1c register sets to 24 bit
> > > mode (while 0xf6 = 27 bit mode). But I didn't hear back from Maxim regarding
> > > this yet. And unfortunately, I couldn't make it work with 27 bit mode on both
> > > max9286 and max96705.
> > >
> > > So this and similar properties may also be something that can be handled by
> > > the negotiating call mentioned above, while the configuraton through external
> > > pins can be modeled as device tree properties?
> > 
> > Indeed external pin configuration fits well as DTS property. Would you
> > like to have a go ?
> > 
> > Thanks
> >    j
> > 
> > >
> > > Thanks,
> > > -hyun
> > >
> > > > On how to control overlap window a integer would do ? Setting it to 0
> > > > disables it, so we could use a boolean property for convenience..
> > > >
> > > > Not knowing what it does I would be careful.. I think we should
> > > > actualy require a mandatory property, so all current dts select their
> > > > behaviour explicitly. If we later find out what it does we could
> > > > define a default behaviour by defining a boolean property. New dts
> > > > simpler and old dts still happy. What do you think ?
> > > >
> > > > >
> > > > > In a longer term, it'd be nice if such alignment between serializer and
> > > > > de-serializer is handled in more scalable way.
> > > > >
> > > >
> > > > Indeed :)
> > > >
> > > > Thanks
> > > >   j
> > > >
> > > > > Thanks,
> > > > > -hyun
> > > > >
> > > > > [1] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/3bd2dded834492f4ee89e370c22877b97c2e106e
> > > > > [2] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fb0ad7fd699d90d6bbc78fc55dd98639389cfc5b
> > > > > [3] https://github.com/xlnx-hyunkwon/linux-xlnx/commit/fe0b33b174b2850bf0bb25b3a367319127ae12ee
> > > > >

Patch
diff mbox series

diff --git a/MAINTAINERS b/MAINTAINERS
index 983d3c97edd1..148706353d25 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -10033,6 +10033,16 @@  F:	Documentation/devicetree/bindings/hwmon/max6697.txt
 F:	drivers/hwmon/max6697.c
 F:	include/linux/platform_data/max6697.h
 
+MAX9286 QUAD GMSL DESERIALIZER DRIVER
+M:	Jacopo Mondi <jacopo+renesas@jmondi.org>
+M:	Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
+M:	Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com>
+M:	Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
+L:	linux-media@vger.kernel.org
+S:	Maintained
+F:	Documentation/devicetree/bindings/media/i2c/maxim,max9286.yaml
+F:	drivers/media/i2c/max9286.c
+
 MAX9860 MONO AUDIO VOICE CODEC DRIVER
 M:	Peter Rosin <peda@axentia.se>
 L:	alsa-devel@alsa-project.org (moderated for non-subscribers)
diff --git a/drivers/media/i2c/Kconfig b/drivers/media/i2c/Kconfig
index c68e002d26ea..32a4deb90617 100644
--- a/drivers/media/i2c/Kconfig
+++ b/drivers/media/i2c/Kconfig
@@ -442,6 +442,17 @@  config VIDEO_VPX3220
 	  To compile this driver as a module, choose M here: the
 	  module will be called vpx3220.
 
+config VIDEO_MAX9286
+	tristate "Maxim MAX9286 GMSL deserializer support"
+	depends on I2C && I2C_MUX
+	depends on VIDEO_V4L2_SUBDEV_API && MEDIA_CONTROLLER
+	select V4L2_FWNODE
+	help
+	  This driver supports the Maxim MAX9286 GMSL deserializer.
+
+	  To compile this driver as a module, choose M here: the
+	  module will be called max9286.
+
 comment "Video and audio decoders"
 
 config VIDEO_SAA717X
diff --git a/drivers/media/i2c/Makefile b/drivers/media/i2c/Makefile
index c147bb9d28db..8896cf8bfc4f 100644
--- a/drivers/media/i2c/Makefile
+++ b/drivers/media/i2c/Makefile
@@ -117,5 +117,6 @@  obj-$(CONFIG_VIDEO_IMX290)	+= imx290.o
 obj-$(CONFIG_VIDEO_IMX319)	+= imx319.o
 obj-$(CONFIG_VIDEO_IMX355)	+= imx355.o
 obj-$(CONFIG_VIDEO_ST_MIPID02) += st-mipid02.o
+obj-$(CONFIG_VIDEO_MAX9286)	+= max9286.o
 
 obj-$(CONFIG_SDR_MAX2175) += max2175.o
diff --git a/drivers/media/i2c/max9286.c b/drivers/media/i2c/max9286.c
new file mode 100644
index 000000000000..a20829297ef6
--- /dev/null
+++ b/drivers/media/i2c/max9286.c
@@ -0,0 +1,1278 @@ 
+// SPDX-License-Identifier: GPL-2.0+
+/*
+ * Maxim MAX9286 GMSL Deserializer Driver
+ *
+ * Copyright (C) 2017-2019 Jacopo Mondi
+ * Copyright (C) 2017-2019 Kieran Bingham
+ * Copyright (C) 2017-2019 Laurent Pinchart
+ * Copyright (C) 2017-2019 Niklas Söderlund
+ * Copyright (C) 2016 Renesas Electronics Corporation
+ * Copyright (C) 2015 Cogent Embedded, Inc.
+ */
+
+#include <linux/delay.h>
+#include <linux/device.h>
+#include <linux/fwnode.h>
+#include <linux/gpio/consumer.h>
+#include <linux/gpio/driver.h>
+#include <linux/i2c.h>
+#include <linux/i2c-mux.h>
+#include <linux/module.h>
+#include <linux/of_graph.h>
+#include <linux/regulator/consumer.h>
+#include <linux/slab.h>
+
+#include <media/v4l2-async.h>
+#include <media/v4l2-ctrls.h>
+#include <media/v4l2-device.h>
+#include <media/v4l2-fwnode.h>
+#include <media/v4l2-subdev.h>
+
+/* Register 0x00 */
+#define MAX9286_MSTLINKSEL_AUTO		(7 << 5)
+#define MAX9286_MSTLINKSEL(n)		((n) << 5)
+#define MAX9286_EN_VS_GEN		BIT(4)
+#define MAX9286_LINKEN(n)		(1 << (n))
+/* Register 0x01 */
+#define MAX9286_FSYNCMODE_ECU		(3 << 6)
+#define MAX9286_FSYNCMODE_EXT		(2 << 6)
+#define MAX9286_FSYNCMODE_INT_OUT	(1 << 6)
+#define MAX9286_FSYNCMODE_INT_HIZ	(0 << 6)
+#define MAX9286_GPIEN			BIT(5)
+#define MAX9286_ENLMO_RSTFSYNC		BIT(2)
+#define MAX9286_FSYNCMETH_AUTO		(2 << 0)
+#define MAX9286_FSYNCMETH_SEMI_AUTO	(1 << 0)
+#define MAX9286_FSYNCMETH_MANUAL	(0 << 0)
+#define MAX9286_REG_FSYNC_PERIOD_L	0x06
+#define MAX9286_REG_FSYNC_PERIOD_M	0x07
+#define MAX9286_REG_FSYNC_PERIOD_H	0x08
+/* Register 0x0a */
+#define MAX9286_FWDCCEN(n)		(1 << ((n) + 4))
+#define MAX9286_REVCCEN(n)		(1 << (n))
+/* Register 0x0c */
+#define MAX9286_HVEN			BIT(7)
+#define MAX9286_EDC_6BIT_HAMMING	(2 << 5)
+#define MAX9286_EDC_6BIT_CRC		(1 << 5)
+#define MAX9286_EDC_1BIT_PARITY		(0 << 5)
+#define MAX9286_DESEL			BIT(4)
+#define MAX9286_INVVS			BIT(3)
+#define MAX9286_INVHS			BIT(2)
+#define MAX9286_HVSRC_D0		(2 << 0)
+#define MAX9286_HVSRC_D14		(1 << 0)
+#define MAX9286_HVSRC_D18		(0 << 0)
+/* Register 0x0f */
+#define MAX9286_0X0F_RESERVED		BIT(3)
+/* Register 0x12 */
+#define MAX9286_CSILANECNT(n)		(((n) - 1) << 6)
+#define MAX9286_CSIDBL			BIT(5)
+#define MAX9286_DBL			BIT(4)
+#define MAX9286_DATATYPE_USER_8BIT	(11 << 0)
+#define MAX9286_DATATYPE_USER_YUV_12BIT	(10 << 0)
+#define MAX9286_DATATYPE_USER_24BIT	(9 << 0)
+#define MAX9286_DATATYPE_RAW14		(8 << 0)
+#define MAX9286_DATATYPE_RAW11		(7 << 0)
+#define MAX9286_DATATYPE_RAW10		(6 << 0)
+#define MAX9286_DATATYPE_RAW8		(5 << 0)
+#define MAX9286_DATATYPE_YUV422_10BIT	(4 << 0)
+#define MAX9286_DATATYPE_YUV422_8BIT	(3 << 0)
+#define MAX9286_DATATYPE_RGB555		(2 << 0)
+#define MAX9286_DATATYPE_RGB565		(1 << 0)
+#define MAX9286_DATATYPE_RGB888		(0 << 0)
+/* Register 0x15 */
+#define MAX9286_VC(n)			((n) << 5)
+#define MAX9286_VCTYPE			BIT(4)
+#define MAX9286_CSIOUTEN		BIT(3)
+#define MAX9286_0X15_RESV		(3 << 0)
+/* Register 0x1b */
+#define MAX9286_SWITCHIN(n)		(1 << ((n) + 4))
+#define MAX9286_ENEQ(n)			(1 << (n))
+/* Register 0x27 */
+#define MAX9286_LOCKED			BIT(7)
+/* Register 0x31 */
+#define MAX9286_FSYNC_LOCKED		BIT(6)
+/* Register 0x34 */
+#define MAX9286_I2CLOCACK		BIT(7)
+#define MAX9286_I2CSLVSH_1046NS_469NS	(3 << 5)
+#define MAX9286_I2CSLVSH_938NS_352NS	(2 << 5)
+#define MAX9286_I2CSLVSH_469NS_234NS	(1 << 5)
+#define MAX9286_I2CSLVSH_352NS_117NS	(0 << 5)
+#define MAX9286_I2CMSTBT_837KBPS	(7 << 2)
+#define MAX9286_I2CMSTBT_533KBPS	(6 << 2)
+#define MAX9286_I2CMSTBT_339KBPS	(5 << 2)
+#define MAX9286_I2CMSTBT_173KBPS	(4 << 2)
+#define MAX9286_I2CMSTBT_105KBPS	(3 << 2)
+#define MAX9286_I2CMSTBT_84KBPS		(2 << 2)
+#define MAX9286_I2CMSTBT_28KBPS		(1 << 2)
+#define MAX9286_I2CMSTBT_8KBPS		(0 << 2)
+#define MAX9286_I2CSLVTO_NONE		(3 << 0)
+#define MAX9286_I2CSLVTO_1024US		(2 << 0)
+#define MAX9286_I2CSLVTO_256US		(1 << 0)
+#define MAX9286_I2CSLVTO_64US		(0 << 0)
+/* Register 0x3b */
+#define MAX9286_REV_TRF(n)		((n) << 4)
+#define MAX9286_REV_AMP(n)		((((n) - 30) / 10) << 1) /* in mV */
+#define MAX9286_REV_AMP_X		BIT(0)
+/* Register 0x3f */
+#define MAX9286_EN_REV_CFG		BIT(6)
+#define MAX9286_REV_FLEN(n)		((n) - 20)
+/* Register 0x49 */
+#define MAX9286_VIDEO_DETECT_MASK	0x0f
+/* Register 0x69 */
+#define MAX9286_LFLTBMONMASKED		BIT(7)
+#define MAX9286_LOCKMONMASKED		BIT(6)
+#define MAX9286_AUTOCOMBACKEN		BIT(5)
+#define MAX9286_AUTOMASKEN		BIT(4)
+#define MAX9286_MASKLINK(n)		((n) << 0)
+
+#define MAX9286_NUM_GMSL		4
+#define MAX9286_N_SINKS			4
+#define MAX9286_N_PADS			5
+#define MAX9286_SRC_PAD			4
+
+struct max9286_source {
+	struct v4l2_async_subdev asd;
+	struct v4l2_subdev *sd;
+	struct fwnode_handle *fwnode;
+};
+
+#define asd_to_max9286_source(_asd) \
+	container_of(_asd, struct max9286_source, asd)
+
+struct max9286_priv {
+	struct i2c_client *client;
+	struct gpio_desc *gpiod_pwdn;
+	struct v4l2_subdev sd;
+	struct media_pad pads[MAX9286_N_PADS];
+	struct regulator *regulator;
+	bool poc_enabled;
+
+	struct gpio_chip gpio;
+	u8 gpio_state;
+
+	struct i2c_mux_core *mux;
+	unsigned int mux_channel;
+	bool mux_open;
+
+	struct v4l2_ctrl_handler ctrls;
+
+	struct v4l2_mbus_framefmt fmt[MAX9286_N_SINKS];
+
+	unsigned int nsources;
+	unsigned int source_mask;
+	unsigned int route_mask;
+	unsigned int bound_sources;
+	unsigned int csi2_data_lanes;
+	struct max9286_source sources[MAX9286_NUM_GMSL];
+	struct v4l2_async_notifier notifier;
+};
+
+static struct max9286_source *next_source(struct max9286_priv *priv,
+					  struct max9286_source *source)
+{
+	if (!source)
+		source = &priv->sources[0];
+	else
+		source++;
+
+	for (; source < &priv->sources[MAX9286_NUM_GMSL]; source++) {
+		if (source->fwnode)
+			return source;
+	}
+
+	return NULL;
+}
+
+#define for_each_source(priv, source) \
+	for ((source) = NULL; ((source) = next_source((priv), (source))); )
+
+#define to_index(priv, source) ((source) - &(priv)->sources[0])
+
+static inline struct max9286_priv *sd_to_max9286(struct v4l2_subdev *sd)
+{
+	return container_of(sd, struct max9286_priv, sd);
+}
+
+/* -----------------------------------------------------------------------------
+ * I2C IO
+ */
+
+static int max9286_read(struct max9286_priv *priv, u8 reg)
+{
+	int ret;
+
+	ret = i2c_smbus_read_byte_data(priv->client, reg);
+	if (ret < 0)
+		dev_err(&priv->client->dev,
+			"%s: register 0x%02x read failed (%d)\n",
+			__func__, reg, ret);
+
+	return ret;
+}
+
+static int max9286_write(struct max9286_priv *priv, u8 reg, u8 val)
+{
+	int ret;
+
+	ret = i2c_smbus_write_byte_data(priv->client, reg, val);
+	if (ret < 0)
+		dev_err(&priv->client->dev,
+			"%s: register 0x%02x write failed (%d)\n",
+			__func__, reg, ret);
+
+	return ret;
+}
+
+/* -----------------------------------------------------------------------------
+ * I2C Multiplexer
+ */
+
+static void max9286_i2c_mux_configure(struct max9286_priv *priv, u8 conf)
+{
+	max9286_write(priv, 0x0a, conf);
+
+	/*
+	 * We must sleep after any change to the forward or reverse channel
+	 * configuration.
+	 */
+	usleep_range(3000, 5000);
+}
+
+static void max9286_i2c_mux_open(struct max9286_priv *priv)
+{
+	/* Open all channels on the MAX9286 */
+	max9286_i2c_mux_configure(priv, 0xff);
+
+	priv->mux_open = true;
+}
+
+static void max9286_i2c_mux_close(struct max9286_priv *priv)
+{
+	/*
+	 * Ensure that both the forward and reverse channel are disabled on the
+	 * mux, and that the channel ID is invalidated to ensure we reconfigure
+	 * on the next max9286_i2c_mux_select() call.
+	 */
+	max9286_i2c_mux_configure(priv, 0x00);
+
+	priv->mux_open = false;
+	priv->mux_channel = -1;
+}
+
+static int max9286_i2c_mux_select(struct i2c_mux_core *muxc, u32 chan)
+{
+	struct max9286_priv *priv = i2c_mux_priv(muxc);
+
+	/* Channel select is disabled when configured in the opened state. */
+	if (priv->mux_open)
+		return 0;
+
+	if (priv->mux_channel == chan)
+		return 0;
+
+	priv->mux_channel = chan;
+
+	max9286_i2c_mux_configure(priv,
+				  MAX9286_FWDCCEN(chan) |
+				  MAX9286_REVCCEN(chan));
+
+	return 0;
+}
+
+static int max9286_i2c_mux_init(struct max9286_priv *priv)
+{
+	struct max9286_source *source;
+	int ret;
+
+	if (!i2c_check_functionality(priv->client->adapter,
+				     I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
+		return -ENODEV;
+
+	priv->mux = i2c_mux_alloc(priv->client->adapter, &priv->client->dev,
+				  priv->nsources, 0, I2C_MUX_LOCKED,
+				  max9286_i2c_mux_select, NULL);
+	if (!priv->mux)
+		return -ENOMEM;
+
+	priv->mux->priv = priv;
+
+	for_each_source(priv, source) {
+		unsigned int index = to_index(priv, source);
+
+		ret = i2c_mux_add_adapter(priv->mux, 0, index, 0);
+		if (ret < 0)
+			goto error;
+	}
+
+	return 0;
+
+error:
+	i2c_mux_del_adapters(priv->mux);
+	return ret;
+}
+
+static void max9286_configure_i2c(struct max9286_priv *priv, bool localack)
+{
+	u8 config = MAX9286_I2CSLVSH_469NS_234NS | MAX9286_I2CSLVTO_1024US |
+		    MAX9286_I2CMSTBT_105KBPS;
+
+	if (localack)
+		config |= MAX9286_I2CLOCACK;
+
+	max9286_write(priv, 0x34, config);
+	usleep_range(3000, 5000);
+}
+
+/*
+ * max9286_check_video_links() - Make sure video links are detected and locked
+ *
+ * Performs safety checks on video link status. Make sure they are detected
+ * and all enabled links are locked.
+ *
+ * Returns 0 for success, -EIO for errors.
+ */
+static int max9286_check_video_links(struct max9286_priv *priv)
+{
+	unsigned int i;
+	int ret;
+
+	/*
+	 * Make sure valid video links are detected.
+	 * The delay is not characterized in de-serializer manual, wait up
+	 * to 5 ms.
+	 */
+	for (i = 0; i < 10; i++) {
+		ret = max9286_read(priv, 0x49);
+		if (ret < 0)
+			return -EIO;
+
+		if ((ret & MAX9286_VIDEO_DETECT_MASK) == priv->source_mask)
+			break;
+
+		usleep_range(350, 500);
+	}
+
+	if (i == 10) {
+		dev_err(&priv->client->dev,
+			"Unable to detect video links: 0x%02x\n", ret);
+		return -EIO;
+	}
+
+	/* Make sure all enabled links are locked (4ms max). */
+	for (i = 0; i < 10; i++) {
+		ret = max9286_read(priv, 0x27);
+		if (ret < 0)
+			return -EIO;
+
+		if (ret & MAX9286_LOCKED)
+			break;
+
+		usleep_range(350, 450);
+	}
+
+	if (i == 10) {
+		dev_err(&priv->client->dev, "Not all enabled links locked\n");
+		return -EIO;
+	}
+
+	return 0;
+}
+
+/*
+ * max9286_check_config_link() - Detect and wait for configuration links
+ *
+ * Determine if the configuration channel is up and settled for a link.
+ *
+ * Returns 0 for success, -EIO for errors.
+ */
+static int max9286_check_config_link(struct max9286_priv *priv,
+				     unsigned int source_mask)
+{
+	unsigned int conflink_mask = (source_mask & 0x0f) << 4;
+	unsigned int i;
+	int ret;
+
+	/*
+	 * Make sure requested configuration links are detected.
+	 * The delay is not characterized in the chip manual: wait up
+	 * to 5 milliseconds.
+	 */
+	for (i = 0; i < 10; i++) {
+		ret = max9286_read(priv, 0x49) & 0xf0;
+		if (ret < 0)
+			return -EIO;
+
+		if (ret == conflink_mask)
+			break;
+
+		usleep_range(350, 500);
+	}
+
+	if (ret != conflink_mask) {
+		dev_err(&priv->client->dev,
+			"Unable to detect configuration links: 0x%02x expected 0x%02x\n",
+			ret, conflink_mask);
+		return -EIO;
+	}
+
+	dev_info(&priv->client->dev,
+		 "Successfully detected configuration links after %u loops: 0x%02x\n",
+		 i, conflink_mask);
+
+	return 0;
+}
+
+/* -----------------------------------------------------------------------------
+ * V4L2 Subdev
+ */
+
+static int max9286_notify_bound(struct v4l2_async_notifier *notifier,
+				struct v4l2_subdev *subdev,
+				struct v4l2_async_subdev *asd)
+{
+	struct max9286_priv *priv = sd_to_max9286(notifier->sd);
+	struct max9286_source *source = asd_to_max9286_source(asd);
+	unsigned int index = to_index(priv, source);
+	unsigned int src_pad;
+	int ret;
+
+	ret = media_entity_get_fwnode_pad(&subdev->entity,
+					  source->fwnode,
+					  MEDIA_PAD_FL_SOURCE);
+	if (ret < 0) {
+		dev_err(&priv->client->dev,
+			"Failed to find pad for %s\n", subdev->name);
+		return ret;
+	}
+
+	priv->bound_sources |= BIT(index);
+	source->sd = subdev;
+	src_pad = ret;
+
+	ret = media_create_pad_link(&source->sd->entity, src_pad,
+				    &priv->sd.entity, index,
+				    MEDIA_LNK_FL_ENABLED |
+				    MEDIA_LNK_FL_IMMUTABLE);
+	if (ret) {
+		dev_err(&priv->client->dev,
+			"Unable to link %s:%u -> %s:%u\n",
+			source->sd->name, src_pad, priv->sd.name, index);
+		return ret;
+	}
+
+	dev_dbg(&priv->client->dev, "Bound %s pad: %u on index %u\n",
+		subdev->name, src_pad, index);
+
+	/*
+	 * We can only register v4l2_async_notifiers which do not provide a
+	 * means to register a complete callback. bound_sources allows us to
+	 * identify when all remove serializers have completed their probe.
+	 */
+	if (priv->bound_sources != priv->source_mask)
+		return 0;
+
+	/*
+	 * All enabled sources have probed and enabled their reverse control
+	 * channels:
+	 *
+	 * - Verify all configuration links are properly detected
+	 * - Disable auto-ack as communication on the control channel are now
+	 *   stable.
+	 */
+	max9286_check_config_link(priv, priv->source_mask);
+
+	/*
+	 * Re-configure I2C with local acknowledge disabled after cameras have
+	 * probed.
+	 */
+	max9286_configure_i2c(priv, false);
+
+	return 0;
+}
+
+static void max9286_notify_unbind(struct v4l2_async_notifier *notifier,
+				  struct v4l2_subdev *subdev,
+				  struct v4l2_async_subdev *asd)
+{
+	struct max9286_source *source = asd_to_max9286_source(asd);
+
+	source->sd = NULL;
+}
+
+static const struct v4l2_async_notifier_operations max9286_notify_ops = {
+	.bound = max9286_notify_bound,
+	.unbind = max9286_notify_unbind,
+};
+
+static int max9286_v4l2_notifier_register(struct max9286_priv *priv)
+{
+	struct device *dev = &priv->client->dev;
+	struct max9286_source *source = NULL;
+	int ret;
+
+	if (!priv->nsources)
+		return 0;
+
+	v4l2_async_notifier_init(&priv->notifier);
+
+	for_each_source(priv, source) {
+		unsigned int i = to_index(priv, source);
+
+		source->asd.match_type = V4L2_ASYNC_MATCH_FWNODE;
+		source->asd.match.fwnode = source->fwnode;
+
+		ret = v4l2_async_notifier_add_subdev(&priv->notifier,
+						     &source->asd);
+		if (ret) {
+			dev_err(dev, "Failed to add subdev for source %d", i);
+			v4l2_async_notifier_cleanup(&priv->notifier);
+			return ret;
+		}
+
+		/*
+		 * Balance the reference counting handled through
+		 * v4l2_async_notifier_cleanup()
+		 */
+		fwnode_handle_get(source->fwnode);
+	}
+
+	priv->notifier.ops = &max9286_notify_ops;
+
+	ret = v4l2_async_subdev_notifier_register(&priv->sd, &priv->notifier);
+	if (ret) {
+		dev_err(dev, "Failed to register subdev_notifier");
+		v4l2_async_notifier_cleanup(&priv->notifier);
+		return ret;
+	}
+
+	return 0;
+}
+
+static void max9286_v4l2_notifier_unregister(struct max9286_priv *priv)
+{
+	if (!priv->nsources)
+		return;
+
+	v4l2_async_notifier_unregister(&priv->notifier);
+	v4l2_async_notifier_cleanup(&priv->notifier);
+}
+
+static int max9286_s_stream(struct v4l2_subdev *sd, int enable)
+{
+	struct max9286_priv *priv = sd_to_max9286(sd);
+	struct max9286_source *source;
+	unsigned int i;
+	bool sync = false;
+	int ret;
+
+	if (enable) {
+		/*
+		 * The frame sync between cameras is transmitted across the
+		 * reverse channel as GPIO. We must open all channels while
+		 * streaming to allow this synchronisation signal to be shared.
+		 */
+		max9286_i2c_mux_open(priv);
+
+		/* Start all cameras. */
+		for_each_source(priv, source) {
+			ret = v4l2_subdev_call(source->sd, video, s_stream, 1);
+			if (ret)
+				return ret;
+		}
+
+		ret = max9286_check_video_links(priv);
+		if (ret)
+			return ret;
+
+		/*
+		 * Wait until frame synchronization is locked.
+		 *
+		 * Manual says frame sync locking should take ~6 VTS.
+		 * From practical experience at least 8 are required. Give
+		 * 12 complete frames time (~400ms at 30 fps) to achieve frame
+		 * locking before returning error.
+		 */
+		for (i = 0; i < 40; i++) {
+			if (max9286_read(priv, 0x31) & MAX9286_FSYNC_LOCKED) {
+				sync = true;
+				break;
+			}
+			usleep_range(9000, 11000);
+		}
+
+		if (!sync) {
+			dev_err(&priv->client->dev,
+				"Failed to get frame synchronization\n");
+			return -EXDEV; /* Invalid cross-device link */
+		}
+
+		/*
+		 * Enable CSI output, VC set according to link number.
+		 * Bit 7 must be set (chip manual says it's 0 and reserved).
+		 */
+		max9286_write(priv, 0x15, 0x80 | MAX9286_VCTYPE |
+			      MAX9286_CSIOUTEN | MAX9286_0X15_RESV);
+	} else {
+		max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
+
+		/* Stop all cameras. */
+		for_each_source(priv, source)
+			v4l2_subdev_call(source->sd, video, s_stream, 0);
+
+		max9286_i2c_mux_close(priv);
+	}
+
+	return 0;
+}
+
+static int max9286_enum_mbus_code(struct v4l2_subdev *sd,
+				  struct v4l2_subdev_pad_config *cfg,
+				  struct v4l2_subdev_mbus_code_enum *code)
+{
+	if (code->pad || code->index > 0)
+		return -EINVAL;
+
+	code->code = MEDIA_BUS_FMT_UYVY8_2X8;
+
+	return 0;
+}
+
+static struct v4l2_mbus_framefmt *
+max9286_get_pad_format(struct max9286_priv *priv,
+		       struct v4l2_subdev_pad_config *cfg,
+		       unsigned int pad, u32 which)
+{
+	switch (which) {
+	case V4L2_SUBDEV_FORMAT_TRY:
+		return v4l2_subdev_get_try_format(&priv->sd, cfg, pad);
+	case V4L2_SUBDEV_FORMAT_ACTIVE:
+		return &priv->fmt[pad];
+	default:
+		return NULL;
+	}
+}
+
+static int max9286_set_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *format)
+{
+	struct max9286_priv *priv = sd_to_max9286(sd);
+	struct v4l2_mbus_framefmt *cfg_fmt;
+
+	if (format->pad >= MAX9286_SRC_PAD)
+		return -EINVAL;
+
+	/* Refuse non YUV422 formats as we hardcode DT to 8 bit YUV422 */
+	switch (format->format.code) {
+	case MEDIA_BUS_FMT_UYVY8_2X8:
+	case MEDIA_BUS_FMT_VYUY8_2X8:
+	case MEDIA_BUS_FMT_YUYV8_2X8:
+	case MEDIA_BUS_FMT_YVYU8_2X8:
+		break;
+	default:
+		format->format.code = MEDIA_BUS_FMT_YUYV8_2X8;
+		break;
+	}
+
+	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
+	if (!cfg_fmt)
+		return -EINVAL;
+
+	*cfg_fmt = format->format;
+
+	return 0;
+}
+
+static int max9286_get_fmt(struct v4l2_subdev *sd,
+			   struct v4l2_subdev_pad_config *cfg,
+			   struct v4l2_subdev_format *format)
+{
+	struct max9286_priv *priv = sd_to_max9286(sd);
+	struct v4l2_mbus_framefmt *cfg_fmt;
+
+	if (format->pad >= MAX9286_SRC_PAD)
+		return -EINVAL;
+
+	cfg_fmt = max9286_get_pad_format(priv, cfg, format->pad, format->which);
+	if (!cfg_fmt)
+		return -EINVAL;
+
+	format->format = *cfg_fmt;
+
+	return 0;
+}
+
+static const struct v4l2_subdev_video_ops max9286_video_ops = {
+	.s_stream	= max9286_s_stream,
+};
+
+static const struct v4l2_subdev_pad_ops max9286_pad_ops = {
+	.enum_mbus_code = max9286_enum_mbus_code,
+	.get_fmt	= max9286_get_fmt,
+	.set_fmt	= max9286_set_fmt,
+};
+
+static const struct v4l2_subdev_ops max9286_subdev_ops = {
+	.video		= &max9286_video_ops,
+	.pad		= &max9286_pad_ops,
+};
+
+static void max9286_init_format(struct v4l2_mbus_framefmt *fmt)
+{
+	fmt->width		= 1280;
+	fmt->height		= 800;
+	fmt->code		= MEDIA_BUS_FMT_UYVY8_2X8;
+	fmt->colorspace		= V4L2_COLORSPACE_SRGB;
+	fmt->field		= V4L2_FIELD_NONE;
+	fmt->ycbcr_enc		= V4L2_YCBCR_ENC_DEFAULT;
+	fmt->quantization	= V4L2_QUANTIZATION_DEFAULT;
+	fmt->xfer_func		= V4L2_XFER_FUNC_DEFAULT;
+}
+
+static int max9286_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
+{
+	struct v4l2_mbus_framefmt *format;
+	unsigned int i;
+
+	for (i = 0; i < MAX9286_N_SINKS; i++) {
+		format = v4l2_subdev_get_try_format(subdev, fh->pad, i);
+		max9286_init_format(format);
+	}
+
+	return 0;
+}
+
+static const struct v4l2_subdev_internal_ops max9286_subdev_internal_ops = {
+	.open = max9286_open,
+};
+
+static int max9286_v4l2_register(struct max9286_priv *priv)
+{
+	struct device *dev = &priv->client->dev;
+	struct fwnode_handle *ep;
+	int ret;
+	int i;
+
+	/* Register v4l2 async notifiers for connected Camera subdevices */
+	ret = max9286_v4l2_notifier_register(priv);
+	if (ret) {
+		dev_err(dev, "Unable to register V4L2 async notifiers\n");
+		return ret;
+	}
+
+	/* Configure V4L2 for the MAX9286 itself */
+
+	v4l2_i2c_subdev_init(&priv->sd, priv->client, &max9286_subdev_ops);
+	priv->sd.internal_ops = &max9286_subdev_internal_ops;
+	priv->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+
+	v4l2_ctrl_handler_init(&priv->ctrls, 1);
+	/*
+	 * FIXME: Compute the real pixel rate. The 50 MP/s value comes from the
+	 * hardcoded frequency in the BSP CSI-2 receiver driver.
+	 */
+	v4l2_ctrl_new_std(&priv->ctrls, NULL, V4L2_CID_PIXEL_RATE,
+			  50000000, 50000000, 1, 50000000);
+	priv->sd.ctrl_handler = &priv->ctrls;
+	ret = priv->ctrls.error;
+	if (ret)
+		goto err_async;
+
+	priv->sd.entity.function = MEDIA_ENT_F_VID_IF_BRIDGE;
+
+	priv->pads[MAX9286_SRC_PAD].flags = MEDIA_PAD_FL_SOURCE;
+	for (i = 0; i < MAX9286_SRC_PAD; i++)
+		priv->pads[i].flags = MEDIA_PAD_FL_SINK;
+	ret = media_entity_pads_init(&priv->sd.entity, MAX9286_N_PADS,
+				     priv->pads);
+	if (ret)
+		goto err_async;
+
+	ep = fwnode_graph_get_endpoint_by_id(dev_fwnode(dev), MAX9286_SRC_PAD,
+					     0, 0);
+	if (!ep) {
+		dev_err(dev, "Unable to retrieve endpoint on \"port@4\"\n");
+		ret = -ENOENT;
+		goto err_async;
+	}
+	priv->sd.fwnode = ep;
+
+	ret = v4l2_async_register_subdev(&priv->sd);
+	if (ret < 0) {
+		dev_err(dev, "Unable to register subdevice\n");
+		goto err_put_node;
+	}
+
+	return 0;
+
+err_put_node:
+	fwnode_handle_put(ep);
+err_async:
+	max9286_v4l2_notifier_unregister(priv);
+
+	return ret;
+}
+
+static void max9286_v4l2_unregister(struct max9286_priv *priv)
+{
+	fwnode_handle_put(priv->sd.fwnode);
+	v4l2_async_unregister_subdev(&priv->sd);
+	max9286_v4l2_notifier_unregister(priv);
+}
+
+/* -----------------------------------------------------------------------------
+ * Probe/Remove
+ */
+
+static int max9286_setup(struct max9286_priv *priv)
+{
+	/*
+	 * Link ordering values for all enabled links combinations. Orders must
+	 * be assigned sequentially from 0 to the number of enabled links
+	 * without leaving any hole for disabled links. We thus assign orders to
+	 * enabled links first, and use the remaining order values for disabled
+	 * links are all links must have a different order value;
+	 */
+	static const u8 link_order[] = {
+		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxxx */
+		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xxx0 */
+		(3 << 6) | (2 << 4) | (0 << 2) | (1 << 0), /* xx0x */
+		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* xx10 */
+		(3 << 6) | (0 << 4) | (2 << 2) | (1 << 0), /* x0xx */
+		(3 << 6) | (1 << 4) | (2 << 2) | (0 << 0), /* x1x0 */
+		(3 << 6) | (1 << 4) | (0 << 2) | (2 << 0), /* x10x */
+		(3 << 6) | (1 << 4) | (1 << 2) | (0 << 0), /* x210 */
+		(0 << 6) | (3 << 4) | (2 << 2) | (1 << 0), /* 0xxx */
+		(1 << 6) | (3 << 4) | (2 << 2) | (0 << 0), /* 1xx0 */
+		(1 << 6) | (3 << 4) | (0 << 2) | (2 << 0), /* 1x0x */
+		(2 << 6) | (3 << 4) | (1 << 2) | (0 << 0), /* 2x10 */
+		(1 << 6) | (0 << 4) | (3 << 2) | (2 << 0), /* 10xx */
+		(2 << 6) | (1 << 4) | (3 << 2) | (0 << 0), /* 21x0 */
+		(2 << 6) | (1 << 4) | (0 << 2) | (3 << 0), /* 210x */
+		(3 << 6) | (2 << 4) | (1 << 2) | (0 << 0), /* 3210 */
+	};
+
+	/*
+	 * Set the I2C bus speed.
+	 *
+	 * Enable I2C Local Acknowledge during the probe sequences of the camera
+	 * only. This should be disabled after the mux is initialised.
+	 */
+	max9286_configure_i2c(priv, true);
+
+	/*
+	 * Reverse channel setup.
+	 *
+	 * - Enable custom reverse channel configuration (through register 0x3f)
+	 *   and set the first pulse length to 35 clock cycles.
+	 * - Increase the reverse channel amplitude to 170mV to accommodate the
+	 *   high threshold enabled by the serializer driver.
+	 */
+	max9286_write(priv, 0x3f, MAX9286_EN_REV_CFG | MAX9286_REV_FLEN(35));
+	max9286_write(priv, 0x3b, MAX9286_REV_TRF(1) | MAX9286_REV_AMP(70) |
+		      MAX9286_REV_AMP_X);
+	usleep_range(2000, 2500);
+
+	/*
+	 * Enable GMSL links, mask unused ones and autodetect link
+	 * used as CSI clock source.
+	 */
+	max9286_write(priv, 0x00, MAX9286_MSTLINKSEL_AUTO | priv->route_mask);
+	max9286_write(priv, 0x0b, link_order[priv->route_mask]);
+	max9286_write(priv, 0x69, (0xf & ~priv->route_mask));
+
+	/*
+	 * Video format setup:
+	 * Disable CSI output, VC is set according to Link number.
+	 */
+	max9286_write(priv, 0x15, MAX9286_VCTYPE | MAX9286_0X15_RESV);
+
+	/* Enable CSI-2 Lane D0-D3 only, DBL mode, YUV422 8-bit. */
+	max9286_write(priv, 0x12, MAX9286_CSIDBL | MAX9286_DBL |
+		      MAX9286_CSILANECNT(priv->csi2_data_lanes) |
+		      MAX9286_DATATYPE_YUV422_8BIT);
+
+	/* Automatic: FRAMESYNC taken from the slowest Link. */
+	max9286_write(priv, 0x01, MAX9286_FSYNCMODE_INT_HIZ |
+		      MAX9286_FSYNCMETH_AUTO);
+
+	/* Enable HS/VS encoding, use D14/15 for HS/VS, invert VS. */
+	max9286_write(priv, 0x0c, MAX9286_HVEN | MAX9286_INVVS |
+		      MAX9286_HVSRC_D14);
+
+	/*
+	 * Wait for 2ms to allow the link to resynchronize after the
+	 * configuration change.
+	 */
+	usleep_range(2000, 5000);
+
+	return 0;
+}
+
+static const struct of_device_id max9286_dt_ids[] = {
+	{ .compatible = "maxim,max9286" },
+	{},
+};
+MODULE_DEVICE_TABLE(of, max9286_dt_ids);
+
+static void max9286_gpio_set(struct gpio_chip *chip,
+			     unsigned int offset, int value)
+{
+	struct max9286_priv *priv = gpiochip_get_data(chip);
+
+	if (value)
+		priv->gpio_state |= BIT(offset);
+	else
+		priv->gpio_state &= ~BIT(offset);
+
+	max9286_write(priv, 0x0f, MAX9286_0X0F_RESERVED | priv->gpio_state);
+}
+
+static int max9286_gpio_get(struct gpio_chip *chip, unsigned int offset)
+{
+	struct max9286_priv *priv = gpiochip_get_data(chip);
+
+	return priv->gpio_state & BIT(offset);
+}
+
+static int max9286_gpio(struct max9286_priv *priv)
+{
+	struct device *dev = &priv->client->dev;
+	struct gpio_chip *gpio = &priv->gpio;
+	int ret;
+
+	static const char * const names[] = {
+		"GPIO0OUT",
+		"GPIO1OUT",
+	};
+
+	/* Configure the GPIO */
+	gpio->label = dev_name(dev);
+	gpio->parent = dev;
+	gpio->owner = THIS_MODULE;
+	gpio->of_node = dev->of_node;
+	gpio->ngpio = 2;
+	gpio->base = -1;
+	gpio->set = max9286_gpio_set;
+	gpio->get = max9286_gpio_get;
+	gpio->can_sleep = true;
+	gpio->names = names;
+
+	/* GPIO values default to high */
+	priv->gpio_state = BIT(0) | BIT(1);
+
+	ret = devm_gpiochip_add_data(dev, gpio, priv);
+	if (ret)
+		dev_err(dev, "Unable to create gpio_chip\n");
+
+	return ret;
+}
+
+static int max9286_init(struct device *dev)
+{
+	struct max9286_priv *priv;
+	struct i2c_client *client;
+	int ret;
+
+	/* Skip non-max9286 devices. */
+	if (!dev->of_node || !of_match_node(max9286_dt_ids, dev->of_node))
+		return 0;
+
+	client = to_i2c_client(dev);
+	priv = i2c_get_clientdata(client);
+
+	/* Enable the bus power. */
+	ret = regulator_enable(priv->regulator);
+	if (ret < 0) {
+		dev_err(&client->dev, "Unable to turn PoC on\n");
+		return ret;
+	}
+
+	priv->poc_enabled = true;
+
+	ret = max9286_setup(priv);
+	if (ret) {
+		dev_err(dev, "Unable to setup max9286\n");
+		goto err_regulator;
+	}
+
+	/*
+	 * Register all V4L2 interactions for the MAX9286 and notifiers for
+	 * any subdevices connected.
+	 */
+	ret = max9286_v4l2_register(priv);
+	if (ret) {
+		dev_err(dev, "Failed to register with V4L2\n");
+		goto err_regulator;
+	}
+
+	ret = max9286_i2c_mux_init(priv);
+	if (ret) {
+		dev_err(dev, "Unable to initialize I2C multiplexer\n");
+		goto err_v4l2_register;
+	}
+
+	/* Leave the mux channels disabled until they are selected. */
+	max9286_i2c_mux_close(priv);
+
+	return 0;
+
+err_v4l2_register:
+	max9286_v4l2_unregister(priv);
+err_regulator:
+	regulator_disable(priv->regulator);
+	priv->poc_enabled = false;
+
+	return ret;
+}
+
+static void max9286_cleanup_dt(struct max9286_priv *priv)
+{
+	struct max9286_source *source;
+
+	for_each_source(priv, source) {
+		fwnode_handle_put(source->fwnode);
+		source->fwnode = NULL;
+	}
+}
+
+static int max9286_parse_dt(struct max9286_priv *priv)
+{
+	struct device *dev = &priv->client->dev;
+	struct device_node *i2c_mux;
+	struct device_node *node = NULL;
+	unsigned int i2c_mux_mask = 0;
+
+	of_node_get(dev->of_node);
+	i2c_mux = of_find_node_by_name(dev->of_node, "i2c-mux");
+	if (!i2c_mux) {
+		dev_err(dev, "Failed to find i2c-mux node\n");
+		return -EINVAL;
+	}
+
+	/* Identify which i2c-mux channels are enabled */
+	for_each_child_of_node(i2c_mux, node) {
+		u32 id = 0;
+
+		of_property_read_u32(node, "reg", &id);
+		if (id >= MAX9286_NUM_GMSL)
+			continue;
+
+		if (!of_device_is_available(node)) {
+			dev_dbg(dev, "Skipping disabled I2C bus port %u\n",
+				id);
+			continue;
+		}
+
+		i2c_mux_mask |= BIT(id);
+	}
+	of_node_put(node);
+	of_node_put(i2c_mux);
+
+	/* Parse the endpoints */
+	for_each_endpoint_of_node(dev->of_node, node) {
+		struct max9286_source *source;
+		struct of_endpoint ep;
+
+		of_graph_parse_endpoint(node, &ep);
+		dev_dbg(dev, "Endpoint %pOF on port %d",
+			ep.local_node, ep.port);
+
+		if (ep.port > MAX9286_NUM_GMSL) {
+			dev_err(dev, "Invalid endpoint %s on port %d",
+				of_node_full_name(ep.local_node), ep.port);
+			continue;
+		}
+
+		/* For the source endpoint just parse the bus configuration. */
+		if (ep.port == MAX9286_SRC_PAD) {
+			struct v4l2_fwnode_endpoint vep = {
+				.bus_type = V4L2_MBUS_CSI2_DPHY
+			};
+			int ret;
+
+			ret = v4l2_fwnode_endpoint_parse(
+					of_fwnode_handle(node), &vep);
+			if (ret) {
+				of_node_put(node);
+				return ret;
+			}
+
+			if (vep.bus_type != V4L2_MBUS_CSI2_DPHY) {
+				dev_err(dev,
+					"Media bus %u type not supported\n",
+					vep.bus_type);
+				v4l2_fwnode_endpoint_free(&vep);
+				of_node_put(node);
+				return -EINVAL;
+			}
+
+			priv->csi2_data_lanes =
+				vep.bus.mipi_csi2.num_data_lanes;
+			v4l2_fwnode_endpoint_free(&vep);
+
+			continue;
+		}
+
+		/* Skip if the corresponding GMSL link is unavailable. */
+		if (!(i2c_mux_mask & BIT(ep.port)))
+			continue;
+
+		if (priv->sources[ep.port].fwnode) {
+			dev_err(dev,
+				"Multiple port endpoints are not supported: %d",
+				ep.port);
+
+			continue;
+		}
+
+		source = &priv->sources[ep.port];
+		source->fwnode = fwnode_graph_get_remote_endpoint(
+						of_fwnode_handle(node));
+		if (!source->fwnode) {
+			dev_err(dev,
+				"Endpoint %pOF has no remote endpoint connection\n",
+				ep.local_node);
+
+			continue;
+		}
+
+		priv->source_mask |= BIT(ep.port);
+		priv->nsources++;
+	}
+	of_node_put(node);
+
+	priv->route_mask = priv->source_mask;
+
+	return 0;
+}
+
+static int max9286_probe(struct i2c_client *client)
+{
+	struct max9286_priv *priv;
+	unsigned int i;
+	int ret;
+
+	priv = kzalloc(sizeof(*priv), GFP_KERNEL);
+	if (!priv)
+		return -ENOMEM;
+
+	priv->client = client;
+	i2c_set_clientdata(client, priv);
+
+	for (i = 0; i < MAX9286_N_SINKS; i++)
+		max9286_init_format(&priv->fmt[i]);
+
+	ret = max9286_parse_dt(priv);
+	if (ret)
+		return ret;
+
+	priv->gpiod_pwdn = devm_gpiod_get_optional(&client->dev, "enable",
+						   GPIOD_OUT_HIGH);
+	if (IS_ERR(priv->gpiod_pwdn))
+		return PTR_ERR(priv->gpiod_pwdn);
+
+	gpiod_set_consumer_name(priv->gpiod_pwdn, "max9286-pwdn");
+	gpiod_set_value_cansleep(priv->gpiod_pwdn, 1);
+
+	/* Wait at least 4ms before the I2C lines latch to the address */
+	if (priv->gpiod_pwdn)
+		usleep_range(4000, 5000);
+
+	ret = max9286_gpio(priv);
+	if (ret)
+		return ret;
+
+	priv->regulator = regulator_get(&client->dev, "poc");
+	if (IS_ERR(priv->regulator)) {
+		if (PTR_ERR(priv->regulator) != -EPROBE_DEFER)
+			dev_err(&client->dev,
+				"Unable to get PoC regulator (%ld)\n",
+				PTR_ERR(priv->regulator));
+		ret = PTR_ERR(priv->regulator);
+		priv->regulator = NULL;
+		goto err_free;
+	}
+
+	/*
+	 * We can have multiple MAX9286 instances on the same physical I2C
+	 * bus, and I2C children behind ports of separate MAX9286 instances
+	 * having the same I2C address. As the MAX9286 starts by default with
+	 * all ports enabled, we need to disable all ports on all MAX9286
+	 * instances before proceeding to further initialize the devices and
+	 * instantiate children.
+	 *
+	 * Start by just disabling all channels on the current device. Then,
+	 * if all other MAX9286 on the parent bus have been probed, proceed
+	 * to initialize them all, including the current one.
+	 */
+	max9286_i2c_mux_close(priv);
+
+	/*
+	 * The MAX9286 initialises with auto-acknowledge enabled by default.
+	 * This means that if multiple MAX9286 devices are connected to an I2C
+	 * bus, another MAX9286 could ack I2C transfers meant for a device on
+	 * the other side of the GMSL links for this MAX9286 (such as a
+	 * MAX9271). To prevent that disable auto-acknowledge early on; it
+	 * will be enabled later as needed.
+	 */
+	max9286_configure_i2c(priv, false);
+
+	ret = max9286_init(&client->dev);
+	if (ret < 0)
+		goto err_regulator;
+
+	return 0;
+
+err_regulator:
+	regulator_put(priv->regulator);
+	max9286_i2c_mux_close(priv);
+	max9286_configure_i2c(priv, false);
+err_free:
+	max9286_cleanup_dt(priv);
+	kfree(priv);
+
+	return ret;
+}
+
+static int max9286_remove(struct i2c_client *client)
+{
+	struct max9286_priv *priv = i2c_get_clientdata(client);
+
+	i2c_mux_del_adapters(priv->mux);
+
+	max9286_v4l2_unregister(priv);
+
+	if (priv->poc_enabled)
+		regulator_disable(priv->regulator);
+	regulator_put(priv->regulator);
+
+	max9286_cleanup_dt(priv);
+
+	gpiod_set_value_cansleep(priv->gpiod_pwdn, 0);
+
+	kfree(priv);
+
+	return 0;
+}
+
+static const struct i2c_device_id max9286_id[] = {
+	{ "max9286", 0 },
+	{ }
+};
+MODULE_DEVICE_TABLE(i2c, max9286_id);
+
+static struct i2c_driver max9286_i2c_driver = {
+	.driver	= {
+		.name		= "max9286",
+		.of_match_table	= of_match_ptr(max9286_dt_ids),
+	},
+	.probe_new	= max9286_probe,
+	.remove		= max9286_remove,
+	.id_table	= max9286_id,
+};
+
+module_i2c_driver(max9286_i2c_driver);
+
+MODULE_DESCRIPTION("Maxim MAX9286 GMSL Deserializer Driver");
+MODULE_AUTHOR("Jacopo Mondi, Kieran Bingham, Laurent Pinchart, Niklas Söderlund, Vladimir Barinov");
+MODULE_LICENSE("GPL");