arm64: dts: imx8mn-ddr4-evk: Adjust 1.2GHz OPP voltage to OD mode
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Message ID 1581990752-10219-1-git-send-email-Anson.Huang@nxp.com
State New
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  • arm64: dts: imx8mn-ddr4-evk: Adjust 1.2GHz OPP voltage to OD mode
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Commit Message

Anson Huang Feb. 18, 2020, 1:52 a.m. UTC
According to latest datasheet Rev.0, 10/2019, there is restriction
as below:

"If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."

As by default SoC is running at OD mode(VDD_SOC = 0.95V), so
VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
---
 arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 6 ++++++
 1 file changed, 6 insertions(+)

Comments

Shawn Guo Feb. 24, 2020, 1:48 a.m. UTC | #1
On Tue, Feb 18, 2020 at 09:52:32AM +0800, Anson Huang wrote:
> According to latest datasheet Rev.0, 10/2019, there is restriction
> as below:
> 
> "If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
> 
> As by default SoC is running at OD mode(VDD_SOC = 0.95V), so
> VDD_ARM 1.2GHz OPP's voltage should be increased to 0.95V.
> 
> Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> ---
>  arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> index 2497eeb..7a61a1a 100644
> --- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> @@ -13,6 +13,12 @@
>  	compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
>  };
>  
> +&a53_opp_table {
> +	opp-1200000000 {
> +		opp-microvolt = <950000>;
> +	};
> +};
> +

The restriction applies to SoC rather than a particular board, right?
If so, the change should be made in imx8mn.dtsi?

Shawn

>  &A53_0 {
>  	cpu-supply = <&buck2_reg>;
>  };
> -- 
> 2.7.4
>
Anson Huang Feb. 24, 2020, 2:01 a.m. UTC | #2
Hi, Shawn

> Subject: Re: [PATCH] arm64: dts: imx8mn-ddr4-evk: Adjust 1.2GHz OPP
> voltage to OD mode
> 
> On Tue, Feb 18, 2020 at 09:52:32AM +0800, Anson Huang wrote:
> > According to latest datasheet Rev.0, 10/2019, there is restriction as
> > below:
> >
> > "If VDD_SOC/GPU/DDR = 0.95V, then VDD_ARM must be >= 0.95V."
> >
> > As by default SoC is running at OD mode(VDD_SOC = 0.95V), so VDD_ARM
> > 1.2GHz OPP's voltage should be increased to 0.95V.
> >
> > Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
> > ---
> >  arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts | 6 ++++++
> >  1 file changed, 6 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> > b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> > index 2497eeb..7a61a1a 100644
> > --- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> > +++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
> > @@ -13,6 +13,12 @@
> >  	compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";  };
> >
> > +&a53_opp_table {
> > +	opp-1200000000 {
> > +		opp-microvolt = <950000>;
> > +	};
> > +};
> > +
> 
> The restriction applies to SoC rather than a particular board, right?
> If so, the change should be made in imx8mn.dtsi?

Yes, you are correct, for now, it is NOT related to board, I will do the change
in .dtsi in V2.

Anson

Patch
diff mbox series

diff --git a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
index 2497eeb..7a61a1a 100644
--- a/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
+++ b/arch/arm64/boot/dts/freescale/imx8mn-ddr4-evk.dts
@@ -13,6 +13,12 @@ 
 	compatible = "fsl,imx8mn-ddr4-evk", "fsl,imx8mn";
 };
 
+&a53_opp_table {
+	opp-1200000000 {
+		opp-microvolt = <950000>;
+	};
+};
+
 &A53_0 {
 	cpu-supply = <&buck2_reg>;
 };