[v2,2/4] dt-bindings: display: msm: Add required dma-range property
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Message ID 1582223216-23459-3-git-send-email-jcrouse@codeaurora.org
State New
Headers show
Series
  • msm/gpu/a6xx: use the DMA-API for GMU memory allocations
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Commit Message

Jordan Crouse Feb. 20, 2020, 6:26 p.m. UTC
The GMU node now requires a specific dma-range property so that the driver
can use the DMA API to do the few memory allocations required by the GMU.
This sets the IOMMU iova allocator to match the 'uncached' part of the
GMU virtual address space.

v2: Fix the dma-ranges tag. The third pair should be the size.

Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
---

 Documentation/devicetree/bindings/display/msm/gmu.yaml | 10 ++++++++++
 1 file changed, 10 insertions(+)

Comments

Rob Herring Feb. 25, 2020, 6:55 p.m. UTC | #1
On Thu, Feb 20, 2020 at 12:27 PM Jordan Crouse <jcrouse@codeaurora.org> wrote:
>
> The GMU node now requires a specific dma-range property so that the driver

s/dma-range/dma-ranges/ here and the subject.

> can use the DMA API to do the few memory allocations required by the GMU.
> This sets the IOMMU iova allocator to match the 'uncached' part of the
> GMU virtual address space.

Sounds like a bunch of kernel things and this is a binding.

>
> v2: Fix the dma-ranges tag. The third pair should be the size.
>
> Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
> ---
>
>  Documentation/devicetree/bindings/display/msm/gmu.yaml | 10 ++++++++++
>  1 file changed, 10 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml
> index 776ff92..d11a073 100644
> --- a/Documentation/devicetree/bindings/display/msm/gmu.yaml
> +++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml
> @@ -83,6 +83,13 @@ properties:
>        Phandle to the OPP table for the available GMU frequencies. Refer to
>        ../../opp/opp.txt for more information.
>
> +  dma-ranges:

dma-ranges is a bus property and doesn't go in device nodes (that
don't implement a bus like PCI host for example). This would not have
even worked a few kernel versions back because the kernel would only
start looking for dma-ranges in a parent node.

> +    $ref: /schemas/types.yaml#/definitions/uint32-array
> +    description:
> +      Describe the dma-address range for the device. This should always
> +      describe the range between 0x60000000 and 0x80000000 which represents

If this is always the region, then why does it need to be in DT? Just
set your dma_mask which drivers should be doing if they want anything
other than (2^32 - 1). dma-ranges sets the bus_dma_mask.

> +      the uncached region of the GMU address space.
> +
>  required:
>    - compatible
>    - reg
> @@ -95,6 +102,7 @@ required:
>    - power-domain-names
>    - iommus
>    - operating-points-v2
> +  - dma-ranges
>
>  examples:
>   - |
> @@ -127,4 +135,6 @@ examples:
>
>          iommus = <&adreno_smmu 5>;
>          operating-points-v2 = <&gmu_opp_table>;
> +
> +        dma-ranges = <0 0x60000000 0 0x60000000 0 0x20000000>;
>     };
> --
> 2.7.4
>

Patch
diff mbox series

diff --git a/Documentation/devicetree/bindings/display/msm/gmu.yaml b/Documentation/devicetree/bindings/display/msm/gmu.yaml
index 776ff92..d11a073 100644
--- a/Documentation/devicetree/bindings/display/msm/gmu.yaml
+++ b/Documentation/devicetree/bindings/display/msm/gmu.yaml
@@ -83,6 +83,13 @@  properties:
       Phandle to the OPP table for the available GMU frequencies. Refer to
       ../../opp/opp.txt for more information.
 
+  dma-ranges:
+    $ref: /schemas/types.yaml#/definitions/uint32-array
+    description:
+      Describe the dma-address range for the device. This should always
+      describe the range between 0x60000000 and 0x80000000 which represents
+      the uncached region of the GMU address space.
+
 required:
   - compatible
   - reg
@@ -95,6 +102,7 @@  required:
   - power-domain-names
   - iommus
   - operating-points-v2
+  - dma-ranges
 
 examples:
  - |
@@ -127,4 +135,6 @@  examples:
 
         iommus = <&adreno_smmu 5>;
         operating-points-v2 = <&gmu_opp_table>;
+
+        dma-ranges = <0 0x60000000 0 0x60000000 0 0x20000000>;
    };