| Message ID | 3954ca0b86641e5e6a1935886df6658b9305ec4a.1582300927.git.robin.murphy@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | arm64 CPU DT binding updates | expand |
On Fri, Feb 21, 2020 at 10:05 AM Robin Murphy <robin.murphy@arm.com> wrote: > > Add new PMU definitions to correspond with the CPU bindings. > > Signed-off-by: Robin Murphy <robin.murphy@arm.com> > --- > Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml > index 52ae094ce330..cc52195d0e9e 100644 > --- a/Documentation/devicetree/bindings/arm/pmu.yaml > +++ b/Documentation/devicetree/bindings/arm/pmu.yaml > @@ -21,11 +21,20 @@ properties: > - enum: > - apm,potenza-pmu > - arm,armv8-pmuv3 > + - arm,neoverse-n1-pmu > + - arm,neoverse-e1-pmu We've managed to do some interesting sorting here. Oh well. I'll take patches 1 and 2. > + - arm,cortex-a77-pmu > + - arm,cortex-a76-pmu > + - arm,cortex-a75-pmu > - arm,cortex-a73-pmu > - arm,cortex-a72-pmu > + - arm,cortex-a65-pmu > - arm,cortex-a57-pmu > + - arm,cortex-a55-pmu > - arm,cortex-a53-pmu > - arm,cortex-a35-pmu > + - arm,cortex-a34-pmu > + - arm,cortex-a32-pmu > - arm,cortex-a17-pmu > - arm,cortex-a15-pmu > - arm,cortex-a12-pmu > -- > 2.23.0.dirty >
On 21/02/2020 4:26 pm, Rob Herring wrote: > On Fri, Feb 21, 2020 at 10:05 AM Robin Murphy <robin.murphy@arm.com> wrote: >> >> Add new PMU definitions to correspond with the CPU bindings. >> >> Signed-off-by: Robin Murphy <robin.murphy@arm.com> >> --- >> Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++ >> 1 file changed, 9 insertions(+) >> >> diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml >> index 52ae094ce330..cc52195d0e9e 100644 >> --- a/Documentation/devicetree/bindings/arm/pmu.yaml >> +++ b/Documentation/devicetree/bindings/arm/pmu.yaml >> @@ -21,11 +21,20 @@ properties: >> - enum: >> - apm,potenza-pmu >> - arm,armv8-pmuv3 >> + - arm,neoverse-n1-pmu >> + - arm,neoverse-e1-pmu > > We've managed to do some interesting sorting here. Oh well. Indeed; it appeared to be some sort of overlap between reverse-alpha and "big-to-little", so I just picked that up and ran with it :) Thanks, Robin. > I'll take patches 1 and 2. > >> + - arm,cortex-a77-pmu >> + - arm,cortex-a76-pmu >> + - arm,cortex-a75-pmu >> - arm,cortex-a73-pmu >> - arm,cortex-a72-pmu >> + - arm,cortex-a65-pmu >> - arm,cortex-a57-pmu >> + - arm,cortex-a55-pmu >> - arm,cortex-a53-pmu >> - arm,cortex-a35-pmu >> + - arm,cortex-a34-pmu >> + - arm,cortex-a32-pmu >> - arm,cortex-a17-pmu >> - arm,cortex-a15-pmu >> - arm,cortex-a12-pmu >> -- >> 2.23.0.dirty >>
diff --git a/Documentation/devicetree/bindings/arm/pmu.yaml b/Documentation/devicetree/bindings/arm/pmu.yaml index 52ae094ce330..cc52195d0e9e 100644 --- a/Documentation/devicetree/bindings/arm/pmu.yaml +++ b/Documentation/devicetree/bindings/arm/pmu.yaml @@ -21,11 +21,20 @@ properties: - enum: - apm,potenza-pmu - arm,armv8-pmuv3 + - arm,neoverse-n1-pmu + - arm,neoverse-e1-pmu + - arm,cortex-a77-pmu + - arm,cortex-a76-pmu + - arm,cortex-a75-pmu - arm,cortex-a73-pmu - arm,cortex-a72-pmu + - arm,cortex-a65-pmu - arm,cortex-a57-pmu + - arm,cortex-a55-pmu - arm,cortex-a53-pmu - arm,cortex-a35-pmu + - arm,cortex-a34-pmu + - arm,cortex-a32-pmu - arm,cortex-a17-pmu - arm,cortex-a15-pmu - arm,cortex-a12-pmu
Add new PMU definitions to correspond with the CPU bindings. Signed-off-by: Robin Murphy <robin.murphy@arm.com> --- Documentation/devicetree/bindings/arm/pmu.yaml | 9 +++++++++ 1 file changed, 9 insertions(+)