diff mbox series

[27/89] clk: bcm: Add BCM2711 DVP driver

Message ID 6dd6bd48e894c1e8ee85c29a30ba1b18041d83c4.1582533919.git-series.maxime@cerno.tech (mailing list archive)
State Changes Requested, archived
Headers show
Series None | expand

Commit Message

Maxime Ripard Feb. 24, 2020, 9:06 a.m. UTC
The HDMI block has a block that controls clocks and reset signals to the
HDMI0 and HDMI1 controllers.

Let's expose that through a clock driver implementing a clock and reset
provider.

Cc: Michael Turquette <mturquette@baylibre.com>
Cc: Stephen Boyd <sboyd@kernel.org>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: linux-clk@vger.kernel.org
Cc: devicetree@vger.kernel.org
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
---
 drivers/clk/bcm/Kconfig           |   1 +-
 drivers/clk/bcm/Makefile          |   1 +-
 drivers/clk/bcm/clk-bcm2711-dvp.c | 113 +++++++++++++++++++++++++++++++-
 3 files changed, 115 insertions(+)
 create mode 100644 drivers/clk/bcm/clk-bcm2711-dvp.c

Comments

Stephen Boyd March 13, 2020, 1 a.m. UTC | #1
Quoting Maxime Ripard (2020-02-24 01:06:29)
> diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
> new file mode 100644
> index 000000000000..f4773cc92724
> --- /dev/null
> +++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
> @@ -0,0 +1,113 @@
> +// SPDX-License-Identifier: GPL-2.0-or-later
> +// Copyright 2020 Cerno
> +
> +#include <linux/clk-provider.h>
> +#include <linux/module.h>
> +#include <linux/platform_device.h>
> +#include <linux/reset-controller.h>
> +#include <linux/reset/reset-simple.h>
> +
> +#define DVP_HT_RPI_SW_INIT     0x04
> +#define DVP_HT_RPI_MISC_CONFIG 0x08
> +
> +#define NR_CLOCKS      2
> +#define NR_RESETS      6
> +
> +struct clk_dvp {
> +       struct clk                      *clks[NR_CLOCKS];
> +       struct clk_onecell_data         clk_data;
> +       struct reset_simple_data        reset;
> +};
> +
> +static int clk_dvp_probe(struct platform_device *pdev)
> +{
> +       struct resource *res;
> +       struct clk_dvp *dvp;
> +       void __iomem *base;
> +       const char *parent;
> +       int ret;
> +
> +       dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
> +       if (!dvp)
> +               return -ENOMEM;
> +       platform_set_drvdata(pdev, dvp);
> +
> +       res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> +       base = devm_ioremap_resource(&pdev->dev, res);
> +       if (IS_ERR(base))
> +               return PTR_ERR(base);
> +
> +       dvp->reset.rcdev.owner = THIS_MODULE;
> +       dvp->reset.rcdev.nr_resets = NR_RESETS;
> +       dvp->reset.rcdev.ops = &reset_simple_ops;
> +       dvp->reset.rcdev.of_node = pdev->dev.of_node;
> +       dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
> +       spin_lock_init(&dvp->reset.lock);
> +
> +       ret = reset_controller_register(&dvp->reset.rcdev);
> +       if (ret)
> +               return ret;
> +
> +       parent = of_clk_get_parent_name(pdev->dev.of_node, 0);
> +       if (!parent)
> +               goto unregister_reset;
> +
> +       dvp->clks[0] = clk_register_gate(&pdev->dev, "hdmi0-108MHz",
> +                                        parent, CLK_IS_CRITICAL,
> +                                        base + DVP_HT_RPI_MISC_CONFIG, 3,
> +                                        CLK_GATE_SET_TO_DISABLE, &dvp->reset.lock);
> +       if (IS_ERR(dvp->clks[0])) {
> +               ret = PTR_ERR(dvp->clks[0]);
> +               goto unregister_reset;
> +       }
> +
> +       dvp->clks[1] = clk_register_gate(&pdev->dev, "hdmi1-108MHz",
> +                                        parent, CLK_IS_CRITICAL,
> +                                        base + DVP_HT_RPI_MISC_CONFIG, 4,
> +                                        CLK_GATE_SET_TO_DISABLE, &dvp->reset.lock);

Can we use clk_hw APIs, document why CLK_IS_CRITICAL, and use something
like clk_hw_register_gate_parent_data() so that we don't have to use
of_clk_get_parent_name() above?


> +       if (IS_ERR(dvp->clks[1])) {
> +               ret = PTR_ERR(dvp->clks[1]);
> +               goto unregister_clk0;
> +       }
> +
> +       dvp->clk_data.clks = dvp->clks;
> +       dvp->clk_data.clk_num = NR_CLOCKS;
> +       of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get,
> +                           &dvp->clk_data);

This can fail. Please recover. Also, please use clk_hw based APIs.

> +
> +       return 0;
> +
> +
> +unregister_clk0:
> +       clk_unregister_gate(dvp->clks[0]);
> +
> +unregister_reset:
> +       reset_controller_unregister(&dvp->reset.rcdev);
> +       return ret;
> +};
> +
> +static int clk_dvp_remove(struct platform_device *pdev)
> +{
> +       struct clk_dvp *dvp = platform_get_drvdata(pdev);
> +
> +       clk_unregister_gate(dvp->clks[1]);
> +       clk_unregister_gate(dvp->clks[0]);
> +       reset_controller_unregister(&dvp->reset.rcdev);
> +
> +       return 0;
> +}
> +
> +static const struct of_device_id clk_dvp_dt_ids[] = {
> +       { .compatible = "brcm,brcm2711-dvp", },
> +       { /* sentinel */ },

Please drop comma after this so we can't put anything after lest it
cause a compiler error.

> +};
> +
> +static struct platform_driver clk_dvp_driver = {
> +       .probe  = clk_dvp_probe,
> +       .remove = clk_dvp_remove,
> +       .driver = {
> +               .name           = "brcm2711-dvp",
> +               .of_match_table = clk_dvp_dt_ids,
> +       },
> +};
> +module_platform_driver(clk_dvp_driver);
> -- 
> git-series 0.9.1
Maxime Ripard March 23, 2020, 10:56 a.m. UTC | #2
Hi Stephen,

On Thu, Mar 12, 2020 at 06:00:59PM -0700, Stephen Boyd wrote:
> > +       dvp->clks[1] = clk_register_gate(&pdev->dev, "hdmi1-108MHz",
> > +                                        parent, CLK_IS_CRITICAL,
> > +                                        base + DVP_HT_RPI_MISC_CONFIG, 4,
> > +                                        CLK_GATE_SET_TO_DISABLE, &dvp->reset.lock);
>
> Can we use clk_hw APIs, document why CLK_IS_CRITICAL, and use something
> like clk_hw_register_gate_parent_data() so that we don't have to use
> of_clk_get_parent_name() above?

That function is new to me, and I'm not sure how I'm supposed to use it?

It looks like clk_hw_register_gate, clk_hw_register_gate_parent_hw and
clk_hw_register_gate_parent_data all call __clk_hw_register_gate with
the same arguments, each expecting the parent_name, so they look
equivalent?

It looks like the original intent was to have the parent name, clk_hw
or clk_parent_data as argument, but the macro itself was copy pasted
without changing the arguments it's calling __clk_hw_register_gate
with?

Maxime
Stephen Boyd March 25, 2020, 2:20 a.m. UTC | #3
Quoting Maxime Ripard (2020-03-23 03:56:16)
> Hi Stephen,
> 
> On Thu, Mar 12, 2020 at 06:00:59PM -0700, Stephen Boyd wrote:
> > > +       dvp->clks[1] = clk_register_gate(&pdev->dev, "hdmi1-108MHz",
> > > +                                        parent, CLK_IS_CRITICAL,
> > > +                                        base + DVP_HT_RPI_MISC_CONFIG, 4,
> > > +                                        CLK_GATE_SET_TO_DISABLE, &dvp->reset.lock);
> >
> > Can we use clk_hw APIs, document why CLK_IS_CRITICAL, and use something
> > like clk_hw_register_gate_parent_data() so that we don't have to use
> > of_clk_get_parent_name() above?
> 
> That function is new to me, and I'm not sure how I'm supposed to use it?
> 
> It looks like clk_hw_register_gate, clk_hw_register_gate_parent_hw and
> clk_hw_register_gate_parent_data all call __clk_hw_register_gate with
> the same arguments, each expecting the parent_name, so they look
> equivalent?
> 
> It looks like the original intent was to have the parent name, clk_hw
> or clk_parent_data as argument, but the macro itself was copy pasted
> without changing the arguments it's calling __clk_hw_register_gate
> with?
> 

Yeah! It looks like nobody has tried to use it yet so you've come across
that problem where nobody reviews things and I just merge it anyway.
I'll send a fix shortly.
diff mbox series

Patch

diff --git a/drivers/clk/bcm/Kconfig b/drivers/clk/bcm/Kconfig
index 8c83977a7dc4..03bbd8040451 100644
--- a/drivers/clk/bcm/Kconfig
+++ b/drivers/clk/bcm/Kconfig
@@ -4,6 +4,7 @@  config CLK_BCM2835
 	depends on ARCH_BCM2835 || ARCH_BRCMSTB || COMPILE_TEST
 	depends on COMMON_CLK
 	default ARCH_BCM2835 || ARCH_BRCMSTB
+	select RESET_SIMPLE
 	help
 	  Enable common clock framework support for Broadcom BCM2835
 	  SoCs.
diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile
index 0070ddf6cdd2..2c1349062147 100644
--- a/drivers/clk/bcm/Makefile
+++ b/drivers/clk/bcm/Makefile
@@ -6,6 +6,7 @@  obj-$(CONFIG_CLK_BCM_KONA)	+= clk-kona-setup.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm281xx.o
 obj-$(CONFIG_CLK_BCM_KONA)	+= clk-bcm21664.o
 obj-$(CONFIG_COMMON_CLK_IPROC)	+= clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o
+obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2711-dvp.o
 obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835.o
 obj-$(CONFIG_CLK_BCM2835)	+= clk-bcm2835-aux.o
 obj-$(CONFIG_CLK_RASPBERRYPI)	+= clk-raspberrypi.o
diff --git a/drivers/clk/bcm/clk-bcm2711-dvp.c b/drivers/clk/bcm/clk-bcm2711-dvp.c
new file mode 100644
index 000000000000..f4773cc92724
--- /dev/null
+++ b/drivers/clk/bcm/clk-bcm2711-dvp.c
@@ -0,0 +1,113 @@ 
+// SPDX-License-Identifier: GPL-2.0-or-later
+// Copyright 2020 Cerno
+
+#include <linux/clk-provider.h>
+#include <linux/module.h>
+#include <linux/platform_device.h>
+#include <linux/reset-controller.h>
+#include <linux/reset/reset-simple.h>
+
+#define DVP_HT_RPI_SW_INIT	0x04
+#define DVP_HT_RPI_MISC_CONFIG	0x08
+
+#define NR_CLOCKS	2
+#define NR_RESETS	6
+
+struct clk_dvp {
+	struct clk			*clks[NR_CLOCKS];
+	struct clk_onecell_data		clk_data;
+	struct reset_simple_data	reset;
+};
+
+static int clk_dvp_probe(struct platform_device *pdev)
+{
+	struct resource *res;
+	struct clk_dvp *dvp;
+	void __iomem *base;
+	const char *parent;
+	int ret;
+
+	dvp = devm_kzalloc(&pdev->dev, sizeof(*dvp), GFP_KERNEL);
+	if (!dvp)
+		return -ENOMEM;
+	platform_set_drvdata(pdev, dvp);
+
+	res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+	base = devm_ioremap_resource(&pdev->dev, res);
+	if (IS_ERR(base))
+		return PTR_ERR(base);
+
+	dvp->reset.rcdev.owner = THIS_MODULE;
+	dvp->reset.rcdev.nr_resets = NR_RESETS;
+	dvp->reset.rcdev.ops = &reset_simple_ops;
+	dvp->reset.rcdev.of_node = pdev->dev.of_node;
+	dvp->reset.membase = base + DVP_HT_RPI_SW_INIT;
+	spin_lock_init(&dvp->reset.lock);
+
+	ret = reset_controller_register(&dvp->reset.rcdev);
+	if (ret)
+		return ret;
+
+	parent = of_clk_get_parent_name(pdev->dev.of_node, 0);
+	if (!parent)
+		goto unregister_reset;
+
+	dvp->clks[0] = clk_register_gate(&pdev->dev, "hdmi0-108MHz",
+					 parent, CLK_IS_CRITICAL,
+					 base + DVP_HT_RPI_MISC_CONFIG, 3,
+					 CLK_GATE_SET_TO_DISABLE, &dvp->reset.lock);
+	if (IS_ERR(dvp->clks[0])) {
+		ret = PTR_ERR(dvp->clks[0]);
+		goto unregister_reset;
+	}
+
+	dvp->clks[1] = clk_register_gate(&pdev->dev, "hdmi1-108MHz",
+					 parent, CLK_IS_CRITICAL,
+					 base + DVP_HT_RPI_MISC_CONFIG, 4,
+					 CLK_GATE_SET_TO_DISABLE, &dvp->reset.lock);
+	if (IS_ERR(dvp->clks[1])) {
+		ret = PTR_ERR(dvp->clks[1]);
+		goto unregister_clk0;
+	}
+
+	dvp->clk_data.clks = dvp->clks;
+	dvp->clk_data.clk_num = NR_CLOCKS;
+	of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get,
+			    &dvp->clk_data);
+
+	return 0;
+
+
+unregister_clk0:
+	clk_unregister_gate(dvp->clks[0]);
+
+unregister_reset:
+	reset_controller_unregister(&dvp->reset.rcdev);
+	return ret;
+};
+
+static int clk_dvp_remove(struct platform_device *pdev)
+{
+	struct clk_dvp *dvp = platform_get_drvdata(pdev);
+
+	clk_unregister_gate(dvp->clks[1]);
+	clk_unregister_gate(dvp->clks[0]);
+	reset_controller_unregister(&dvp->reset.rcdev);
+
+	return 0;
+}
+
+static const struct of_device_id clk_dvp_dt_ids[] = {
+	{ .compatible = "brcm,brcm2711-dvp", },
+	{ /* sentinel */ },
+};
+
+static struct platform_driver clk_dvp_driver = {
+	.probe	= clk_dvp_probe,
+	.remove	= clk_dvp_remove,
+	.driver	= {
+		.name		= "brcm2711-dvp",
+		.of_match_table	= clk_dvp_dt_ids,
+	},
+};
+module_platform_driver(clk_dvp_driver);