From patchwork Tue Feb 25 05:59:20 2020 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Gerd Hoffmann X-Patchwork-Id: 11402537 Return-Path: Received: from mail.kernel.org (pdx-korg-mail-1.web.codeaurora.org [172.30.200.123]) by pdx-korg-patchwork-2.web.codeaurora.org (Postfix) with ESMTP id 4D08992A for ; Tue, 25 Feb 2020 06:00:21 +0000 (UTC) Received: from lists.gnu.org (lists.gnu.org [209.51.188.17]) (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits)) (No client certificate requested) by mail.kernel.org (Postfix) with ESMTPS id 23F1321556 for ; Tue, 25 Feb 2020 06:00:21 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=fail reason="signature verification failed" (1024-bit key) header.d=redhat.com header.i=@redhat.com header.b="IGBLby8O" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org 23F1321556 Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=redhat.com Authentication-Results: mail.kernel.org; spf=pass smtp.mailfrom=qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Received: from localhost ([::1]:49366 helo=lists1p.gnu.org) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6TGW-0004B6-82 for patchwork-qemu-devel@patchwork.kernel.org; Tue, 25 Feb 2020 01:00:20 -0500 Received: from eggs.gnu.org ([2001:470:142:3::10]:33442) by lists.gnu.org with esmtp (Exim 4.90_1) (envelope-from ) id 1j6TFl-0003Ig-Vf for qemu-devel@nongnu.org; Tue, 25 Feb 2020 00:59:35 -0500 Received: from Debian-exim by eggs.gnu.org with spam-scanned (Exim 4.71) (envelope-from ) id 1j6TFk-00009J-NP for qemu-devel@nongnu.org; Tue, 25 Feb 2020 00:59:33 -0500 Received: from us-smtp-1.mimecast.com ([205.139.110.61]:52851 helo=us-smtp-delivery-1.mimecast.com) by eggs.gnu.org with esmtps (TLS1.0:DHE_RSA_AES_256_CBC_SHA1:32) (Exim 4.71) (envelope-from ) id 1j6TFk-000094-J5 for qemu-devel@nongnu.org; Tue, 25 Feb 2020 00:59:32 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=redhat.com; s=mimecast20190719; t=1582610372; h=from:from:reply-to:subject:subject:date:date:message-id:message-id: to:to:cc:cc:content-type:content-type: content-transfer-encoding:content-transfer-encoding: in-reply-to:in-reply-to:references:references; bh=K4/aU3VUKizu3sH9DiMts25fFFuGSDG6AwVgPLEjEOU=; b=IGBLby8OwIZ3aKZVi++7s2326J5SsfY9C2YnnPlQRxKZiUgu7n+GRvVh6sUvkgEswKvyuk GzH91vgD3HP2LrPbOUWfsAnJh1Wde6Ua/6/63QhMqAYsAHeWQ9BsjDnuw+LlMlHx7LIehn ajyzrmv/s6UKg587lfEwl8YtwDhLEws= Received: from mimecast-mx01.redhat.com (mimecast-mx01.redhat.com [209.132.183.4]) (Using TLS) by relay.mimecast.com with ESMTP id us-mta-196-GxckEK3kNYK0uFSjBvTprA-1; Tue, 25 Feb 2020 00:59:28 -0500 X-MC-Unique: GxckEK3kNYK0uFSjBvTprA-1 Received: from smtp.corp.redhat.com (int-mx07.intmail.prod.int.phx2.redhat.com [10.5.11.22]) (using TLSv1.2 with cipher AECDH-AES256-SHA (256/256 bits)) (No client certificate requested) by mimecast-mx01.redhat.com (Postfix) with ESMTPS id 5B5641857354; Tue, 25 Feb 2020 05:59:27 +0000 (UTC) Received: from sirius.home.kraxel.org (ovpn-116-87.ams2.redhat.com [10.36.116.87]) by smtp.corp.redhat.com (Postfix) with ESMTP id 957641001DC2; Tue, 25 Feb 2020 05:59:21 +0000 (UTC) Received: by sirius.home.kraxel.org (Postfix, from userid 1000) id 8E4839D25; Tue, 25 Feb 2020 06:59:20 +0100 (CET) From: Gerd Hoffmann To: qemu-devel@nongnu.org Subject: [PATCH 2/2] qxl: drop shadow_rom Date: Tue, 25 Feb 2020 06:59:20 +0100 Message-Id: <20200225055920.17261-3-kraxel@redhat.com> In-Reply-To: <20200225055920.17261-1-kraxel@redhat.com> References: <20200225055920.17261-1-kraxel@redhat.com> X-Scanned-By: MIMEDefang 2.84 on 10.5.11.22 X-Mimecast-Spam-Score: 0 X-Mimecast-Originator: redhat.com X-detected-operating-system: by eggs.gnu.org: GNU/Linux 2.2.x-3.x [generic] X-Received-From: 205.139.110.61 X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.23 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: sstabellini@kernel.org, pmatouse@redhat.com, "Michael S. Tsirkin" , mdroth@linux.vnet.ibm.com, ppandit@redhat.com, Gerd Hoffmann , Paolo Bonzini Errors-To: qemu-devel-bounces+patchwork-qemu-devel=patchwork.kernel.org@nongnu.org Sender: "Qemu-devel" Now that the rom bar is mapped read-only and the guest can't change things under our feet we don't need the shadow rom any more. Signed-off-by: Gerd Hoffmann --- hw/display/qxl.h | 2 +- hw/display/qxl.c | 25 +++++++++---------------- 2 files changed, 10 insertions(+), 17 deletions(-) diff --git a/hw/display/qxl.h b/hw/display/qxl.h index 707631a1f573..3aedc7db5da0 100644 --- a/hw/display/qxl.h +++ b/hw/display/qxl.h @@ -95,11 +95,11 @@ typedef struct PCIQXLDevice { uint32_t vgamem_size; /* rom pci bar */ - QXLRom shadow_rom; QXLRom *rom; QXLModes *modes; uint32_t rom_size; MemoryRegion rom_bar; + uint32_t rom_mode; #if SPICE_SERVER_VERSION >= 0x000c06 /* release 0.12.6 */ uint16_t max_outputs; #endif diff --git a/hw/display/qxl.c b/hw/display/qxl.c index 227da69a50d9..0502802688f9 100644 --- a/hw/display/qxl.c +++ b/hw/display/qxl.c @@ -391,7 +391,6 @@ static void init_qxl_rom(PCIQXLDevice *d) sizeof(rom->client_monitors_config)); } - d->shadow_rom = *rom; d->rom = rom; d->modes = modes; } @@ -403,7 +402,7 @@ static void init_qxl_ram(PCIQXLDevice *d) QXLReleaseRing *ring; buf = d->vga.vram_ptr; - d->ram = (QXLRam *)(buf + le32_to_cpu(d->shadow_rom.ram_header_offset)); + d->ram = (QXLRam *)(buf + le32_to_cpu(d->rom->ram_header_offset)); d->ram->magic = cpu_to_le32(QXL_RAM_MAGIC); d->ram->int_pending = cpu_to_le32(0); d->ram->int_mask = cpu_to_le32(0); @@ -446,7 +445,7 @@ static void qxl_ram_set_dirty(PCIQXLDevice *qxl, void *ptr) /* can be called from spice server thread context */ static void qxl_ring_set_dirty(PCIQXLDevice *qxl) { - ram_addr_t addr = qxl->shadow_rom.ram_header_offset; + ram_addr_t addr = qxl->rom->ram_header_offset; ram_addr_t end = qxl->vga.vram_size; qxl_set_dirty(&qxl->vga.vram, addr, end); } @@ -529,7 +528,6 @@ static void interface_set_compression_level(QXLInstance *sin, int level) PCIQXLDevice *qxl = container_of(sin, PCIQXLDevice, ssd.qxl); trace_qxl_interface_set_compression_level(qxl->id, level); - qxl->shadow_rom.compression_level = cpu_to_le32(level); qxl->rom->compression_level = cpu_to_le32(level); qxl_rom_set_dirty(qxl); } @@ -561,7 +559,7 @@ static void interface_get_init_info(QXLInstance *sin, QXLDevInitInfo *info) info->num_memslots_groups = NUM_MEMSLOTS_GROUPS; info->internal_groupslot_id = 0; info->qxl_ram_size = - le32_to_cpu(qxl->shadow_rom.num_pages) << QXL_PAGE_BITS; + le32_to_cpu(qxl->rom->num_pages) << QXL_PAGE_BITS; info->n_surfaces = qxl->ssd.num_surfaces; } @@ -1035,9 +1033,6 @@ static void interface_set_client_capabilities(QXLInstance *sin, return; } - qxl->shadow_rom.client_present = client_present; - memcpy(qxl->shadow_rom.client_capabilities, caps, - sizeof(qxl->shadow_rom.client_capabilities)); qxl->rom->client_present = client_present; memcpy(qxl->rom->client_capabilities, caps, sizeof(qxl->rom->client_capabilities)); @@ -1232,11 +1227,8 @@ static void qxl_check_state(PCIQXLDevice *d) static void qxl_reset_state(PCIQXLDevice *d) { - QXLRom *rom = d->rom; - qxl_check_state(d); - d->shadow_rom.update_id = cpu_to_le32(0); - *rom = d->shadow_rom; + d->rom->update_id = cpu_to_le32(0); qxl_rom_set_dirty(d); init_qxl_ram(d); d->num_free_res = 0; @@ -1600,7 +1592,7 @@ static void qxl_set_mode(PCIQXLDevice *d, unsigned int modenr, int loadvm) .format = SPICE_SURFACE_FMT_32_xRGB, .flags = loadvm ? QXL_SURF_FLAG_KEEP_DATA : 0, .mouse_mode = true, - .mem = devmem + d->shadow_rom.draw_area_offset, + .mem = devmem + d->rom->draw_area_offset, }; trace_qxl_set_mode(d->id, modenr, mode->x_res, mode->y_res, mode->bits, @@ -1620,7 +1612,6 @@ static void qxl_set_mode(PCIQXLDevice *d, unsigned int modenr, int loadvm) if (mode->bits == 16) { d->cmdflags |= QXL_COMMAND_FLAG_COMPAT_16BPP; } - d->shadow_rom.mode = cpu_to_le32(modenr); d->rom->mode = cpu_to_le32(modenr); qxl_rom_set_dirty(d); } @@ -2277,6 +2268,7 @@ static int qxl_pre_save(void *opaque) d->last_release_offset = (uint8_t *)d->last_release - ram_start; } assert(d->last_release_offset < d->vga.vram_size); + d->rom_mode = d->rom->mode; return 0; } @@ -2316,6 +2308,7 @@ static int qxl_post_load(void *opaque, int version) } else { d->last_release = (QXLReleaseInfo *)(ram_start + d->last_release_offset); } + d->rom->mode = d->rom_mode; d->modes = (QXLModes*)((uint8_t*)d->rom + d->rom->modes_offset); @@ -2361,7 +2354,7 @@ static int qxl_post_load(void *opaque, int version) case QXL_MODE_COMPAT: /* note: no need to call qxl_create_memslots, qxl_set_mode * creates the mem slot. */ - qxl_set_mode(d, d->shadow_rom.mode, 1); + qxl_set_mode(d, d->rom->mode, 1); break; } return 0; @@ -2428,7 +2421,7 @@ static VMStateDescription qxl_vmstate = { .fields = (VMStateField[]) { VMSTATE_PCI_DEVICE(pci, PCIQXLDevice), VMSTATE_STRUCT(vga, PCIQXLDevice, 0, vmstate_vga_common, VGACommonState), - VMSTATE_UINT32(shadow_rom.mode, PCIQXLDevice), + VMSTATE_UINT32(rom_mode, PCIQXLDevice), VMSTATE_UINT32(num_free_res, PCIQXLDevice), VMSTATE_UINT32(last_release_offset, PCIQXLDevice), VMSTATE_UINT32(mode, PCIQXLDevice),