| Message ID | 20200225201415.431668-1-msbarth@linux.ibm.com (mailing list archive) |
|---|---|
| State | Mainlined |
| Commit | 3ad7e45820d0d142161a3d811d659b8c2eb27736 |
| Headers | show |
| Series | [v2] ARM: dts: rainier: Set PCA9552 pin types | expand |
On 2/25/20 2:14 PM, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth <msbarth@linux.ibm.com> Reviewed-by: Eddie James <eajames@linux.ibm.com> > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include <dt-bindings/gpio/aspeed-gpio.h> > +#include <dt-bindings/leds/leds-pca955x.h> > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio@0 { > reg = <0>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@1 { > reg = <1>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@2 { > reg = <2>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@3 { > reg = <3>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@4 { > reg = <4>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@5 { > reg = <5>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@6 { > reg = <6>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@7 { > reg = <7>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@8 { > reg = <8>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@9 { > reg = <9>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@10 { > reg = <10>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@11 { > reg = <11>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@12 { > reg = <12>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@13 { > reg = <13>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@14 { > reg = <14>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@15 { > reg = <15>; > + type = <PCA955X_TYPE_GPIO>; > }; > }; >
On 2020-02-25 14:14, Matthew Barth wrote: > All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type > GPIO. > > Signed-off-by: Matthew Barth <msbarth@linux.ibm.com> > --- > v2: Added leds-pca955x.h include > Added upstream to patch > --- Reviewed-by: Brandon Wyman <bjwyman@gmail.com> > --- > arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ > 1 file changed, 17 insertions(+) > > diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > index c63cefce636d..d9fa9fd48058 100644 > --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts > @@ -4,6 +4,7 @@ > > #include "aspeed-g6.dtsi" > #include <dt-bindings/gpio/aspeed-gpio.h> > +#include <dt-bindings/leds/leds-pca955x.h> > > / { > model = "Rainier"; > @@ -351,66 +352,82 @@ > > gpio@0 { > reg = <0>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@1 { > reg = <1>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@2 { > reg = <2>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@3 { > reg = <3>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@4 { > reg = <4>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@5 { > reg = <5>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@6 { > reg = <6>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@7 { > reg = <7>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@8 { > reg = <8>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@9 { > reg = <9>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@10 { > reg = <10>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@11 { > reg = <11>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@12 { > reg = <12>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@13 { > reg = <13>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@14 { > reg = <14>; > + type = <PCA955X_TYPE_GPIO>; > }; > > gpio@15 { > reg = <15>; > + type = <PCA955X_TYPE_GPIO>; > }; > }; >
diff --git a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts index c63cefce636d..d9fa9fd48058 100644 --- a/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts +++ b/arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts @@ -4,6 +4,7 @@ #include "aspeed-g6.dtsi" #include <dt-bindings/gpio/aspeed-gpio.h> +#include <dt-bindings/leds/leds-pca955x.h> / { model = "Rainier"; @@ -351,66 +352,82 @@ gpio@0 { reg = <0>; + type = <PCA955X_TYPE_GPIO>; }; gpio@1 { reg = <1>; + type = <PCA955X_TYPE_GPIO>; }; gpio@2 { reg = <2>; + type = <PCA955X_TYPE_GPIO>; }; gpio@3 { reg = <3>; + type = <PCA955X_TYPE_GPIO>; }; gpio@4 { reg = <4>; + type = <PCA955X_TYPE_GPIO>; }; gpio@5 { reg = <5>; + type = <PCA955X_TYPE_GPIO>; }; gpio@6 { reg = <6>; + type = <PCA955X_TYPE_GPIO>; }; gpio@7 { reg = <7>; + type = <PCA955X_TYPE_GPIO>; }; gpio@8 { reg = <8>; + type = <PCA955X_TYPE_GPIO>; }; gpio@9 { reg = <9>; + type = <PCA955X_TYPE_GPIO>; }; gpio@10 { reg = <10>; + type = <PCA955X_TYPE_GPIO>; }; gpio@11 { reg = <11>; + type = <PCA955X_TYPE_GPIO>; }; gpio@12 { reg = <12>; + type = <PCA955X_TYPE_GPIO>; }; gpio@13 { reg = <13>; + type = <PCA955X_TYPE_GPIO>; }; gpio@14 { reg = <14>; + type = <PCA955X_TYPE_GPIO>; }; gpio@15 { reg = <15>; + type = <PCA955X_TYPE_GPIO>; }; };
All 16 pins of the PCA9552 at 7-bit address 0x61 should be set as type GPIO. Signed-off-by: Matthew Barth <msbarth@linux.ibm.com> --- v2: Added leds-pca955x.h include Added upstream to patch --- --- arch/arm/boot/dts/aspeed-bmc-ibm-rainier.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+)