| Message ID | 20200303052722.94795-5-jitao.shi@mediatek.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | mt8183 dpi supports dual edge and pin mode swap | expand |
On Tue, Mar 03, 2020 at 01:27:20PM +0800, Jitao Shi wrote: > Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> > --- > .../display/mediatek/mediatek,dpi.txt | 45 --------- > .../display/mediatek/mediatek,dpi.yaml | 92 +++++++++++++++++++ > 2 files changed, 92 insertions(+), 45 deletions(-) > delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt > create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml You need to run 'make dt_binding_check' on this and fix the errors. [...] > diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > new file mode 100644 > index 000000000000..eb2b0cb5eb5a > --- /dev/null > +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml > @@ -0,0 +1,92 @@ > +# SPDX-License-Identifier: GPL-2.0 > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/display/mediatek,dpi.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: mediatek DPI Controller Device Tree Bindings > + > +maintainers: > + - CK Hu <ck.hu@mediatek.com> > + - Jitao shi <jitao.shi@mediatek.com> > + > +description: | > + The Mediatek DPI function block is a sink of the display subsystem and > + provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel > + output bus. > + > +properties: > + compatible: > + enum: > + - mediatek,mt2701-dpi > + - mediatek,mt8173-dpi > + - mediatek,mt8183-dpi > + > + reg: > + maxItems: 1 > + > + interrupts: > + maxItems: 1 > + > + clocks: > + items: > + - description: Pixel Clock > + - description: Engine Clock > + - description: DPI PLL > + > + clock-names: > + items: > + - const: pixel > + - const: engine > + - const: pll > + > + pinctrl-names: > + items: > + - const: default > + - const: sleep Doesn't match what you just added to the binding... > + > + port: > + type: object > + description: > + Output port node with endpoint definitions as described in > + Documentation/devicetree/bindings/graph.txt. This port should be connected > + to the input port of an attached HDMI or LVDS encoder chip. > + > + properties: > + pclk-sample: > + description: refer Documentation/devicetree/bindings/media/video-interfaces.txt. This is wrong in multiple ways. 'description' is missing indentation, so you are defining 'description' to be a property. And 'pclk-sample' is not a property of 'port' node, but 'endpoint'. > + > +required: > + - compatible > + - reg > + - interrupts > + - clocks > + - clock-names > + - port > + > +additionalProperties: false > + > +examples: > + - | > + dpi0: dpi@1401d000 { > + compatible = "mediatek,mt8173-dpi"; > + reg = <0 0x1401d000 0 0x1000>; > + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; > + clocks = <&mmsys CLK_MM_DPI_PIXEL>, > + <&mmsys CLK_MM_DPI_ENGINE>, > + <&apmixedsys CLK_APMIXED_TVDPLL>; Examples are built now and you need to add includes for these defines. > + clock-names = "pixel", "engine", "pll"; > + pinctrl-names = "default", "sleep"; > + pinctrl-0 = <&dpi_pin_func>; > + pinctrl-1 = <&dpi_pin_idle>; > + > + port { > + reg = <0>; Drop 'reg'. > + dpi0_out: endpoint { > + pclk-sample = <0>; > + remote-endpoint = <&hdmi0_in>; > + }; > + }; > + }; > + > +... > -- > 2.21.0
diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt deleted file mode 100644 index 4eeead1d39db..000000000000 --- a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt +++ /dev/null @@ -1,45 +0,0 @@ -Mediatek DPI Device -=================== - -The Mediatek DPI function block is a sink of the display subsystem and -provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel -output bus. - -Required properties: -- compatible: "mediatek,<chip>-dpi" - the supported chips are mt2701 , mt8173 and mt8183. -- reg: Physical base address and length of the controller's registers -- interrupts: The interrupt signal from the function block. -- clocks: device clocks - See Documentation/devicetree/bindings/clock/clock-bindings.txt for details. -- clock-names: must contain "pixel", "engine", and "pll" -- port: Output port node with endpoint definitions as described in - Documentation/devicetree/bindings/graph.txt. This port should be connected - to the input port of an attached HDMI or LVDS encoder chip. - -Optional properties: -- pinctrl-names: Contain "gpiomode" and "dpimode". - pinctrl-names see Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt -- pclk-sample: refer Documentation/devicetree/bindings/media/video-interfaces.txt. - -Example: - -dpi0: dpi@1401d000 { - compatible = "mediatek,mt8173-dpi"; - reg = <0 0x1401d000 0 0x1000>; - interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; - clocks = <&mmsys CLK_MM_DPI_PIXEL>, - <&mmsys CLK_MM_DPI_ENGINE>, - <&apmixedsys CLK_APMIXED_TVDPLL>; - clock-names = "pixel", "engine", "pll"; - pinctrl-names = "active", "idle"; - pinctrl-0 = <&dpi_pin_func>; - pinctrl-1 = <&dpi_pin_idle>; - - port { - dpi0_out: endpoint { - pclk-sample = <0>; - remote-endpoint = <&hdmi0_in>; - }; - }; -}; diff --git a/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml new file mode 100644 index 000000000000..eb2b0cb5eb5a --- /dev/null +++ b/Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml @@ -0,0 +1,92 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/mediatek,dpi.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: mediatek DPI Controller Device Tree Bindings + +maintainers: + - CK Hu <ck.hu@mediatek.com> + - Jitao shi <jitao.shi@mediatek.com> + +description: | + The Mediatek DPI function block is a sink of the display subsystem and + provides 8-bit RGB/YUV444 or 8/10/10-bit YUV422 pixel data on a parallel + output bus. + +properties: + compatible: + enum: + - mediatek,mt2701-dpi + - mediatek,mt8173-dpi + - mediatek,mt8183-dpi + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + clocks: + items: + - description: Pixel Clock + - description: Engine Clock + - description: DPI PLL + + clock-names: + items: + - const: pixel + - const: engine + - const: pll + + pinctrl-names: + items: + - const: default + - const: sleep + + port: + type: object + description: + Output port node with endpoint definitions as described in + Documentation/devicetree/bindings/graph.txt. This port should be connected + to the input port of an attached HDMI or LVDS encoder chip. + + properties: + pclk-sample: + description: refer Documentation/devicetree/bindings/media/video-interfaces.txt. + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + - port + +additionalProperties: false + +examples: + - | + dpi0: dpi@1401d000 { + compatible = "mediatek,mt8173-dpi"; + reg = <0 0x1401d000 0 0x1000>; + interrupts = <GIC_SPI 194 IRQ_TYPE_LEVEL_LOW>; + clocks = <&mmsys CLK_MM_DPI_PIXEL>, + <&mmsys CLK_MM_DPI_ENGINE>, + <&apmixedsys CLK_APMIXED_TVDPLL>; + clock-names = "pixel", "engine", "pll"; + pinctrl-names = "default", "sleep"; + pinctrl-0 = <&dpi_pin_func>; + pinctrl-1 = <&dpi_pin_idle>; + + port { + reg = <0>; + dpi0_out: endpoint { + pclk-sample = <0>; + remote-endpoint = <&hdmi0_in>; + }; + }; + }; + +...
Signed-off-by: Jitao Shi <jitao.shi@mediatek.com> --- .../display/mediatek/mediatek,dpi.txt | 45 --------- .../display/mediatek/mediatek,dpi.yaml | 92 +++++++++++++++++++ 2 files changed, 92 insertions(+), 45 deletions(-) delete mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.txt create mode 100644 Documentation/devicetree/bindings/display/mediatek/mediatek,dpi.yaml