| Message ID | 1583538452-1992-21-git-send-email-jolly.shah@xilinx.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | firmware: xilinx: Add xilinx specific sysfs interface | expand |
On Fri, Mar 06, 2020 at 03:47:28PM -0800, Jolly Shah wrote: > --- a/include/linux/firmware/xlnx-zynqmp.h > +++ b/include/linux/firmware/xlnx-zynqmp.h > @@ -105,6 +105,10 @@ enum pm_ioctl_id { > IOCTL_GET_PLL_FRAC_MODE, > IOCTL_SET_PLL_FRAC_DATA, > IOCTL_GET_PLL_FRAC_DATA, > + IOCTL_WRITE_GGS, > + IOCTL_READ_GGS, > + IOCTL_WRITE_PGGS, > + IOCTL_READ_PGGS, You do not have explicit numbers here? Bold :) greg k-h
Hi Greg, Thanks for applying patches and review. Please see my comment inline. > -----Original Message----- > From: Greg KH <gregkh@linuxfoundation.org> > Sent: 18 March 2020 05:22 PM > To: Jolly Shah <JOLLYS@xilinx.com> > Cc: ard.biesheuvel@linaro.org; mingo@kernel.org; matt@codeblueprint.co.uk; > sudeep.holla@arm.com; hkallweit1@gmail.com; keescook@chromium.org; > dmitry.torokhov@gmail.com; Michal Simek <michals@xilinx.com>; Rajan Vaja > <RAJANV@xilinx.com>; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org; Rajan Vaja <RAJANV@xilinx.com> > Subject: Re: [PATCH v3 20/24] firmware: xilinx: Add APIs to read/write GGS/PGGS > registers > > CAUTION: This message has originated from an External Source. Please use > proper judgment and caution when opening attachments, clicking links, or > responding to this email. > > > On Fri, Mar 06, 2020 at 03:47:28PM -0800, Jolly Shah wrote: > > --- a/include/linux/firmware/xlnx-zynqmp.h > > +++ b/include/linux/firmware/xlnx-zynqmp.h > > @@ -105,6 +105,10 @@ enum pm_ioctl_id { > > IOCTL_GET_PLL_FRAC_MODE, > > IOCTL_SET_PLL_FRAC_DATA, > > IOCTL_GET_PLL_FRAC_DATA, > > + IOCTL_WRITE_GGS, > > + IOCTL_READ_GGS, > > + IOCTL_WRITE_PGGS, > > + IOCTL_READ_PGGS, > > You do not have explicit numbers here? Bold :) [Rajan] Here new IOCTL IDs are continuous so didn't mention explicit number. Are asking for adding numbers like below: enum pm_ioctl_id { ... IOCTL_GET_PLL_FRAC_DATA = 11, IOCTL_WRITE_GGS = 12, .... } Thanks, Rajan > greg k-h
On Wed, Mar 18, 2020 at 12:41:46PM +0000, Rajan Vaja wrote: > Hi Greg, > > Thanks for applying patches and review. > > Please see my comment inline. > > > -----Original Message----- > > From: Greg KH <gregkh@linuxfoundation.org> > > Sent: 18 March 2020 05:22 PM > > To: Jolly Shah <JOLLYS@xilinx.com> > > Cc: ard.biesheuvel@linaro.org; mingo@kernel.org; matt@codeblueprint.co.uk; > > sudeep.holla@arm.com; hkallweit1@gmail.com; keescook@chromium.org; > > dmitry.torokhov@gmail.com; Michal Simek <michals@xilinx.com>; Rajan Vaja > > <RAJANV@xilinx.com>; linux-arm-kernel@lists.infradead.org; linux- > > kernel@vger.kernel.org; Rajan Vaja <RAJANV@xilinx.com> > > Subject: Re: [PATCH v3 20/24] firmware: xilinx: Add APIs to read/write GGS/PGGS > > registers > > > > CAUTION: This message has originated from an External Source. Please use > > proper judgment and caution when opening attachments, clicking links, or > > responding to this email. > > > > > > On Fri, Mar 06, 2020 at 03:47:28PM -0800, Jolly Shah wrote: > > > --- a/include/linux/firmware/xlnx-zynqmp.h > > > +++ b/include/linux/firmware/xlnx-zynqmp.h > > > @@ -105,6 +105,10 @@ enum pm_ioctl_id { > > > IOCTL_GET_PLL_FRAC_MODE, > > > IOCTL_SET_PLL_FRAC_DATA, > > > IOCTL_GET_PLL_FRAC_DATA, > > > + IOCTL_WRITE_GGS, > > > + IOCTL_READ_GGS, > > > + IOCTL_WRITE_PGGS, > > > + IOCTL_READ_PGGS, > > > > You do not have explicit numbers here? Bold :) > [Rajan] Here new IOCTL IDs are continuous so didn't mention explicit number. Yes, but is that guaranteed by the compiler? I keep getting conflicting advice with that. > Are asking for adding numbers like below: > enum pm_ioctl_id { > ... > IOCTL_GET_PLL_FRAC_DATA = 11, > IOCTL_WRITE_GGS = 12, > .... > } Yes please, especially as your firmware is expecting the explicit values here, right? That way you _know_ everything is correct. thanks, greg k-h
diff --git a/drivers/firmware/xilinx/zynqmp.c b/drivers/firmware/xilinx/zynqmp.c index 36d5a3e..de99613 100644 --- a/drivers/firmware/xilinx/zynqmp.c +++ b/drivers/firmware/xilinx/zynqmp.c @@ -601,6 +601,72 @@ int zynqmp_pm_set_sd_tapdelay(u32 node_id, u32 type, u32 value) EXPORT_SYMBOL_GPL(zynqmp_pm_set_sd_tapdelay); /** + * zynqmp_pm_write_ggs() - PM API for writing global general storage (ggs) + * @index GGS register index + * @value Register value to be written + * + * This function writes value to GGS register. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_write_ggs(u32 index, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_GGS, + index, value, NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_write_ggs); + +/** + * zynqmp_pm_write_ggs() - PM API for reading global general storage (ggs) + * @index GGS register index + * @value Register value to be written + * + * This function returns GGS register value. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_read_ggs(u32 index, u32 *value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_GGS, + index, 0, value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_read_ggs); + +/** + * zynqmp_pm_write_pggs() - PM API for writing persistent global general + * storage (pggs) + * @index PGGS register index + * @value Register value to be written + * + * This function writes value to PGGS register. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_write_pggs(u32 index, u32 value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_WRITE_PGGS, index, value, + NULL); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_write_pggs); + +/** + * zynqmp_pm_write_pggs() - PM API for reading persistent global general + * storage (pggs) + * @index PGGS register index + * @value Register value to be written + * + * This function returns PGGS register value. + * + * @return Returns status, either success or error+reason + */ +int zynqmp_pm_read_pggs(u32 index, u32 *value) +{ + return zynqmp_pm_invoke_fn(PM_IOCTL, 0, IOCTL_READ_PGGS, index, 0, + value); +} +EXPORT_SYMBOL_GPL(zynqmp_pm_read_pggs); + +/** * zynqmp_pm_reset_assert - Request setting of reset (1 - assert, 0 - release) * @reset: Reset to be configured * @assert_flag: Flag stating should reset be asserted (1) or diff --git a/include/linux/firmware/xlnx-zynqmp.h b/include/linux/firmware/xlnx-zynqmp.h index 1734d12..725dccf 100644 --- a/include/linux/firmware/xlnx-zynqmp.h +++ b/include/linux/firmware/xlnx-zynqmp.h @@ -105,6 +105,10 @@ enum pm_ioctl_id { IOCTL_GET_PLL_FRAC_MODE, IOCTL_SET_PLL_FRAC_DATA, IOCTL_GET_PLL_FRAC_DATA, + IOCTL_WRITE_GGS, + IOCTL_READ_GGS, + IOCTL_WRITE_PGGS, + IOCTL_READ_PGGS, }; enum pm_query_id { @@ -315,6 +319,10 @@ int zynqmp_pm_set_requirement(const u32 node, const u32 capabilities, const enum zynqmp_pm_request_ack ack); int zynqmp_pm_fpga_load(const u64 address, const u32 size, const u32 flags); int zynqmp_pm_fpga_get_status(u32 *value); +int zynqmp_pm_write_ggs(u32 index, u32 value); +int zynqmp_pm_read_ggs(u32 index, u32 *value); +int zynqmp_pm_write_pggs(u32 index, u32 value); +int zynqmp_pm_read_pggs(u32 index, u32 *value); int zynqmp_pm_invoke_fn(u32 pm_api_id, u32 arg0, u32 arg1, u32 arg2, u32 arg3, u32 *ret_payload);