[7/7] Documentation: fpga: dfl: add descriptions for interrupt related interfaces.
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Message ID 1583749790-10837-8-git-send-email-yilun.xu@intel.com
State Superseded, archived
Headers show
  • Add interrupt support to FPGA DFL drivers
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Commit Message

Xu Yilun March 9, 2020, 10:29 a.m. UTC
This patch adds introductions of interrupt related interfaces for FME
error reporting, port error reporting and AFU user interrupts features.

Signed-off-by: Luwei Kang <luwei.kang@intel.com>
Signed-off-by: Wu Hao <hao.wu@intel.com>
Signed-off-by: Xu Yilun <yilun.xu@intel.com>
 Documentation/fpga/dfl.rst | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

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diff --git a/Documentation/fpga/dfl.rst b/Documentation/fpga/dfl.rst
index 094fc8a..3c4e150 100644
--- a/Documentation/fpga/dfl.rst
+++ b/Documentation/fpga/dfl.rst
@@ -89,6 +89,8 @@  The following functions are exposed through ioctls:
 - Program bitstream (DFL_FPGA_FME_PORT_PR)
 - Assign port to PF (DFL_FPGA_FME_PORT_ASSIGN)
 - Release port from PF (DFL_FPGA_FME_PORT_RELEASE)
+- Get FME global error info (DFL_FPGA_FME_ERR_GET_INFO)
+- Set interrupt trigger for FME error (DFL_FPGA_FME_ERR_SET_IRQ)
 More functions are exposed through sysfs
@@ -144,6 +146,10 @@  The following functions are exposed through ioctls:
+- Get port error info (DFL_FPGA_PORT_ERR_GET_INFO)
+- Set interrupt trigger for port error(DFL_FPGA_PORT_ERR_SET_IRQ)
+- Get User AFU interrupt(UINT) info (DFL_FPGA_PORT_UINT_GET_INFO)
+- Set interrupt trigger for UINT (DFL_FPGA_PORT_UINT_SET_IRQ)
   reset the FPGA Port and its AFU. Userspace can do Port
@@ -378,6 +384,17 @@  The device nodes used for ioctl() or mmap() can be referenced through::
+Interrupt support
+Some FME and AFU private features are able to generate interrupts. As mentioned
+above, users could call ioctl (DFL_FPGA_*_GET_INFO), query the nr_irqs field to
+know whether or how many interrupts are supported for this private feature.
+Drivers also implement an eventfd based interrupt handling mechanism for users
+to get notified when interrupt happens. Users could set eventfds to driver via
+ioctl (DFL_FPGA_*_SET_IRQ), and then poll/select on these eventfds waiting for
 Add new FIUs support
 It's possible that developers made some new function blocks (FIUs) under this