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[2/7] drm/i915: Add Wa_1207131216:icl,ehl

Message ID 20200310004911.1723239-3-matthew.d.roper@intel.com (mailing list archive)
State New, archived
Headers show
Series Gen11 workarounds | expand

Commit Message

Matt Roper March 10, 2020, 12:49 a.m. UTC
On gen11 the XY_FAST_COPY_BLT command has some size restrictions on its
usage.  Although this instruction is mainly used by userspace, i915 also
uses it to copy object contents during some selftests, so let's ensure
the restrictions are followed.

Bspec: 6544
Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
---
 drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

Comments

Mika Kuoppala March 10, 2020, 4:22 p.m. UTC | #1
Matt Roper <matthew.d.roper@intel.com> writes:

> On gen11 the XY_FAST_COPY_BLT command has some size restrictions on its
> usage.  Although this instruction is mainly used by userspace, i915 also
> uses it to copy object contents during some selftests, so let's ensure
> the restrictions are followed.
>
> Bspec: 6544
> Signed-off-by: Matt Roper <matthew.d.roper@intel.com>
> ---
>  drivers/gpu/drm/i915/gem/i915_gem_object_blt.c | 14 +++++++++++++-
>  1 file changed, 13 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> index 39b8a055d80a..e00792158f13 100644
> --- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> +++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
> @@ -196,6 +196,17 @@ int i915_gem_object_fill_blt(struct drm_i915_gem_object *obj,
>  	return err;
>  }
>  
> +/* Wa_1209644611:icl,ehl */
> +static bool wa_1209644611_applies(struct drm_i915_private *i915, u32 size)
> +{
> +	u32 height = size >> PAGE_SHIFT;
> +
> +	if (!IS_GEN(i915, 11))
> +		return false;
> +
> +	return height % 4 == 3 && height <= 8;

The workaround description matches with this. However the original
sighting was only for Y-Tiled surfaces. I asked for clarification.

If we won't get one, we can play it safe and use this as it is.

-Mika

> +}
> +
>  struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
>  					 struct i915_vma *src,
>  					 struct i915_vma *dst)
> @@ -237,7 +248,8 @@ struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
>  		size = min_t(u64, rem, block_size);
>  		GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
>  
> -		if (INTEL_GEN(i915) >= 9) {
> +		if (INTEL_GEN(i915) >= 9 &&
> +		    !wa_1209644611_applies(i915, size)) {
>  			*cmd++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2);
>  			*cmd++ = BLT_DEPTH_32 | PAGE_SIZE;
>  			*cmd++ = 0;
> -- 
> 2.24.1
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
diff mbox series

Patch

diff --git a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
index 39b8a055d80a..e00792158f13 100644
--- a/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
+++ b/drivers/gpu/drm/i915/gem/i915_gem_object_blt.c
@@ -196,6 +196,17 @@  int i915_gem_object_fill_blt(struct drm_i915_gem_object *obj,
 	return err;
 }
 
+/* Wa_1209644611:icl,ehl */
+static bool wa_1209644611_applies(struct drm_i915_private *i915, u32 size)
+{
+	u32 height = size >> PAGE_SHIFT;
+
+	if (!IS_GEN(i915, 11))
+		return false;
+
+	return height % 4 == 3 && height <= 8;
+}
+
 struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
 					 struct i915_vma *src,
 					 struct i915_vma *dst)
@@ -237,7 +248,8 @@  struct i915_vma *intel_emit_vma_copy_blt(struct intel_context *ce,
 		size = min_t(u64, rem, block_size);
 		GEM_BUG_ON(size >> PAGE_SHIFT > S16_MAX);
 
-		if (INTEL_GEN(i915) >= 9) {
+		if (INTEL_GEN(i915) >= 9 &&
+		    !wa_1209644611_applies(i915, size)) {
 			*cmd++ = GEN9_XY_FAST_COPY_BLT_CMD | (10 - 2);
 			*cmd++ = BLT_DEPTH_32 | PAGE_SIZE;
 			*cmd++ = 0;