| Message ID | 20200313164831.5980-4-ville.syrjala@linux.intel.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | drm/i915: Port sync for skl+ | expand |
On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > The entire crtc state has been reset before readout so > master_transcoder is already set to INVALID. But wont that mean that the master transcoder would be set to 0 on reset and what we want is actually setting that to INVALID Manasi > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > --- > drivers/gpu/drm/i915/display/intel_display.c | 2 -- > 1 file changed, 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > index c49b4e6eb3d4..12823d8f6afe 100644 > --- a/drivers/gpu/drm/i915/display/intel_display.c > +++ b/drivers/gpu/drm/i915/display/intel_display.c > @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > pipe_config->shared_dpll = NULL; > - pipe_config->master_transcoder = INVALID_TRANSCODER; > > ret = false; > > @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > pipe_config->shared_dpll = NULL; > - pipe_config->master_transcoder = INVALID_TRANSCODER; > > ret = false; > tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe)); > -- > 2.24.1 >
On Wed, Mar 18, 2020 at 03:37:32PM -0700, Manasi Navare wrote: > On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > The entire crtc state has been reset before readout so > > master_transcoder is already set to INVALID. > > But wont that mean that the master transcoder would be set to 0 > on reset and what we want is actually setting that to INVALID No. Pls see intel_crtc_state_reset() > > Manasi > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > --- > > drivers/gpu/drm/i915/display/intel_display.c | 2 -- > > 1 file changed, 2 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > index c49b4e6eb3d4..12823d8f6afe 100644 > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > > pipe_config->shared_dpll = NULL; > > - pipe_config->master_transcoder = INVALID_TRANSCODER; > > > > ret = false; > > > > @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, > > > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > > pipe_config->shared_dpll = NULL; > > - pipe_config->master_transcoder = INVALID_TRANSCODER; > > > > ret = false; > > tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe)); > > -- > > 2.24.1 > >
On Thu, Mar 19, 2020 at 03:22:06PM +0200, Ville Syrjälä wrote: > On Wed, Mar 18, 2020 at 03:37:32PM -0700, Manasi Navare wrote: > > On Fri, Mar 13, 2020 at 06:48:21PM +0200, Ville Syrjala wrote: > > > From: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > > > > The entire crtc state has been reset before readout so > > > master_transcoder is already set to INVALID. > > > > But wont that mean that the master transcoder would be set to 0 > > on reset and what we want is actually setting that to INVALID > > No. Pls see intel_crtc_state_reset() > Okay got it with that Reviewed-by: Manasi Navare <manasi.d.navare@intel.com> Manasi > > > > > Manasi > > > > > > > > Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> > > > --- > > > drivers/gpu/drm/i915/display/intel_display.c | 2 -- > > > 1 file changed, 2 deletions(-) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > > index c49b4e6eb3d4..12823d8f6afe 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > > @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, > > > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; > > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > > > pipe_config->shared_dpll = NULL; > > > - pipe_config->master_transcoder = INVALID_TRANSCODER; > > > > > > ret = false; > > > > > > @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, > > > > > > pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; > > > pipe_config->shared_dpll = NULL; > > > - pipe_config->master_transcoder = INVALID_TRANSCODER; > > > > > > ret = false; > > > tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe)); > > > -- > > > 2.24.1 > > > > > -- > Ville Syrjälä > Intel
diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c index c49b4e6eb3d4..12823d8f6afe 100644 --- a/drivers/gpu/drm/i915/display/intel_display.c +++ b/drivers/gpu/drm/i915/display/intel_display.c @@ -9364,7 +9364,6 @@ static bool i9xx_get_pipe_config(struct intel_crtc *crtc, pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB; pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; pipe_config->shared_dpll = NULL; - pipe_config->master_transcoder = INVALID_TRANSCODER; ret = false; @@ -10588,7 +10587,6 @@ static bool ilk_get_pipe_config(struct intel_crtc *crtc, pipe_config->cpu_transcoder = (enum transcoder) crtc->pipe; pipe_config->shared_dpll = NULL; - pipe_config->master_transcoder = INVALID_TRANSCODER; ret = false; tmp = intel_de_read(dev_priv, PIPECONF(crtc->pipe));