| Message ID | 20200326152438.6218-29-alexandru.elisei@arm.com (mailing list archive) |
|---|---|
| State | New, archived |
| Headers | show |
| Series | Add reassignable BARs and PCIE 1.1 support | expand |
On 26/03/2020 15:24, Alexandru Elisei wrote: > During configuration of the BAR addresses, a Linux guest disables and > enables access to I/O and memory space. When access is disabled, we don't > stop emulating the memory regions described by the BARs. Now that we have > callbacks for activating and deactivating emulation for a BAR region, > let's use that to stop emulation when access is disabled, and > re-activate it when access is re-enabled. > > Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> Reviewed-by: Andre Przywara <andre.przywara@arm.com> Cheers, Andre > --- > pci.c | 42 ++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 42 insertions(+) > > diff --git a/pci.c b/pci.c > index 4ace190898f2..c2860e6707fe 100644 > --- a/pci.c > +++ b/pci.c > @@ -163,6 +163,42 @@ static struct ioport_operations pci_config_data_ops = { > .io_out = pci_config_data_out, > }; > > +static void pci_config_command_wr(struct kvm *kvm, > + struct pci_device_header *pci_hdr, > + u16 new_command) > +{ > + int i; > + bool toggle_io, toggle_mem; > + > + toggle_io = (pci_hdr->command ^ new_command) & PCI_COMMAND_IO; > + toggle_mem = (pci_hdr->command ^ new_command) & PCI_COMMAND_MEMORY; > + > + for (i = 0; i < 6; i++) { > + if (!pci_bar_is_implemented(pci_hdr, i)) > + continue; > + > + if (toggle_io && pci__bar_is_io(pci_hdr, i)) { > + if (__pci__io_space_enabled(new_command)) > + pci_hdr->bar_activate_fn(kvm, pci_hdr, i, > + pci_hdr->data); > + else > + pci_hdr->bar_deactivate_fn(kvm, pci_hdr, i, > + pci_hdr->data); > + } > + > + if (toggle_mem && pci__bar_is_memory(pci_hdr, i)) { > + if (__pci__memory_space_enabled(new_command)) > + pci_hdr->bar_activate_fn(kvm, pci_hdr, i, > + pci_hdr->data); > + else > + pci_hdr->bar_deactivate_fn(kvm, pci_hdr, i, > + pci_hdr->data); > + } > + } > + > + pci_hdr->command = new_command; > +} > + > void pci__config_wr(struct kvm *kvm, union pci_config_address addr, void *data, int size) > { > void *base; > @@ -188,6 +224,12 @@ void pci__config_wr(struct kvm *kvm, union pci_config_address addr, void *data, > if (*(u32 *)(base + offset) == 0) > return; > > + if (offset == PCI_COMMAND) { > + memcpy(&value, data, size); > + pci_config_command_wr(kvm, pci_hdr, (u16)value); > + return; > + } > + > bar = (offset - PCI_BAR_OFFSET(0)) / sizeof(u32); > > /* >
diff --git a/pci.c b/pci.c index 4ace190898f2..c2860e6707fe 100644 --- a/pci.c +++ b/pci.c @@ -163,6 +163,42 @@ static struct ioport_operations pci_config_data_ops = { .io_out = pci_config_data_out, }; +static void pci_config_command_wr(struct kvm *kvm, + struct pci_device_header *pci_hdr, + u16 new_command) +{ + int i; + bool toggle_io, toggle_mem; + + toggle_io = (pci_hdr->command ^ new_command) & PCI_COMMAND_IO; + toggle_mem = (pci_hdr->command ^ new_command) & PCI_COMMAND_MEMORY; + + for (i = 0; i < 6; i++) { + if (!pci_bar_is_implemented(pci_hdr, i)) + continue; + + if (toggle_io && pci__bar_is_io(pci_hdr, i)) { + if (__pci__io_space_enabled(new_command)) + pci_hdr->bar_activate_fn(kvm, pci_hdr, i, + pci_hdr->data); + else + pci_hdr->bar_deactivate_fn(kvm, pci_hdr, i, + pci_hdr->data); + } + + if (toggle_mem && pci__bar_is_memory(pci_hdr, i)) { + if (__pci__memory_space_enabled(new_command)) + pci_hdr->bar_activate_fn(kvm, pci_hdr, i, + pci_hdr->data); + else + pci_hdr->bar_deactivate_fn(kvm, pci_hdr, i, + pci_hdr->data); + } + } + + pci_hdr->command = new_command; +} + void pci__config_wr(struct kvm *kvm, union pci_config_address addr, void *data, int size) { void *base; @@ -188,6 +224,12 @@ void pci__config_wr(struct kvm *kvm, union pci_config_address addr, void *data, if (*(u32 *)(base + offset) == 0) return; + if (offset == PCI_COMMAND) { + memcpy(&value, data, size); + pci_config_command_wr(kvm, pci_hdr, (u16)value); + return; + } + bar = (offset - PCI_BAR_OFFSET(0)) / sizeof(u32); /*
During configuration of the BAR addresses, a Linux guest disables and enables access to I/O and memory space. When access is disabled, we don't stop emulating the memory regions described by the BARs. Now that we have callbacks for activating and deactivating emulation for a BAR region, let's use that to stop emulation when access is disabled, and re-activate it when access is re-enabled. Signed-off-by: Alexandru Elisei <alexandru.elisei@arm.com> --- pci.c | 42 ++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 42 insertions(+)