drm/i915/huc: Fix HuC register used in debugfs
diff mbox series

Message ID 20200330113338.1713-1-michal.wajdeczko@intel.com
State New
Headers show
Series
  • drm/i915/huc: Fix HuC register used in debugfs
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Commit Message

Michal Wajdeczko March 30, 2020, 11:33 a.m. UTC
We report HuC status in debugfs using register read, but
we missed that on Gen11+ HuC uses different register.
Use correct one.

While here, correct placement of the colon.

Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
---
 drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

Comments

Chris Wilson March 30, 2020, 12:18 p.m. UTC | #1
Quoting Michal Wajdeczko (2020-03-30 12:33:38)
> We report HuC status in debugfs using register read, but
> we missed that on Gen11+ HuC uses different register.
> Use correct one.
> 
> While here, correct placement of the colon.
> 
> Signed-off-by: Michal Wajdeczko <michal.wajdeczko@intel.com>
> Cc: Daniele Ceraolo Spurio <daniele.ceraolospurio@intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> ---
>  drivers/gpu/drm/i915/gt/uc/intel_huc.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> index d6097b46600c..3fee65308474 100644
> --- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> +++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
> @@ -244,6 +244,6 @@ void intel_huc_load_status(struct intel_huc *huc, struct drm_printer *p)
>         intel_uc_fw_dump(&huc->fw, p);
>  
>         with_intel_runtime_pm(gt->uncore->rpm, wakeref)
> -               drm_printf(p, "\nHuC status 0x%08x:\n",
> -                          intel_uncore_read(gt->uncore, HUC_STATUS2));
> +               drm_printf(p, "HuC status: 0x%08x\n",
> +                          intel_uncore_read(gt->uncore, huc->status.reg));

drivers/gpu/drm/i915/gt/uc/intel_huc.c:         huc->status.reg = GEN11_HUC_KERNEL_LOAD_INFO;
drivers/gpu/drm/i915/gt/uc/intel_huc.c:         huc->status.reg = HUC_STATUS2;
drivers/gpu/drm/i915/gt/uc/intel_huc.c:                                 huc->status.reg,
drivers/gpu/drm/i915/gt/uc/intel_huc.c:         status = intel_uncore_read(gt->uncore, huc->status.reg);

Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
-Chris

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/gt/uc/intel_huc.c b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
index d6097b46600c..3fee65308474 100644
--- a/drivers/gpu/drm/i915/gt/uc/intel_huc.c
+++ b/drivers/gpu/drm/i915/gt/uc/intel_huc.c
@@ -244,6 +244,6 @@  void intel_huc_load_status(struct intel_huc *huc, struct drm_printer *p)
 	intel_uc_fw_dump(&huc->fw, p);
 
 	with_intel_runtime_pm(gt->uncore->rpm, wakeref)
-		drm_printf(p, "\nHuC status 0x%08x:\n",
-			   intel_uncore_read(gt->uncore, HUC_STATUS2));
+		drm_printf(p, "HuC status: 0x%08x\n",
+			   intel_uncore_read(gt->uncore, huc->status.reg));
 }