[v4,4/4] drm/i915: Add i915_lpsp_status debugfs attribute
diff mbox series

Message ID 20200409060646.30817-5-anshuman.gupta@intel.com
State New
Headers show
Series
  • i915 lpsp support for lpsp igt
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Commit Message

Anshuman Gupta April 9, 2020, 6:06 a.m. UTC
It requires a separate debugfs attribute to expose lpsp
status to user space, as there may be display less configuration
without any valid connected output, those configuration will not be
able to test lpsp status, if lpsp status exposed from a connector
based debugfs attribute.

Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>
---
 .../drm/i915/display/intel_display_debugfs.c  | 46 +++++++++++++++++++
 .../drm/i915/display/intel_display_power.h    |  2 +
 2 files changed, 48 insertions(+)

Comments

Manna, Animesh April 14, 2020, 4:13 p.m. UTC | #1
On 09-04-2020 11:36, Anshuman Gupta wrote:
> It requires a separate debugfs attribute to expose lpsp
> status to user space, as there may be display less configuration
> without any valid connected output, those configuration will not be
> able to test lpsp status, if lpsp status exposed from a connector
> based debugfs attribute.
>
> Signed-off-by: Anshuman Gupta <anshuman.gupta@intel.com>

Looks good to me.
Reviewed-by: Animesh Manna <animesh.manna@intel.com>

> ---
>   .../drm/i915/display/intel_display_debugfs.c  | 46 +++++++++++++++++++
>   .../drm/i915/display/intel_display_power.h    |  2 +
>   2 files changed, 48 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 402b89daff62..9a5b7f1cbe07 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -9,6 +9,7 @@
>   #include "i915_debugfs.h"
>   #include "intel_csr.h"
>   #include "intel_display_debugfs.h"
> +#include "intel_display_power.h"
>   #include "intel_display_types.h"
>   #include "intel_dp.h"
>   #include "intel_fbc.h"
> @@ -613,6 +614,8 @@ static void intel_hdcp_info(struct seq_file *m,
>   
>   #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
>   				seq_puts(m, "LPSP: incapable\n"))
> +#define LPSP_STATUS(COND) (COND ? seq_puts(m, "LPSP: enabled\n") : \
> +				seq_puts(m, "LPSP: disabled\n"))
>   
>   static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
>   {
> @@ -1165,6 +1168,48 @@ static int i915_drrs_status(struct seq_file *m, void *unused)
>   	return 0;
>   }
>   
> +static bool
> +intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
> +			      enum i915_power_well_id power_well_id)
> +{
> +	intel_wakeref_t wakeref;
> +	bool is_enabled;
> +
> +	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
> +	is_enabled = intel_display_power_well_is_enabled(i915,
> +							 power_well_id);
> +	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
> +
> +	return is_enabled;
> +}
> +
> +static int i915_lpsp_status(struct seq_file *m, void *unused)
> +{
> +	struct drm_i915_private *i915 = node_to_i915(m->private);
> +
> +	switch (INTEL_GEN(i915)) {
> +	case 12:
> +	case 11:
> +		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3));
> +		break;
> +	case 10:
> +	case 9:
> +		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2));
> +		break;
> +	default:
> +		/*
> +		 * Apart from HASWELL/BROADWELL other legacy platform doesn't
> +		 * support lpsp.
> +		 */
> +		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
> +			LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL));
> +		else
> +			seq_puts(m, "LPSP: not supported\n");
> +	}
> +
> +	return 0;
> +}
> +
>   static int i915_dp_mst_info(struct seq_file *m, void *unused)
>   {
>   	struct drm_i915_private *dev_priv = node_to_i915(m->private);
> @@ -1932,6 +1977,7 @@ static const struct drm_info_list intel_display_debugfs_list[] = {
>   	{"i915_dp_mst_info", i915_dp_mst_info, 0},
>   	{"i915_ddb_info", i915_ddb_info, 0},
>   	{"i915_drrs_status", i915_drrs_status, 0},
> +	{"i915_lpsp_status", i915_lpsp_status, 0},
>   };
>   
>   static const struct {
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
> index 56cbae6327b7..14c5ad20287f 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.h
> @@ -266,6 +266,8 @@ intel_display_power_domain_str(enum intel_display_power_domain domain);
>   
>   bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
>   				    enum intel_display_power_domain domain);
> +bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
> +					 enum i915_power_well_id power_well_id);
>   bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
>   				      enum intel_display_power_domain domain);
>   intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,

Patch
diff mbox series

diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
index 402b89daff62..9a5b7f1cbe07 100644
--- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
+++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
@@ -9,6 +9,7 @@ 
 #include "i915_debugfs.h"
 #include "intel_csr.h"
 #include "intel_display_debugfs.h"
+#include "intel_display_power.h"
 #include "intel_display_types.h"
 #include "intel_dp.h"
 #include "intel_fbc.h"
@@ -613,6 +614,8 @@  static void intel_hdcp_info(struct seq_file *m,
 
 #define LPSP_CAPABLE(COND) (COND ? seq_puts(m, "LPSP: capable\n") : \
 				seq_puts(m, "LPSP: incapable\n"))
+#define LPSP_STATUS(COND) (COND ? seq_puts(m, "LPSP: enabled\n") : \
+				seq_puts(m, "LPSP: disabled\n"))
 
 static bool intel_have_edp_dsi_panel(struct drm_connector *connector)
 {
@@ -1165,6 +1168,48 @@  static int i915_drrs_status(struct seq_file *m, void *unused)
 	return 0;
 }
 
+static bool
+intel_lpsp_power_well_enabled(struct drm_i915_private *i915,
+			      enum i915_power_well_id power_well_id)
+{
+	intel_wakeref_t wakeref;
+	bool is_enabled;
+
+	wakeref = intel_runtime_pm_get(&i915->runtime_pm);
+	is_enabled = intel_display_power_well_is_enabled(i915,
+							 power_well_id);
+	intel_runtime_pm_put(&i915->runtime_pm, wakeref);
+
+	return is_enabled;
+}
+
+static int i915_lpsp_status(struct seq_file *m, void *unused)
+{
+	struct drm_i915_private *i915 = node_to_i915(m->private);
+
+	switch (INTEL_GEN(i915)) {
+	case 12:
+	case 11:
+		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, ICL_DISP_PW_3));
+		break;
+	case 10:
+	case 9:
+		LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, SKL_DISP_PW_2));
+		break;
+	default:
+		/*
+		 * Apart from HASWELL/BROADWELL other legacy platform doesn't
+		 * support lpsp.
+		 */
+		if (IS_HASWELL(i915) || IS_BROADWELL(i915))
+			LPSP_STATUS(!intel_lpsp_power_well_enabled(i915, HSW_DISP_PW_GLOBAL));
+		else
+			seq_puts(m, "LPSP: not supported\n");
+	}
+
+	return 0;
+}
+
 static int i915_dp_mst_info(struct seq_file *m, void *unused)
 {
 	struct drm_i915_private *dev_priv = node_to_i915(m->private);
@@ -1932,6 +1977,7 @@  static const struct drm_info_list intel_display_debugfs_list[] = {
 	{"i915_dp_mst_info", i915_dp_mst_info, 0},
 	{"i915_ddb_info", i915_ddb_info, 0},
 	{"i915_drrs_status", i915_drrs_status, 0},
+	{"i915_lpsp_status", i915_lpsp_status, 0},
 };
 
 static const struct {
diff --git a/drivers/gpu/drm/i915/display/intel_display_power.h b/drivers/gpu/drm/i915/display/intel_display_power.h
index 56cbae6327b7..14c5ad20287f 100644
--- a/drivers/gpu/drm/i915/display/intel_display_power.h
+++ b/drivers/gpu/drm/i915/display/intel_display_power.h
@@ -266,6 +266,8 @@  intel_display_power_domain_str(enum intel_display_power_domain domain);
 
 bool intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
 				    enum intel_display_power_domain domain);
+bool intel_display_power_well_is_enabled(struct drm_i915_private *dev_priv,
+					 enum i915_power_well_id power_well_id);
 bool __intel_display_power_is_enabled(struct drm_i915_private *dev_priv,
 				      enum intel_display_power_domain domain);
 intel_wakeref_t intel_display_power_get(struct drm_i915_private *dev_priv,