| Message ID | 20200417190825.1363345-2-martin.blumenstingl@googlemail.com (mailing list archive) |
|---|---|
| State | Superseded |
| Headers | show |
| Series | meson-ee-pwrc: support for Meson8/8b/8m2 and GX | expand |
On Fri, 17 Apr 2020 21:08:22 +0200, Martin Blumenstingl wrote: > The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very > similar to what G12A still uses. The (known) differences are: > - Meson8 doesn't use any reset lines at all > - Meson8b and Meson8m2 use the same reset lines, which are different > from what the 64-bit SoCs use > - there is no "vapb" clock on the older SoCs > - amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but > only the power management related registers > > Add a new compatible string and adjust clock and reset line expectations > for each SoC. > > Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> > --- > .../bindings/power/amlogic,meson-ee-pwrc.yaml | 75 ++++++++++++++----- > include/dt-bindings/power/meson8-power.h | 13 ++++ > 2 files changed, 71 insertions(+), 17 deletions(-) > create mode 100644 include/dt-bindings/power/meson8-power.h > My bot found errors running 'make dt_binding_check' on your patch: /builds/robherring/linux-dt-review/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.example.dt.yaml: power-controller: 'reset-names' does not match any of the regexes: 'pinctrl-[0-9]+' See https://patchwork.ozlabs.org/patch/1272441 If you already ran 'make dt_binding_check' and didn't see the above error(s), then make sure dt-schema is up to date: pip3 install git+https://github.com/devicetree-org/dt-schema.git@master --upgrade Please check and re-submit.
diff --git a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml index 6c6079fe1351..a0e4cf143b9c 100644 --- a/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml +++ b/Documentation/devicetree/bindings/power/amlogic,meson-ee-pwrc.yaml @@ -23,13 +23,19 @@ description: |+ properties: compatible: enum: + - amlogic,meson8-pwrc + - amlogic,meson8b-pwrc + - amlogic,meson8m2-pwrc - amlogic,meson-g12a-pwrc - amlogic,meson-sm1-pwrc clocks: - minItems: 2 + minItems: 1 + maxItems: 2 clock-names: + minItems: 1 + maxItems: 2 items: - const: vpu - const: vapb @@ -37,20 +43,6 @@ properties: resets: minItems: 11 - reset-names: - items: - - const: viu - - const: venc - - const: vcbus - - const: bt656 - - const: rdma - - const: venci - - const: vencp - - const: vdac - - const: vdi6 - - const: vencl - - const: vid_lock - "#power-domain-cells": const: 1 @@ -59,12 +51,61 @@ properties: allOf: - $ref: /schemas/types.yaml#/definitions/phandle +allOf: + - if: + properties: + compatible: + enum: + - amlogic,meson8b-pwrc + - amlogic,meson8m2-pwrc + then: + properties: + reset-names: + items: + - const: dblk + - const: pic_dc + - const: hdmi_apb + - const: hdmi_system + - const: venci + - const: vencp + - const: vdac + - const: vencl + - const: viu + - const: venc + - const: rdma + required: + - resets + - reset-names + + - if: + properties: + compatible: + enum: + - amlogic,meson-g12a-pwrc + - amlogic,meson-sm1-pwrc + then: + properties: + reset-names: + items: + - const: viu + - const: venc + - const: vcbus + - const: bt656 + - const: rdma + - const: venci + - const: vencp + - const: vdac + - const: vdi6 + - const: vencl + - const: vid_lock + required: + - resets + - reset-names + required: - compatible - clocks - clock-names - - resets - - reset-names - "#power-domain-cells" - amlogic,ao-sysctrl diff --git a/include/dt-bindings/power/meson8-power.h b/include/dt-bindings/power/meson8-power.h new file mode 100644 index 000000000000..dd8b2ddb82a7 --- /dev/null +++ b/include/dt-bindings/power/meson8-power.h @@ -0,0 +1,13 @@ +/* SPDX-License-Identifier: (GPL-2.0+ or MIT) */ +/* + * Copyright (c) 2019 Martin Blumenstingl <martin.blumenstingl@googlemail.com> + */ + +#ifndef _DT_BINDINGS_MESON8_POWER_H +#define _DT_BINDINGS_MESON8_POWER_H + +#define PWRC_MESON8_VPU_ID 0 +#define PWRC_MESON8_ETHERNET_MEM_ID 1 +#define PWRC_MESON8_AUDIO_DSP_MEM_ID 2 + +#endif /* _DT_BINDINGS_MESON8_POWER_H */
The power domains on the 32-bit Meson8/Meson8b/Meson8m2 SoCs are very similar to what G12A still uses. The (known) differences are: - Meson8 doesn't use any reset lines at all - Meson8b and Meson8m2 use the same reset lines, which are different from what the 64-bit SoCs use - there is no "vapb" clock on the older SoCs - amlogic,ao-sysctrl cannot point to the whole AO sysctrl region but only the power management related registers Add a new compatible string and adjust clock and reset line expectations for each SoC. Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com> --- .../bindings/power/amlogic,meson-ee-pwrc.yaml | 75 ++++++++++++++----- include/dt-bindings/power/meson8-power.h | 13 ++++ 2 files changed, 71 insertions(+), 17 deletions(-) create mode 100644 include/dt-bindings/power/meson8-power.h